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Kirill Smelkov
linux
Commits
c0550c4b
Commit
c0550c4b
authored
Oct 08, 2010
by
Eric Bénard
Committed by
Sascha Hauer
Oct 19, 2010
Browse files
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Plain Diff
eukrea_mbimxsd: add support for DVI displays
Signed-off-by:
Eric Bénard
<
eric@eukrea.com
>
parent
52d084fc
Changes
2
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Showing
2 changed files
with
68 additions
and
2 deletions
+68
-2
arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
+32
-0
arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
+36
-2
No files found.
arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
View file @
c0550c4b
...
@@ -116,6 +116,38 @@ static struct imx_fb_videomode eukrea_mximxsd_modes[] = {
...
@@ -116,6 +116,38 @@ static struct imx_fb_videomode eukrea_mximxsd_modes[] = {
},
},
.
bpp
=
16
,
.
bpp
=
16
,
.
pcr
=
0xCAD08B80
,
.
pcr
=
0xCAD08B80
,
},
{
.
mode
=
{
.
name
=
"DVI-VGA"
,
.
refresh
=
60
,
.
xres
=
640
,
.
yres
=
480
,
.
pixclock
=
32000
,
.
hsync_len
=
7
,
.
left_margin
=
100
,
.
right_margin
=
100
,
.
vsync_len
=
7
,
.
upper_margin
=
7
,
.
lower_margin
=
100
,
},
.
pcr
=
0xFA208B80
,
.
bpp
=
16
,
},
{
.
mode
=
{
.
name
=
"DVI-SVGA"
,
.
refresh
=
60
,
.
xres
=
800
,
.
yres
=
600
,
.
pixclock
=
25000
,
.
hsync_len
=
7
,
.
left_margin
=
75
,
.
right_margin
=
75
,
.
vsync_len
=
7
,
.
upper_margin
=
7
,
.
lower_margin
=
75
,
},
.
pcr
=
0xFA208B80
,
.
bpp
=
16
,
},
},
};
};
...
...
arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
View file @
c0550c4b
...
@@ -49,7 +49,7 @@
...
@@ -49,7 +49,7 @@
static
const
struct
fb_videomode
fb_modedb
[]
=
{
static
const
struct
fb_videomode
fb_modedb
[]
=
{
{
{
.
name
=
"CMO
_
QVGA"
,
.
name
=
"CMO
-
QVGA"
,
.
refresh
=
60
,
.
refresh
=
60
,
.
xres
=
320
,
.
xres
=
320
,
.
yres
=
240
,
.
yres
=
240
,
...
@@ -64,6 +64,40 @@ static const struct fb_videomode fb_modedb[] = {
...
@@ -64,6 +64,40 @@ static const struct fb_videomode fb_modedb[] = {
.
vmode
=
FB_VMODE_NONINTERLACED
,
.
vmode
=
FB_VMODE_NONINTERLACED
,
.
flag
=
0
,
.
flag
=
0
,
},
},
{
.
name
=
"DVI-VGA"
,
.
refresh
=
60
,
.
xres
=
640
,
.
yres
=
480
,
.
pixclock
=
32000
,
.
left_margin
=
100
,
.
right_margin
=
100
,
.
upper_margin
=
7
,
.
lower_margin
=
100
,
.
hsync_len
=
7
,
.
vsync_len
=
7
,
.
sync
=
FB_SYNC_VERT_HIGH_ACT
|
FB_SYNC_HOR_HIGH_ACT
|
FB_SYNC_OE_ACT_HIGH
|
FB_SYNC_CLK_INVERT
,
.
vmode
=
FB_VMODE_NONINTERLACED
,
.
flag
=
0
,
},
{
.
name
=
"DVI-SVGA"
,
.
refresh
=
60
,
.
xres
=
800
,
.
yres
=
600
,
.
pixclock
=
25000
,
.
left_margin
=
75
,
.
right_margin
=
75
,
.
upper_margin
=
7
,
.
lower_margin
=
75
,
.
hsync_len
=
7
,
.
vsync_len
=
7
,
.
sync
=
FB_SYNC_VERT_HIGH_ACT
|
FB_SYNC_HOR_HIGH_ACT
|
FB_SYNC_OE_ACT_HIGH
|
FB_SYNC_CLK_INVERT
,
.
vmode
=
FB_VMODE_NONINTERLACED
,
.
flag
=
0
,
},
};
};
static
struct
ipu_platform_data
mx3_ipu_data
=
{
static
struct
ipu_platform_data
mx3_ipu_data
=
{
...
@@ -72,7 +106,7 @@ static struct ipu_platform_data mx3_ipu_data = {
...
@@ -72,7 +106,7 @@ static struct ipu_platform_data mx3_ipu_data = {
static
struct
mx3fb_platform_data
mx3fb_pdata
=
{
static
struct
mx3fb_platform_data
mx3fb_pdata
=
{
.
dma_dev
=
&
mx3_ipu
.
dev
,
.
dma_dev
=
&
mx3_ipu
.
dev
,
.
name
=
"CMO
_
QVGA"
,
.
name
=
"CMO
-
QVGA"
,
.
mode
=
fb_modedb
,
.
mode
=
fb_modedb
,
.
num_modes
=
ARRAY_SIZE
(
fb_modedb
),
.
num_modes
=
ARRAY_SIZE
(
fb_modedb
),
};
};
...
...
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