Commit c0d1a7bd authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'stm32-dt-for-v5.19-fixes-2' of...

Merge tag 'stm32-dt-for-v5.19-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/fixes

STM32 DT fixes for v5.19, round 2

Highlights:
-----------

 -Fixes STM32MP15:
  - Add missing usbh clock and fix clk order for usbh to avoid PLL
    issue.
  - Fix SCMI version: use scmi regulator and update missing SCMI
    clocks to be able to correcly boot.

* tag 'stm32-dt-for-v5.19-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  ARM: dts: stm32: add missing usbh clock and fix clk order on stm32mp15
  ARM: dts: stm32: delete fixed clock node on STM32MP15-SCMI
  ARM: dts: stm32: DSI should use LSE SCMI clock on DK1/ED1 STM32 board
  ARM: dts: stm32: use the correct clock source for CEC on stm32mp151
  ARM: dts: stm32: fix pwr regulators references to use scmi

Link: https://lore.kernel.org/r/1259e082-a3a4-96a5-ec9c-05dbb893a746@foss.st.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 0ec29ccf 1d0c1aad
...@@ -27,6 +27,37 @@ scmi_reset: protocol@16 { ...@@ -27,6 +27,37 @@ scmi_reset: protocol@16 {
reg = <0x16>; reg = <0x16>;
#reset-cells = <1>; #reset-cells = <1>;
}; };
scmi_voltd: protocol@17 {
reg = <0x17>;
scmi_reguls: regulators {
#address-cells = <1>;
#size-cells = <0>;
scmi_reg11: reg11@0 {
reg = <0>;
regulator-name = "reg11";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
};
scmi_reg18: reg18@1 {
voltd-name = "reg18";
reg = <1>;
regulator-name = "reg18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
scmi_usb33: usb33@2 {
reg = <2>;
regulator-name = "usb33";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
};
}; };
}; };
...@@ -45,3 +76,30 @@ scmi_shm: scmi-sram@0 { ...@@ -45,3 +76,30 @@ scmi_shm: scmi-sram@0 {
}; };
}; };
}; };
&reg11 {
status = "disabled";
};
&reg18 {
status = "disabled";
};
&usb33 {
status = "disabled";
};
&usbotg_hs {
usb33d-supply = <&scmi_usb33>;
};
&usbphyc {
vdda1v1-supply = <&scmi_reg11>;
vdda1v8-supply = <&scmi_reg18>;
};
/delete-node/ &clk_hse;
/delete-node/ &clk_hsi;
/delete-node/ &clk_lse;
/delete-node/ &clk_lsi;
/delete-node/ &clk_csi;
...@@ -565,7 +565,7 @@ cec: cec@40016000 { ...@@ -565,7 +565,7 @@ cec: cec@40016000 {
compatible = "st,stm32-cec"; compatible = "st,stm32-cec";
reg = <0x40016000 0x400>; reg = <0x40016000 0x400>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CEC_K>, <&clk_lse>; clocks = <&rcc CEC_K>, <&rcc CEC>;
clock-names = "cec", "hdmi-cec"; clock-names = "cec", "hdmi-cec";
status = "disabled"; status = "disabled";
}; };
...@@ -1474,7 +1474,7 @@ stmmac_axi_config_0: stmmac-axi-config { ...@@ -1474,7 +1474,7 @@ stmmac_axi_config_0: stmmac-axi-config {
usbh_ohci: usb@5800c000 { usbh_ohci: usb@5800c000 {
compatible = "generic-ohci"; compatible = "generic-ohci";
reg = <0x5800c000 0x1000>; reg = <0x5800c000 0x1000>;
clocks = <&rcc USBH>, <&usbphyc>; clocks = <&usbphyc>, <&rcc USBH>;
resets = <&rcc USBH_R>; resets = <&rcc USBH_R>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; status = "disabled";
...@@ -1483,7 +1483,7 @@ usbh_ohci: usb@5800c000 { ...@@ -1483,7 +1483,7 @@ usbh_ohci: usb@5800c000 {
usbh_ehci: usb@5800d000 { usbh_ehci: usb@5800d000 {
compatible = "generic-ehci"; compatible = "generic-ehci";
reg = <0x5800d000 0x1000>; reg = <0x5800d000 0x1000>;
clocks = <&rcc USBH>; clocks = <&usbphyc>, <&rcc USBH>;
resets = <&rcc USBH_R>; resets = <&rcc USBH_R>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
companion = <&usbh_ohci>; companion = <&usbh_ohci>;
......
...@@ -29,6 +29,10 @@ &cpu1 { ...@@ -29,6 +29,10 @@ &cpu1 {
clocks = <&scmi_clk CK_SCMI_MPU>; clocks = <&scmi_clk CK_SCMI_MPU>;
}; };
&dsi {
clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
};
&gpioz { &gpioz {
clocks = <&scmi_clk CK_SCMI_GPIOZ>; clocks = <&scmi_clk CK_SCMI_GPIOZ>;
}; };
......
...@@ -35,6 +35,7 @@ &cryp1 { ...@@ -35,6 +35,7 @@ &cryp1 {
}; };
&dsi { &dsi {
phy-dsi-supply = <&scmi_reg18>;
clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>; clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
}; };
......
...@@ -34,6 +34,10 @@ &cryp1 { ...@@ -34,6 +34,10 @@ &cryp1 {
resets = <&scmi_reset RST_SCMI_CRYP1>; resets = <&scmi_reset RST_SCMI_CRYP1>;
}; };
&dsi {
clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
};
&gpioz { &gpioz {
clocks = <&scmi_clk CK_SCMI_GPIOZ>; clocks = <&scmi_clk CK_SCMI_GPIOZ>;
}; };
......
...@@ -36,6 +36,7 @@ &cryp1 { ...@@ -36,6 +36,7 @@ &cryp1 {
}; };
&dsi { &dsi {
phy-dsi-supply = <&scmi_reg18>;
clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>; clocks = <&rcc DSI_K>, <&scmi_clk CK_SCMI_HSE>, <&rcc DSI_PX>;
}; };
......
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