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Commit c0fea064 authored by Ping-Ke Shih's avatar Ping-Ke Shih Committed by Kalle Valo
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wifi: rtw89: coex: send more hardware module info to firmware for 8851B 

8851B has various hardware module types, so BT coexistence in firmware
needs these information to make decision. Add them to make 8851B work
well.
Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Signed-off-by: default avatarKalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230412012831.10519-5-pkshih@realtek.com
parent 2380a220
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Showing with 75 additions and 107 deletions
drivers/net/wireless/realtek/rtw89/core.h
View file @ c0fea064
......@@ -959,6 +959,8 @@ struct rtw89_btc_ant_info {
u8 single_pos: 1;/* Single antenna at S0 or S1 */
u8 diversity: 1;
u8 btg_pos: 2;
u8 stream_cnt: 4;
};
enum rtw89_tfc_dir {
......@@ -1415,8 +1417,9 @@ struct rtw89_btc_module {
u8 bt_solo: 1;
u8 bt_pos: 1;
u8 switch_type: 1;
u8 wa_type: 3;
u8 rsvd;
u8 kt_ver_adie;
};
#define RTW89_BTC_DM_MAXSTEP 30
......
drivers/net/wireless/realtek/rtw89/fw.c
View file @ c0fea064
......@@ -1924,8 +1924,6 @@ int rtw89_fw_h2c_ra(struct rtw89_dev *rtwdev, struct rtw89_ra_info *ra, bool csi
return ret;
}
#define H2C_LEN_CXDRVHDR 2
#define H2C_LEN_CXDRVINFO_INIT (12 + H2C_LEN_CXDRVHDR)
int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev)
{
struct rtw89_btc *btc = &rtwdev->btc;
......@@ -1933,44 +1931,52 @@ int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev)
struct rtw89_btc_init_info *init_info = &dm->init_info;
struct rtw89_btc_module *module = &init_info->module;
struct rtw89_btc_ant_info *ant = &module->ant;
struct rtw89_h2c_cxinit *h2c;
u32 len = sizeof(*h2c);
struct sk_buff *skb;
u8 *cmd;
int ret;
skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_INIT);
skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len);
if (!skb) {
rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_init\n");
return -ENOMEM;
}
skb_put(skb, H2C_LEN_CXDRVINFO_INIT);
cmd = skb->data;
RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_INIT);
RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_INIT - H2C_LEN_CXDRVHDR);
RTW89_SET_FWCMD_CXINIT_ANT_TYPE(cmd, ant->type);
RTW89_SET_FWCMD_CXINIT_ANT_NUM(cmd, ant->num);
RTW89_SET_FWCMD_CXINIT_ANT_ISO(cmd, ant->isolation);
RTW89_SET_FWCMD_CXINIT_ANT_POS(cmd, ant->single_pos);
RTW89_SET_FWCMD_CXINIT_ANT_DIVERSITY(cmd, ant->diversity);
RTW89_SET_FWCMD_CXINIT_MOD_RFE(cmd, module->rfe_type);
RTW89_SET_FWCMD_CXINIT_MOD_CV(cmd, module->cv);
RTW89_SET_FWCMD_CXINIT_MOD_BT_SOLO(cmd, module->bt_solo);
RTW89_SET_FWCMD_CXINIT_MOD_BT_POS(cmd, module->bt_pos);
RTW89_SET_FWCMD_CXINIT_MOD_SW_TYPE(cmd, module->switch_type);
RTW89_SET_FWCMD_CXINIT_WL_GCH(cmd, init_info->wl_guard_ch);
RTW89_SET_FWCMD_CXINIT_WL_ONLY(cmd, init_info->wl_only);
RTW89_SET_FWCMD_CXINIT_WL_INITOK(cmd, init_info->wl_init_ok);
RTW89_SET_FWCMD_CXINIT_DBCC_EN(cmd, init_info->dbcc_en);
RTW89_SET_FWCMD_CXINIT_CX_OTHER(cmd, init_info->cx_other);
RTW89_SET_FWCMD_CXINIT_BT_ONLY(cmd, init_info->bt_only);
skb_put(skb, len);
h2c = (struct rtw89_h2c_cxinit *)skb->data;
h2c->hdr.type = CXDRVINFO_INIT;
h2c->hdr.len = len - H2C_LEN_CXDRVHDR;
h2c->ant_type = ant->type;
h2c->ant_num = ant->num;
h2c->ant_iso = ant->isolation;
h2c->ant_info =
u8_encode_bits(ant->single_pos, RTW89_H2C_CXINIT_ANT_INFO_POS) |
u8_encode_bits(ant->diversity, RTW89_H2C_CXINIT_ANT_INFO_DIVERSITY) |
u8_encode_bits(ant->btg_pos, RTW89_H2C_CXINIT_ANT_INFO_BTG_POS) |
u8_encode_bits(ant->stream_cnt, RTW89_H2C_CXINIT_ANT_INFO_STREAM_CNT);
h2c->mod_rfe = module->rfe_type;
h2c->mod_cv = module->cv;
h2c->mod_info =
u8_encode_bits(module->bt_solo, RTW89_H2C_CXINIT_MOD_INFO_BT_SOLO) |
u8_encode_bits(module->bt_pos, RTW89_H2C_CXINIT_MOD_INFO_BT_POS) |
u8_encode_bits(module->switch_type, RTW89_H2C_CXINIT_MOD_INFO_SW_TYPE) |
u8_encode_bits(module->wa_type, RTW89_H2C_CXINIT_MOD_INFO_WA_TYPE);
h2c->mod_adie_kt = module->kt_ver_adie;
h2c->wl_gch = init_info->wl_guard_ch;
h2c->info =
u8_encode_bits(init_info->wl_only, RTW89_H2C_CXINIT_INFO_WL_ONLY) |
u8_encode_bits(init_info->wl_init_ok, RTW89_H2C_CXINIT_INFO_WL_INITOK) |
u8_encode_bits(init_info->dbcc_en, RTW89_H2C_CXINIT_INFO_DBCC_EN) |
u8_encode_bits(init_info->cx_other, RTW89_H2C_CXINIT_INFO_CX_OTHER) |
u8_encode_bits(init_info->bt_only, RTW89_H2C_CXINIT_INFO_BT_ONLY);
rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C,
H2C_CAT_OUTSRC, BTFC_SET,
SET_DRV_INFO, 0, 0,
H2C_LEN_CXDRVINFO_INIT);
len);
ret = rtw89_h2c_tx(rtwdev, skb, false);
if (ret) {
......
drivers/net/wireless/realtek/rtw89/fw.h
View file @ c0fea064
......@@ -2197,85 +2197,44 @@ static inline void RTW89_SET_FWCMD_CXHDR_LEN(void *cmd, u8 val)
u8p_replace_bits((u8 *)(cmd) + 1, val, GENMASK(7, 0));
}
static inline void RTW89_SET_FWCMD_CXINIT_ANT_TYPE(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 2, val, GENMASK(7, 0));
}
static inline void RTW89_SET_FWCMD_CXINIT_ANT_NUM(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 3, val, GENMASK(7, 0));
}
static inline void RTW89_SET_FWCMD_CXINIT_ANT_ISO(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 4, val, GENMASK(7, 0));
}
static inline void RTW89_SET_FWCMD_CXINIT_ANT_POS(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 5, val, BIT(0));
}
static inline void RTW89_SET_FWCMD_CXINIT_ANT_DIVERSITY(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 5, val, BIT(1));
}
static inline void RTW89_SET_FWCMD_CXINIT_MOD_RFE(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 6, val, GENMASK(7, 0));
}
static inline void RTW89_SET_FWCMD_CXINIT_MOD_CV(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 7, val, GENMASK(7, 0));
}
static inline void RTW89_SET_FWCMD_CXINIT_MOD_BT_SOLO(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 8, val, BIT(0));
}
static inline void RTW89_SET_FWCMD_CXINIT_MOD_BT_POS(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 8, val, BIT(1));
}
static inline void RTW89_SET_FWCMD_CXINIT_MOD_SW_TYPE(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 8, val, BIT(2));
}
static inline void RTW89_SET_FWCMD_CXINIT_WL_GCH(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 10, val, GENMASK(7, 0));
}
static inline void RTW89_SET_FWCMD_CXINIT_WL_ONLY(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(0));
}
static inline void RTW89_SET_FWCMD_CXINIT_WL_INITOK(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(1));
}
static inline void RTW89_SET_FWCMD_CXINIT_DBCC_EN(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(2));
}
struct rtw89_h2c_cxhdr {
u8 type;
u8 len;
} __packed;
static inline void RTW89_SET_FWCMD_CXINIT_CX_OTHER(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(3));
}
#define H2C_LEN_CXDRVHDR sizeof(struct rtw89_h2c_cxhdr)
struct rtw89_h2c_cxinit {
struct rtw89_h2c_cxhdr hdr;
u8 ant_type;
u8 ant_num;
u8 ant_iso;
u8 ant_info;
u8 mod_rfe;
u8 mod_cv;
u8 mod_info;
u8 mod_adie_kt;
u8 wl_gch;
u8 info;
u8 rsvd;
u8 rsvd1;
} __packed;
static inline void RTW89_SET_FWCMD_CXINIT_BT_ONLY(void *cmd, u8 val)
{
u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(4));
}
#define RTW89_H2C_CXINIT_ANT_INFO_POS BIT(0)
#define RTW89_H2C_CXINIT_ANT_INFO_DIVERSITY BIT(1)
#define RTW89_H2C_CXINIT_ANT_INFO_BTG_POS GENMASK(3, 2)
#define RTW89_H2C_CXINIT_ANT_INFO_STREAM_CNT GENMASK(7, 4)
#define RTW89_H2C_CXINIT_MOD_INFO_BT_SOLO BIT(0)
#define RTW89_H2C_CXINIT_MOD_INFO_BT_POS BIT(1)
#define RTW89_H2C_CXINIT_MOD_INFO_SW_TYPE BIT(2)
#define RTW89_H2C_CXINIT_MOD_INFO_WA_TYPE GENMASK(5, 3)
#define RTW89_H2C_CXINIT_INFO_WL_ONLY BIT(0)
#define RTW89_H2C_CXINIT_INFO_WL_INITOK BIT(1)
#define RTW89_H2C_CXINIT_INFO_DBCC_EN BIT(2)
#define RTW89_H2C_CXINIT_INFO_CX_OTHER BIT(3)
#define RTW89_H2C_CXINIT_INFO_BT_ONLY BIT(4)
static inline void RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(void *cmd, u8 val)
{
......
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