Commit c177f46d authored by Miles Bader's avatar Miles Bader Committed by Linus Torvalds

[PATCH] Update v850 config/makefile

This updates the v850 Kconfig and kernel/Makefile to reflect preceding
changes.
parent 46c37639
...@@ -48,20 +48,24 @@ menu "Processor type and features" ...@@ -48,20 +48,24 @@ menu "Processor type and features"
choice choice
prompt "Platform" prompt "Platform"
default GDB default GDB
config V850E_SIM
bool "GDB"
config RTE_CB_MA1 config RTE_CB_MA1
bool "RTE-V850E/MA1-CB" bool "RTE-V850E/MA1-CB"
config RTE_CB_NB85E config RTE_CB_NB85E
bool "RTE-V850E/NB85E-CB" bool "RTE-V850E/NB85E-CB"
config V850E_SIM config RTE_CB_ME2
bool "GDB" bool "RTE-V850E/ME2-CB"
config V850E_AS85EP1
bool "AS85EP1"
config V850E2_SIM85E2C config V850E2_SIM85E2C
bool "sim85e2c" bool "sim85e2c"
config V850E2_SIM85E2S
bool "sim85e2s"
config V850E2_FPGA85E2C config V850E2_FPGA85E2C
bool "NA85E2C-FPGA" bool "NA85E2C-FPGA"
config V850E2_ANNA config V850E2_ANNA
bool "Anna" bool "Anna"
config V850E_AS85EP1
bool "AS85EP1"
endchoice endchoice
...@@ -78,41 +82,32 @@ menu "Processor type and features" ...@@ -78,41 +82,32 @@ menu "Processor type and features"
bool bool
depends RTE_CB_MA1 depends RTE_CB_MA1
default y default y
# Similarly for the RTE-V850E/MA1-CB - V850E/TEG # Similarly for the RTE-V850E/NB85E-CB - V850E/TEG
config V850E_TEG config V850E_TEG
bool bool
depends RTE_CB_NB85E depends RTE_CB_NB85E
default y default y
# ... and the RTE-V850E/ME2-CB - V850E/ME2
# NB85E processor core config V850E_ME2
config V850E_NB85E
bool bool
depends V850E_MA1 || V850E_TEG depends RTE_CB_ME2
default y default y
config V850E_MA1_HIGHRES_TIMER
bool "High resolution timer support"
depends V850E_MA1
#### V850E2 processor-specific config #### sim85e2-specific config
# V850E2 processors config V850E2_SIM85E2
config V850E2
bool bool
depends V850E2_SIM85E2C || V850E2_FPGA85E2C || V850E2_ANNA depends V850E2_SIM85E2C || V850E2_SIM85E2S
default y default y
# Processors based on the NA85E2A core
config V850E2_NA85E2A
bool
depends V850E2_ANNA
default y
# Processors based on the NA85E2C core #### V850E2 processor-specific config
config V850E2_NA85E2C
# V850E2 processors
config V850E2
bool bool
depends V850E2_SIM85E2C || V850E2_FPGA85E2C depends V850E2_SIM85E2 || V850E2_FPGA85E2C || V850E2_ANNA
default y default y
...@@ -121,7 +116,7 @@ menu "Processor type and features" ...@@ -121,7 +116,7 @@ menu "Processor type and features"
# Boards in the RTE-x-CB series # Boards in the RTE-x-CB series
config RTE_CB config RTE_CB
bool bool
depends RTE_CB_MA1 || RTE_CB_NB85E depends RTE_CB_MA1 || RTE_CB_NB85E || RTE_CB_ME2
default y default y
config RTE_CB_MULTI config RTE_CB_MULTI
...@@ -129,7 +124,7 @@ menu "Processor type and features" ...@@ -129,7 +124,7 @@ menu "Processor type and features"
# RTE_CB_NB85E can either have multi ROM support or not, but # RTE_CB_NB85E can either have multi ROM support or not, but
# other platforms (currently only RTE_CB_MA1) require it. # other platforms (currently only RTE_CB_MA1) require it.
prompt "Multi monitor ROM support" if RTE_CB_NB85E prompt "Multi monitor ROM support" if RTE_CB_NB85E
depends RTE_CB depends RTE_CB_MA1 || RTE_CB_NB85E
default y default y
config RTE_CB_MULTI_DBTRAP config RTE_CB_MULTI_DBTRAP
...@@ -156,14 +151,42 @@ menu "Processor type and features" ...@@ -156,14 +151,42 @@ menu "Processor type and features"
# The only PCI bus we support is on the RTE-MOTHER-A board # The only PCI bus we support is on the RTE-MOTHER-A board
config PCI config PCI
bool bool
default y if RTE_MB_A_PCI default RTE_MB_A_PCI
#### Some feature-specific configs
# Everything except for the GDB simulator uses the same interrupt controller
config V850E_INTC
bool
default !V850E_SIM
# Everything except for the various simulators uses the "Timer D" unit
config V850E_TIMER_D
bool
default !V850E_SIM && !V850E2_SIM85E2
# Cache control used on some v850e1 processors
config V850E_CACHE
bool
default V850E_TEG || V850E_ME2
# Cache control used on v850e2 processors; I think this should
# actually apply to more, but currently only the SIM85E2S uses it
config V850E2_CACHE
bool
default V850E2_SIM85E2S
config NO_CACHE
bool
default !V850E_CACHE && !V850E2_CACHE
#### Misc config #### Misc config
config ROM_KERNEL config ROM_KERNEL
bool "Kernel in ROM" bool "Kernel in ROM"
depends V850E2_ANNA || (RTE_CB && !RTE_CB_MULTI) depends V850E2_ANNA || V850E_AS85EP1 || RTE_CB_ME2
# Some platforms pre-zero memory, in which case the kernel doesn't need to # Some platforms pre-zero memory, in which case the kernel doesn't need to
config ZERO_BSS config ZERO_BSS
...@@ -177,9 +200,12 @@ menu "Processor type and features" ...@@ -177,9 +200,12 @@ menu "Processor type and features"
int int
default 8 if V850E2_SIM85E2C || V850E2_FPGA85E2C default 8 if V850E2_SIM85E2C || V850E2_FPGA85E2C
config V850E_HIGHRES_TIMER
bool "High resolution timer support"
depends V850E_TIMER_D
config TIME_BOOTUP config TIME_BOOTUP
bool "Time bootup" bool "Time bootup"
depends V850E_MA1_HIGHRES_TIMER depends V850E_HIGHRES_TIMER
config RESET_GUARD config RESET_GUARD
bool "Reset Guard" bool "Reset Guard"
...@@ -241,6 +267,7 @@ config KCORE_AOUT ...@@ -241,6 +267,7 @@ config KCORE_AOUT
default y default y
config KCORE_ELF config KCORE_ELF
bool
default y default y
source "fs/Kconfig.binfmt" source "fs/Kconfig.binfmt"
......
...@@ -15,24 +15,26 @@ obj-y += intv.o entry.o process.o syscalls.o time.o semaphore.o setup.o \ ...@@ -15,24 +15,26 @@ obj-y += intv.o entry.o process.o syscalls.o time.o semaphore.o setup.o \
signal.o irq.o mach.o ptrace.o bug.o signal.o irq.o mach.o ptrace.o bug.o
obj-$(CONFIG_MODULES) += module.o v850_ksyms.o obj-$(CONFIG_MODULES) += module.o v850_ksyms.o
# chip-specific code # chip-specific code
obj-$(CONFIG_V850E_NB85E) += nb85e_intc.o obj-$(CONFIG_V850E_MA1) += ma.o
obj-$(CONFIG_V850E_MA1) += ma.o nb85e_utils.o nb85e_timer_d.o obj-$(CONFIG_V850E_ME2) += me2.o
obj-$(CONFIG_V850E_TEG) += teg.o nb85e_utils.o nb85e_cache.o \ obj-$(CONFIG_V850E_TEG) += teg.o
nb85e_timer_d.o obj-$(CONFIG_V850E_AS85EP1) += as85ep1.o
obj-$(CONFIG_V850E2_ANNA) += anna.o nb85e_intc.o nb85e_utils.o \ obj-$(CONFIG_V850E2_ANNA) += anna.o
nb85e_timer_d.o
obj-$(CONFIG_V850E_AS85EP1) += as85ep1.o nb85e_intc.o nb85e_utils.o \
nb85e_timer_d.o
# platform-specific code # platform-specific code
obj-$(CONFIG_V850E_SIM) += sim.o simcons.o obj-$(CONFIG_V850E_SIM) += sim.o simcons.o
obj-$(CONFIG_V850E2_SIM85E2C) += sim85e2c.o nb85e_intc.o memcons.o obj-$(CONFIG_V850E2_SIM85E2) += sim85e2.o memcons.o
obj-$(CONFIG_V850E2_FPGA85E2C) += fpga85e2c.o nb85e_intc.o memcons.o obj-$(CONFIG_V850E2_FPGA85E2C) += fpga85e2c.o memcons.o
obj-$(CONFIG_RTE_CB) += rte_cb.o rte_cb_leds.o obj-$(CONFIG_RTE_CB) += rte_cb.o rte_cb_leds.o
obj-$(CONFIG_RTE_CB_MA1) += rte_ma1_cb.o obj-$(CONFIG_RTE_CB_MA1) += rte_ma1_cb.o
obj-$(CONFIG_RTE_CB_ME2) += rte_me2_cb.o
obj-$(CONFIG_RTE_CB_NB85E) += rte_nb85e_cb.o obj-$(CONFIG_RTE_CB_NB85E) += rte_nb85e_cb.o
obj-$(CONFIG_RTE_CB_MULTI) += rte_cb_multi.o obj-$(CONFIG_RTE_CB_MULTI) += rte_cb_multi.o
obj-$(CONFIG_RTE_MB_A_PCI) += rte_mb_a_pci.o obj-$(CONFIG_RTE_MB_A_PCI) += rte_mb_a_pci.o
obj-$(CONFIG_RTE_GBUS_INT) += gbus_int.o obj-$(CONFIG_RTE_GBUS_INT) += gbus_int.o
# feature-specific code # feature-specific code
obj-$(CONFIG_V850E_MA1_HIGHRES_TIMER) += highres_timer.o obj-$(CONFIG_V850E_INTC) += v850e_intc.o
obj-$(CONFIG_V850E_TIMER_D) += v850e_timer_d.o v850e_utils.o
obj-$(CONFIG_V850E_CACHE) += v850e_cache.o
obj-$(CONFIG_V850E2_CACHE) += v850e2_cache.o
obj-$(CONFIG_V850E_HIGHRES_TIMER) += highres_timer.o
obj-$(CONFIG_PROC_FS) += procfs.o obj-$(CONFIG_PROC_FS) += procfs.o
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