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Commit c198ff87 authored by James Simmons's avatar James Simmons
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Merge maxwell.earthlink.net:/usr/src/linus-2.5 

into maxwell.earthlink.net:/usr/src/fbdev-2.5
parents d07f16f6 e2a6cbc0
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Showing with 1505 additions and 516 deletions
arch/i386/kernel/Makefile
View file @ c198ff87
......@@ -29,6 +29,7 @@ obj-$(CONFIG_X86_NUMAQ) += numaq.o
obj-$(CONFIG_PROFILING) += profile.o
obj-$(CONFIG_EDD) += edd.o
obj-$(CONFIG_MODULES) += module.o
obj-y += sysenter.o
EXTRA_AFLAGS := -traditional
......
arch/i386/kernel/entry.S
View file @ c198ff87
......@@ -94,7 +94,7 @@ VM_MASK = 0x00020000
movl %edx, %ds; \
movl %edx, %es;
#define RESTORE_ALL \
#define RESTORE_REGS \
popl %ebx; \
popl %ecx; \
popl %edx; \
......@@ -104,14 +104,25 @@ VM_MASK = 0x00020000
popl %eax; \
1: popl %ds; \
2: popl %es; \
addl $4, %esp; \
3: iret; \
.section .fixup,"ax"; \
4: movl $0,(%esp); \
3: movl $0,(%esp); \
jmp 1b; \
5: movl $0,(%esp); \
4: movl $0,(%esp); \
jmp 2b; \
6: pushl %ss; \
.previous; \
.section __ex_table,"a";\
.align 4; \
.long 1b,3b; \
.long 2b,4b; \
.previous
#define RESTORE_ALL \
RESTORE_REGS \
addl $4, %esp; \
1: iret; \
.section .fixup,"ax"; \
2: pushl %ss; \
popl %ds; \
pushl %ss; \
popl %es; \
......@@ -120,11 +131,11 @@ VM_MASK = 0x00020000
.previous; \
.section __ex_table,"a";\
.align 4; \
.long 1b,4b; \
.long 2b,5b; \
.long 3b,6b; \
.long 1b,2b; \
.previous
ENTRY(lcall7)
pushfl # We get a different stack layout with call
# gates, which has to be cleaned up later..
......@@ -220,6 +231,40 @@ need_resched:
jmp need_resched
#endif
/* Points to after the "sysenter" instruction in the vsyscall page */
#define SYSENTER_RETURN 0xfffff007
# sysenter call handler stub
ALIGN
ENTRY(sysenter_entry)
sti
pushl $(__USER_DS)
pushl %ebp
pushfl
pushl $(__USER_CS)
pushl $SYSENTER_RETURN
pushl %eax
SAVE_ALL
GET_THREAD_INFO(%ebx)
cmpl $(NR_syscalls), %eax
jae syscall_badsys
testb $_TIF_SYSCALL_TRACE,TI_FLAGS(%ebx)
jnz syscall_trace_entry
call *sys_call_table(,%eax,4)
movl %eax,EAX(%esp)
cli
movl TI_FLAGS(%ebx), %ecx
testw $_TIF_ALLWORK_MASK, %cx
jne syscall_exit_work
RESTORE_REGS
movl 4(%esp),%edx
movl 16(%esp),%ecx
sti
sysexit
# system call handler stub
ALIGN
ENTRY(system_call)
......
arch/i386/kernel/head.S
View file @ c198ff87
......@@ -414,8 +414,8 @@ ENTRY(cpu_gdt_table)
.quad 0x0000000000000000 /* 0x0b reserved */
.quad 0x0000000000000000 /* 0x13 reserved */
.quad 0x0000000000000000 /* 0x1b reserved */
.quad 0x00cffa000000ffff /* 0x23 user 4GB code at 0x00000000 */
.quad 0x00cff2000000ffff /* 0x2b user 4GB data at 0x00000000 */
.quad 0x0000000000000000 /* 0x20 unused */
.quad 0x0000000000000000 /* 0x28 unused */
.quad 0x0000000000000000 /* 0x33 TLS entry 1 */
.quad 0x0000000000000000 /* 0x3b TLS entry 2 */
.quad 0x0000000000000000 /* 0x43 TLS entry 3 */
......@@ -425,22 +425,25 @@ ENTRY(cpu_gdt_table)
.quad 0x00cf9a000000ffff /* 0x60 kernel 4GB code at 0x00000000 */
.quad 0x00cf92000000ffff /* 0x68 kernel 4GB data at 0x00000000 */
.quad 0x0000000000000000 /* 0x70 TSS descriptor */
.quad 0x0000000000000000 /* 0x78 LDT descriptor */
.quad 0x00cffa000000ffff /* 0x73 user 4GB code at 0x00000000 */
.quad 0x00cff2000000ffff /* 0x7b user 4GB data at 0x00000000 */
.quad 0x0000000000000000 /* 0x80 TSS descriptor */
.quad 0x0000000000000000 /* 0x88 LDT descriptor */
/* Segments used for calling PnP BIOS */
.quad 0x00c09a0000000000 /* 0x80 32-bit code */
.quad 0x00809a0000000000 /* 0x88 16-bit code */
.quad 0x0080920000000000 /* 0x90 16-bit data */
.quad 0x0080920000000000 /* 0x98 16-bit data */
.quad 0x00c09a0000000000 /* 0x90 32-bit code */
.quad 0x00809a0000000000 /* 0x98 16-bit code */
.quad 0x0080920000000000 /* 0xa0 16-bit data */
.quad 0x0080920000000000 /* 0xa8 16-bit data */
.quad 0x0080920000000000 /* 0xb0 16-bit data */
/*
* The APM segments have byte granularity and their bases
* and limits are set at run time.
*/
.quad 0x00409a0000000000 /* 0xa8 APM CS code */
.quad 0x00009a0000000000 /* 0xb0 APM CS 16 code (16 bit) */
.quad 0x0040920000000000 /* 0xb8 APM DS data */
.quad 0x00409a0000000000 /* 0xb8 APM CS code */
.quad 0x00009a0000000000 /* 0xc0 APM CS 16 code (16 bit) */
.quad 0x0040920000000000 /* 0xc8 APM DS data */
#if CONFIG_SMP
.fill (NR_CPUS-1)*GDT_ENTRIES,8,0 /* other CPU's GDT */
......
arch/i386/kernel/sysenter.c 0 → 100644
View file @ c198ff87
/*
* linux/arch/i386/kernel/sysenter.c
*
* (C) Copyright 2002 Linus Torvalds
*
* This file contains the needed initializations to support sysenter.
*/
#include <linux/init.h>
#include <linux/smp.h>
#include <linux/thread_info.h>
#include <linux/gfp.h>
#include <linux/string.h>
#include <asm/cpufeature.h>
#include <asm/msr.h>
#include <asm/pgtable.h>
extern asmlinkage void sysenter_entry(void);
static void __init enable_sep_cpu(void *info)
{
unsigned long page = __get_free_page(GFP_ATOMIC);
int cpu = get_cpu();
unsigned long *esp0_ptr = &(init_tss + cpu)->esp0;
unsigned long rel32;
rel32 = (unsigned long) sysenter_entry - (page+11);
*(short *) (page+0) = 0x258b; /* movl xxxxx,%esp */
*(long **) (page+2) = esp0_ptr;
*(char *) (page+6) = 0xe9; /* jmp rl32 */
*(long *) (page+7) = rel32;
wrmsr(0x174, __KERNEL_CS, 0); /* SYSENTER_CS_MSR */
wrmsr(0x175, page+PAGE_SIZE, 0); /* SYSENTER_ESP_MSR */
wrmsr(0x176, page, 0); /* SYSENTER_EIP_MSR */
printk("Enabling SEP on CPU %d\n", cpu);
put_cpu();
}
static int __init sysenter_setup(void)
{
static const char int80[] = {
0xcd, 0x80, /* int $0x80 */
0xc3 /* ret */
};
static const char sysent[] = {
0x55, /* push %ebp */
0x51, /* push %ecx */
0x52, /* push %edx */
0x89, 0xe5, /* movl %esp,%ebp */
0x0f, 0x34, /* sysenter */
0x5a, /* pop %edx */
0x59, /* pop %ecx */
0x5d, /* pop %ebp */
0xc3 /* ret */
};
unsigned long page = get_zeroed_page(GFP_ATOMIC);
__set_fixmap(FIX_VSYSCALL, __pa(page), PAGE_READONLY);
memcpy((void *) page, int80, sizeof(int80));
if (!boot_cpu_has(X86_FEATURE_SEP))
return 0;
memcpy((void *) page, sysent, sizeof(sysent));
enable_sep_cpu(NULL);
smp_call_function(enable_sep_cpu, NULL, 1, 1);
return 0;
}
__initcall(sysenter_setup);
arch/i386/mm/init.c
View file @ c198ff87
......@@ -72,7 +72,7 @@ static pmd_t * __init one_md_table_init(pgd_t *pgd)
static pte_t * __init one_page_table_init(pmd_t *pmd)
{
pte_t *page_table = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE);
set_pmd(pmd, __pmd(__pa(page_table) | _KERNPG_TABLE));
set_pmd(pmd, __pmd(__pa(page_table) | _PAGE_TABLE));
if (page_table != pte_offset_kernel(pmd, 0))
BUG();
......
drivers/char/agp/Kconfig
View file @ c198ff87
......@@ -29,8 +29,11 @@ config AGP_GART
bool "/dev/agpgart (AGP Support)"
depends on GART_IOMMU
config AGP3
bool "AGP 3.0 compliance (EXPERIMENTAL)"
config AGP_INTEL
bool "Intel 440LX/BX/GX and I815/I820/I830M/I830MP/I840/I845/I850/I860 support"
tristate "Intel 440LX/BX/GX and I815/I820/I830M/I830MP/I840/I845/I850/I860 support"
depends on AGP
help
This option gives you AGP support for the GLX component of the
......@@ -40,7 +43,7 @@ config AGP_INTEL
use GLX or DRI. If unsure, say N.
#config AGP_I810
# bool "Intel I810/I815/I830M (on-board) support"
# tristate "Intel I810/I815/I830M (on-board) support"
# depends on AGP
# help
# This option gives you AGP support for the Xserver on the Intel 810
......@@ -48,7 +51,7 @@ config AGP_INTEL
# is required to do any useful video modes with these boards.
config AGP_VIA
bool "VIA chipset support"
tristate "VIA chipset support"
depends on AGP
help
This option gives you AGP support for the GLX component of the
......@@ -58,7 +61,7 @@ config AGP_VIA
use GLX or DRI. If unsure, say N.
config AGP_AMD
bool "AMD Irongate, 761, and 762 support"
tristate "AMD Irongate, 761, and 762 support"
depends on AGP
help
This option gives you AGP support for the GLX component of the
......@@ -68,7 +71,7 @@ config AGP_AMD
use GLX or DRI. If unsure, say N.
config AGP_SIS
bool "Generic SiS support"
tristate "Generic SiS support"
depends on AGP
help
This option gives you AGP support for the GLX component of the "soon
......@@ -81,7 +84,7 @@ config AGP_SIS
use GLX or DRI. If unsure, say N.
config AGP_ALI
bool "ALI chipset support"
tristate "ALI chipset support"
depends on AGP
---help---
This option gives you AGP support for the GLX component of the
......@@ -99,14 +102,14 @@ config AGP_ALI
use GLX or DRI. If unsure, say N.
config AGP_SWORKS
bool "Serverworks LE/HE support"
tristate "Serverworks LE/HE support"
depends on AGP
help
Say Y here to support the Serverworks AGP card. See
<http://www.serverworks.com/> for product descriptions and images.
config AGP_AMD_8151
bool "AMD 8151 support"
tristate "AMD 8151 support"
depends on AGP
default GART_IOMMU
help
......@@ -114,16 +117,28 @@ config AGP_AMD_8151
GART on the AMD Athlon64/Opteron ("Hammer") CPUs.
config AGP_I460
bool "Intel 460GX support"
tristate "Intel 460GX support"
depends on AGP && IA64
help
This option gives you AGP GART support for the Intel 460GX chipset
for IA64 processors.
config AGP_HP_ZX1
bool "HP ZX1 AGP support"
tristate "HP ZX1 AGP support"
depends on AGP && IA64
help
This option gives you AGP GART support for the HP ZX1 chipset
for IA64 processors.
# Put AGP 3.0 entries below here.
config AGP_I7505
tristate "Intel 7205/7505 support (AGP 3.0)"
depends on AGP3
help
This option gives you AGP support for the GLX component of the
XFree86 4.x on Intel I7505 chipsets.
You should say Y here if you use XFree86 3.3.6 or 4.x and want to
use GLX or DRI. If unsure, say N
drivers/char/agp/Makefile
View file @ c198ff87
......@@ -8,6 +8,7 @@ export-objs := backend.o
agpgart-y := backend.o frontend.o generic.o
agpgart-objs := $(agpgart-y)
obj-$(CONFIG_AGP) += agpgart.o
obj-$(CONFIG_AGP3) += generic-3.0.o
obj-$(CONFIG_AGP_INTEL) += intel-agp.o
obj-$(CONFIG_AGP_VIA) += via-agp.o
......@@ -19,3 +20,5 @@ obj-$(CONFIG_AGP_I460) += i460-agp.o
obj-$(CONFIG_AGP_HP_ZX1) += hp-agp.o
obj-$(CONFIG_AGP_AMD_8151) += amd-k8-agp.o
obj-$(CONFIG_AGP_I7x05) += i7x05-agp.o
drivers/char/agp/agp.h
View file @ c198ff87
......@@ -46,28 +46,6 @@ int agp_generic_suspend(void);
void agp_generic_resume(void);
void agp_free_key(int key);
/* chipset specific init routines. */
/*
int __init ali_generic_setup (struct pci_dev *pdev);
int __init amd_irongate_setup (struct pci_dev *pdev);
int __init amd_8151_setup (struct pci_dev *pdev);
int __init hp_zx1_setup (struct pci_dev *pdev);
int __init intel_i460_setup (struct pci_dev *pdev);
int __init intel_generic_setup (struct pci_dev *pdev);
int __init intel_i810_setup(struct pci_dev *i810_dev);
int __init intel_815_setup(struct pci_dev *pdev);
int __init intel_i830_setup(struct pci_dev *i830_dev);
int __init intel_820_setup (struct pci_dev *pdev);
int __init intel_830mp_setup (struct pci_dev *pdev);
int __init intel_840_setup (struct pci_dev *pdev);
int __init intel_845_setup (struct pci_dev *pdev);
int __init intel_850_setup (struct pci_dev *pdev);
int __init intel_860_setup (struct pci_dev *pdev);
int __init serverworks_setup (struct pci_dev *pdev);
int __init sis_generic_setup (struct pci_dev *pdev);
int __init via_generic_setup (struct pci_dev *pdev);
*/
#define PFX "agpgart: "
int agp_register_driver (struct pci_dev *dev);
......
drivers/char/agp/amd-k7-agp.c
View file @ c198ff87
......@@ -138,8 +138,8 @@ static int amd_create_gatt_table(void)
return retval;
}
agp_bridge.gatt_table_real = (u32 *)page_dir.real;
agp_bridge.gatt_table = (u32 *)page_dir.remapped;
agp_bridge.gatt_table_real = (unsigned long *)page_dir.real;
agp_bridge.gatt_table = (unsigned long *)page_dir.remapped;
agp_bridge.gatt_bus_addr = virt_to_phys(page_dir.real);
/* Get the address for the gart region.
......@@ -165,8 +165,8 @@ static int amd_free_gatt_table(void)
{
struct amd_page_map page_dir;
page_dir.real = (u32 *)agp_bridge.gatt_table_real;
page_dir.remapped = (u32 *)agp_bridge.gatt_table;
page_dir.real = (unsigned long *)agp_bridge.gatt_table_real;
page_dir.remapped = (unsigned long *)agp_bridge.gatt_table;
amd_free_gatt_pages();
amd_free_page_map(&page_dir);
......
drivers/char/agp/amd-k8-agp.c
View file @ c198ff87
......@@ -151,7 +151,7 @@ static int amd_x86_64_fetch_size(void)
}
static void inline flush_x86_64_tlb(struct pci_dev *dev)
static void flush_x86_64_tlb(struct pci_dev *dev)
{
u32 tmp;
......
drivers/char/agp/backend.c
View file @ c198ff87
......@@ -36,8 +36,11 @@
#include <linux/agp_backend.h>
#include "agp.h"
#define AGPGART_VERSION_MAJOR 1
#define AGPGART_VERSION_MINOR 0
/* Due to XFree86 brain-damage, we can't go to 1.0 until they
* fix some real stupidity. It's only by chance we can bump
* past 0.99 at all due to some boolean logic error. */
#define AGPGART_VERSION_MAJOR 0
#define AGPGART_VERSION_MINOR 100
struct agp_bridge_data agp_bridge = { .type = NOT_SUPPORTED };
......@@ -258,7 +261,7 @@ int agp_register_driver (struct pci_dev *dev)
return 0;
}
int __exit agp_unregister_driver(void)
int agp_unregister_driver(void)
{
agp_bridge.type = NOT_SUPPORTED;
pm_unregister_all(agp_power);
......@@ -269,8 +272,23 @@ int __exit agp_unregister_driver(void)
return 0;
}
int __exit agp_exit(void)
{
if (agp_count==0)
return -EBUSY;
return 0;
}
int __init agp_init(void)
{
static int already_initialised=0;
if (already_initialised!=0)
return 0;
already_initialised = 1;
memset(&agp_bridge, 0, sizeof(struct agp_bridge_data));
agp_bridge.type = NOT_SUPPORTED;
......@@ -281,11 +299,13 @@ int __init agp_init(void)
#ifndef CONFIG_GART_IOMMU
module_init(agp_init);
module_exit(agp_exit);
#endif
EXPORT_SYMBOL(agp_backend_acquire);
EXPORT_SYMBOL(agp_backend_release);
EXPORT_SYMBOL_GPL(agp_register_driver);
EXPORT_SYMBOL_GPL(agp_unregister_driver);
MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>");
MODULE_LICENSE("GPL and additional rights");
drivers/char/agp/frontend.c
View file @ c198ff87
......@@ -1062,9 +1062,9 @@ static struct file_operations agp_fops =
static struct miscdevice agp_miscdev =
{
AGPGART_MINOR,
"agpgart",
&agp_fops
.minor = AGPGART_MINOR,
.name = "agpgart",
.fops = &agp_fops
};
int __init agp_frontend_initialize(void)
......@@ -1079,7 +1079,7 @@ int __init agp_frontend_initialize(void)
return 0;
}
void __exit agp_frontend_cleanup(void)
void agp_frontend_cleanup(void)
{
misc_deregister(&agp_miscdev);
}
......
drivers/char/agp/generic-3.0.c 0 → 100644
View file @ c198ff87
This diff is collapsed.
drivers/char/agp/generic.c
View file @ c198ff87
......@@ -469,7 +469,7 @@ int agp_generic_create_gatt_table(void)
for (page = virt_to_page(table); page <= virt_to_page(table_end); page++)
SetPageReserved(page);
agp_bridge.gatt_table_real = (u32 *) table;
agp_bridge.gatt_table_real = (unsigned long *) table;
agp_gatt_table = (void *)table;
CACHE_FLUSH();
agp_bridge.gatt_table = ioremap_nocache(virt_to_phys(table),
......@@ -693,7 +693,23 @@ void agp_enable(u32 mode)
EXPORT_SYMBOL(agp_free_memory);
EXPORT_SYMBOL(agp_allocate_memory);
EXPORT_SYMBOL(agp_copy_info);
EXPORT_SYMBOL(agp_create_memory);
EXPORT_SYMBOL(agp_bind_memory);
EXPORT_SYMBOL(agp_unbind_memory);
EXPORT_SYMBOL(agp_free_key);
EXPORT_SYMBOL(agp_enable);
EXPORT_SYMBOL(agp_bridge);
EXPORT_SYMBOL(agp_generic_alloc_page);
EXPORT_SYMBOL(agp_generic_destroy_page);
EXPORT_SYMBOL(agp_generic_suspend);
EXPORT_SYMBOL(agp_generic_resume);
EXPORT_SYMBOL(agp_generic_agp_enable);
EXPORT_SYMBOL(agp_generic_create_gatt_table);
EXPORT_SYMBOL(agp_generic_free_gatt_table);
EXPORT_SYMBOL(agp_generic_insert_memory);
EXPORT_SYMBOL(agp_generic_remove_memory);
EXPORT_SYMBOL(agp_generic_alloc_by_type);
EXPORT_SYMBOL(agp_generic_free_by_type);
EXPORT_SYMBOL(global_cache_flush);
drivers/char/agp/hp-agp.c
View file @ c198ff87
......@@ -18,8 +18,7 @@
#define HP_ZX1_SBA_IOMMU_COOKIE 0x0000badbadc0ffeeUL
#define HP_ZX1_PDIR_VALID_BIT 0x8000000000000000UL
#define HP_ZX1_IOVA_TO_PDIR(va) ((va - hp_private.iova_base) >> \
hp_private.io_tlb_shift)
#define HP_ZX1_IOVA_TO_PDIR(va) ((va - hp_private.iova_base) >> hp_private.io_tlb_shift)
static struct aper_size_info_fixed hp_zx1_sizes[] =
{
......@@ -330,12 +329,7 @@ static unsigned long hp_zx1_mask_memory(unsigned long addr, int type)
return HP_ZX1_PDIR_VALID_BIT | addr;
}
static unsigned long hp_zx1_unmask_memory(unsigned long addr)
{
return addr & ~(HP_ZX1_PDIR_VALID_BIT);
}
int __init hp_zx1_setup (struct pci_dev *pdev)
int __init hp_zx1_setup (struct pci_dev *pdev __attribute__((unused)))
{
agp_bridge.masks = hp_zx1_masks;
agp_bridge.num_of_masks = 1;
......@@ -347,7 +341,6 @@ int __init hp_zx1_setup (struct pci_dev *pdev)
agp_bridge.cleanup = hp_zx1_cleanup;
agp_bridge.tlb_flush = hp_zx1_tlbflush;
agp_bridge.mask_memory = hp_zx1_mask_memory;
agp_bridge.unmask_memory = hp_zx1_unmask_memory;
agp_bridge.agp_enable = agp_generic_agp_enable;
agp_bridge.cache_flush = global_cache_flush;
agp_bridge.create_gatt_table = hp_zx1_create_gatt_table;
......@@ -375,8 +368,6 @@ static int __init agp_find_supported_device(struct pci_dev *dev)
return hp_zx1_setup(dev);
}
return -ENODEV;
}
static int agp_hp_probe (struct pci_dev *dev, const struct pci_device_id *ent)
{
......
drivers/char/agp/i460-agp.c
View file @ c198ff87
This diff is collapsed.
drivers/char/agp/i7x05-agp.c 0 → 100644
View file @ c198ff87
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/agp_backend.h>
#include "agp.h"
static int intel_7505_fetch_size(void)
{
int i;
u16 tmp;
aper_size_info_16 *values;
/*
* For AGP 3.0 APSIZE is now 16 bits
*/
pci_read_config_word (agp_bridge.dev, INTEL_I7505_APSIZE, &tmp);
tmp = (tmp & 0xfff);
values = A_SIZE_16(agp_bridge.aperture_sizes);
for (i=0; i < agp_bridge.num_aperture_sizes; i++) {
if (tmp == values[i].size_value) {
agp_bridge.previous_size = agp_bridge.current_size =
(void *)(values + i);
agp_bridge.aperture_size_idx = i;
return values[i].size;
}
}
return 0;
}
static void intel_7505_tlbflush(agp_memory *mem)
{
u32 temp;
pci_read_config_dword(agp_bridge.dev, INTEL_I7505_AGPCTRL, &temp);
pci_write_config_dword(agp_bridge.dev, INTEL_I7505_AGPCTRL, temp & ~(1 << 7));
pci_read_config_dword(agp_bridge.dev, INTEL_I7505_AGPCTRL, &temp);
pci_write_config_dword(agp_bridge.dev, INTEL_I7505_AGPCTRL, temp | (1 << 7));
}
static void intel_7505_cleanup(void)
{
aper_size_info_16 *previous_size;
previous_size = A_SIZE_16(agp_bridge.previous_size);
pci_write_config_byte(agp_bridge.dev, INTEL_I7505_APSIZE,
previous_size->size_value);
}
static int intel_7505_configure(void)
{
u32 temp;
aper_size_info_16 *current_size;
current_size = A_SIZE_16(agp_bridge.current_size);
/* aperture size */
pci_write_config_word(agp_bridge.dev, INTEL_I7505_APSIZE,
current_size->size_value);
/* address to map to */
pci_read_config_dword(agp_bridge.dev, INTEL_I7505_NAPBASELO, &temp);
agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
/* attbase */
pci_write_config_dword(agp_bridge.dev, INTEL_I7505_ATTBASE,
agp_bridge.gatt_bus_addr);
/* agpctrl */
pci_write_config_dword(agp_bridge.dev, INTEL_I7505_AGPCTRL, 0x0000);
/* clear error registers */
pci_write_config_byte(agp_bridge.dev, INTEL_I7505_ERRSTS, 0xff);
return 0;
}
static aper_size_info_16 intel_7505_sizes[7] =
{
{256, 65536, 6, 0xf00},
{128, 32768, 5, 0xf20},
{64, 16384, 4, 0xf30},
{32, 8192, 3, 0xf38},
{16, 4096, 2, 0xf3c},
{8, 2048, 1, 0xf3e},
{4, 1024, 0, 0xf3f}
};
static int __init intel_7505_setup (struct pci_dev *pdev)
{
agp_bridge.masks = intel_generic_masks;
agp_bridge.num_of_masks = 1;
agp_bridge.aperture_sizes = (void *) intel_7505_sizes;
agp_bridge.size_type = U16_APER_SIZE;
agp_bridge.num_aperture_sizes = 7;
agp_bridge.dev_private_data = NULL;
agp_bridge.needs_scratch_page = FALSE;
agp_bridge.configure = intel_7505_configure;
agp_bridge.fetch_size = intel_7505_fetch_size;
agp_bridge.cleanup = intel_7505_cleanup;
agp_bridge.tlb_flush = intel_7505_tlbflush;
agp_bridge.mask_memory = intel_mask_memory;
agp_bridge.agp_enable = agp_generic_agp_3_0_enable;
agp_bridge.cache_flush = global_cache_flush;
agp_bridge.create_gatt_table = agp_generic_create_gatt_table;
agp_bridge.free_gatt_table = agp_generic_free_gatt_table;
agp_bridge.insert_memory = agp_generic_insert_memory;
agp_bridge.remove_memory = agp_generic_remove_memory;
agp_bridge.alloc_by_type = agp_generic_alloc_by_type;
agp_bridge.free_by_type = agp_generic_free_by_type;
agp_bridge.agp_alloc_page = agp_generic_alloc_page;
agp_bridge.agp_destroy_page = agp_generic_destroy_page;
agp_bridge.suspend = agp_generic_suspend;
agp_bridge.resume = agp_generic_resume;
agp_bridge.cant_use_aperture = 0;
return 0;
}
struct agp_device_ids i7x05_agp_device_ids[] __initdata =
{
{
.device_id = PCI_DEVICE_ID_INTEL_7505_0,
.chipset = INTEL_I7505,
.chipset_name = "i7505",
},
{
.device_id = PCI_DEVICE_ID_INTEL_7205_0,
.chipset = INTEL_I7505,
.chipset_name = "i7205",
},
{ }, /* dummy final entry, always present */
};
/* scan table above for supported devices */
static int __init agp_lookup_host_bridge (struct pci_dev *pdev)
{
int j=0;
struct agp_device_ids *devs;
devs = i7x05_agp_device_ids;
while (devs[j].chipset_name != NULL) {
if (pdev->device == devs[j].device_id) {
printk (KERN_INFO PFX "Detected Intel %s chipset\n",
devs[j].chipset_name);
agp_bridge.type = devs[j].chipset;
if (devs[j].chipset_setup != NULL)
return devs[j].chipset_setup(pdev);
else
return intel_7505_setup(pdev);
}
j++;
}
printk(KERN_ERR PFX "Unsupported Intel chipset (device id: %04x),",
pdev->device);
return -ENODEV;
}
static int __init agp_find_supported_device(struct pci_dev *dev)
{
agp_bridge.dev = dev;
if (pci_find_capability(dev, PCI_CAP_ID_AGP)==0)
return -ENODEV;
/* probe for known chipsets */
return agp_lookup_host_bridge(dev);
}
static int agp_i7x05_probe (struct pci_dev *dev, const struct pci_device_id *ent)
{
if (agp_find_supported_device(dev) == 0) {
agp_register_driver(dev);
return 0;
}
return -ENODEV;
}
static struct pci_device_id agp_i7x05_pci_table[] __initdata = {
{
.class = (PCI_CLASS_BRIDGE_HOST << 8),
.class_mask = ~0,
.vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_ANY_ID,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
},
{ }
};
MODULE_DEVICE_TABLE(pci, agp_i7x05_pci_table);
static struct pci_driver agp_i7x05_pci_driver = {
.name = "agpgart-i7x05",
.id_table = agp_i7x05_pci_table,
.probe = agp_i7x05_probe,
};
int __init agp_i7x05_init(void)
{
int ret_val;
ret_val = pci_module_init(&agp_i7x05_pci_driver);
if (ret_val)
agp_bridge.type = NOT_SUPPORTED;
return ret_val;
}
static void __exit agp_i7x05_cleanup(void)
{
agp_unregister_driver();
pci_unregister_driver(&agp_i7x05_pci_driver);
}
module_init(agp_i7x05_init);
module_exit(agp_i7x05_cleanup);
MODULE_AUTHOR("Matthew E Tolentino <matthew.e.tolentino@intel.com>");
MODULE_LICENSE("GPL and additional rights");
drivers/char/agp/intel-agp.c
View file @ c198ff87
......@@ -1473,6 +1473,11 @@ static struct pci_driver agp_intel_pci_driver = {
static int __init agp_intel_init(void)
{
int ret_val;
static int agp_initialised=0;
if (agp_initialised==1)
return 0;
agp_initialised=1;
ret_val = pci_module_init(&agp_intel_pci_driver);
if (ret_val)
......
drivers/md/dm-ioctl.c
View file @ c198ff87
......@@ -986,6 +986,10 @@ static int copy_params(struct dm_ioctl *user, struct dm_ioctl **param)
static int validate_params(uint cmd, struct dm_ioctl *param)
{
/* Ignores parameters */
if (cmd == DM_REMOVE_ALL_CMD)
return 0;
/* Unless creating, either name of uuid but not both */
if (cmd != DM_DEV_CREATE_CMD) {
if ((!*param->uuid && !*param->name) ||
......
drivers/md/dm-linear.c
View file @ c198ff87
......@@ -43,7 +43,7 @@ static int linear_ctr(struct dm_target *ti, int argc, char **argv)
goto bad;
}
if (dm_get_device(ti, argv[0], ti->begin, ti->len,
if (dm_get_device(ti, argv[0], lc->start, ti->len,
dm_table_get_mode(ti->table), &lc->dev)) {
ti->error = "dm-linear: Device lookup failed";
goto bad;
......
drivers/md/dm-stripe.c
View file @ c198ff87
......@@ -117,12 +117,29 @@ static int stripe_ctr(struct dm_target *ti, int argc, char **argv)
return -EINVAL;
}
/*
* chunk_size is a power of two
*/
if (!chunk_size || (chunk_size & (chunk_size - 1))) {
ti->error = "dm-stripe: Invalid chunk size";
return -EINVAL;
}
if (!multiple(ti->len, stripes, &width)) {
ti->error = "dm-stripe: Target length not divisable by "
"number of stripes";
return -EINVAL;
}
/*
* Do we have enough arguments for that many stripes ?
*/
if (argc != (2 + 2 * stripes)) {
ti->error = "dm-stripe: Not enough destinations "
"specified";
return -EINVAL;
}
sc = alloc_context(stripes);
if (!sc) {
ti->error = "dm-stripe: Memory allocation for striped context "
......@@ -134,15 +151,6 @@ static int stripe_ctr(struct dm_target *ti, int argc, char **argv)
sc->stripe_width = width;
ti->split_io = chunk_size;
/*
* chunk_size is a power of two
*/
if (!chunk_size || (chunk_size & (chunk_size - 1))) {
ti->error = "dm-stripe: Invalid chunk size";
kfree(sc);
return -EINVAL;
}
sc->chunk_mask = ((sector_t) chunk_size) - 1;
for (sc->chunk_shift = 0; chunk_size; sc->chunk_shift++)
chunk_size >>= 1;
......@@ -152,13 +160,6 @@ static int stripe_ctr(struct dm_target *ti, int argc, char **argv)
* Get the stripe destinations.
*/
for (i = 0; i < stripes; i++) {
if (argc < 2) {
ti->error = "dm-stripe: Not enough destinations "
"specified";
kfree(sc);
return -EINVAL;
}
argv += 2;
r = get_stripe(ti, sc, i, argv);
......
drivers/md/dm-table.c
View file @ c198ff87
......@@ -312,7 +312,7 @@ static int lookup_device(const char *path, dev_t *dev)
}
if (!S_ISBLK(inode->i_mode)) {
r = -EINVAL;
r = -ENOTBLK;
goto out;
}
......@@ -356,7 +356,7 @@ static int open_dev(struct dm_dev *d, dev_t dev)
return -ENOMEM;
r = blkdev_get(d->bdev, d->mode, 0, BDEV_RAW);
if (!r)
if (r)
return r;
r = bd_claim(d->bdev, _claim_ptr);
......@@ -388,7 +388,7 @@ static void close_dev(struct dm_dev *d)
static int check_device_area(struct dm_dev *dd, sector_t start, sector_t len)
{
sector_t dev_size;
dev_size = dd->bdev->bd_inode->i_size;
dev_size = dd->bdev->bd_inode->i_size >> SECTOR_SHIFT;
return ((start < dev_size) && (len <= (dev_size - start)));
}
......
drivers/md/dm.c
View file @ c198ff87
This diff is collapsed.
drivers/md/dm.h
View file @ c198ff87
......@@ -29,6 +29,8 @@
#define SECTOR_FORMAT "%lu"
#endif
#define SECTOR_SHIFT 9
extern struct block_device_operations dm_blk_dops;
/*
......
include/asm-i386/fixmap.h
View file @ c198ff87
......@@ -42,6 +42,8 @@
* task switches.
*/
enum fixed_addresses {
FIX_VSYSCALL,
FIX_HOLE,
#ifdef CONFIG_X86_LOCAL_APIC
FIX_APIC_BASE, /* local (CPU) APIC) -- required for SMP or not */
#endif
......@@ -96,10 +98,9 @@ extern void __set_fixmap (enum fixed_addresses idx,
* used by vmalloc.c.
*
* Leave one empty page between vmalloc'ed areas and
* the start of the fixmap, and leave one page empty
* at the top of mem..
* the start of the fixmap.
*/
#define FIXADDR_TOP (0xffffe000UL)
#define FIXADDR_TOP (0xfffff000UL)
#define __FIXADDR_SIZE (__end_of_permanent_fixed_addresses << PAGE_SHIFT)
#define FIXADDR_START (FIXADDR_TOP - __FIXADDR_SIZE)
......
include/asm-i386/segment.h
View file @ c198ff87
......@@ -9,8 +9,8 @@
* 2 - reserved
* 3 - reserved
*
* 4 - default user CS <==== new cacheline
* 5 - default user DS
* 4 - unused <==== new cacheline
* 5 - unused
*
* ------- start of TLS (Thread-Local Storage) segments:
*
......@@ -25,16 +25,18 @@
*
* 12 - kernel code segment <==== new cacheline
* 13 - kernel data segment
* 14 - TSS
* 15 - LDT
* 16 - PNPBIOS support (16->32 gate)
* 17 - PNPBIOS support
* 18 - PNPBIOS support
* 14 - default user CS
* 15 - default user DS
* 16 - TSS
* 17 - LDT
* 18 - PNPBIOS support (16->32 gate)
* 19 - PNPBIOS support
* 20 - PNPBIOS support
* 21 - APM BIOS support
* 22 - APM BIOS support
* 23 - APM BIOS support
* 21 - PNPBIOS support
* 22 - PNPBIOS support
* 23 - APM BIOS support
* 24 - APM BIOS support
* 25 - APM BIOS support
*/
#define GDT_ENTRY_TLS_ENTRIES 3
#define GDT_ENTRY_TLS_MIN 6
......@@ -42,10 +44,10 @@
#define TLS_SIZE (GDT_ENTRY_TLS_ENTRIES * 8)
#define GDT_ENTRY_DEFAULT_USER_CS 4
#define GDT_ENTRY_DEFAULT_USER_CS 14
#define __USER_CS (GDT_ENTRY_DEFAULT_USER_CS * 8 + 3)
#define GDT_ENTRY_DEFAULT_USER_DS 5
#define GDT_ENTRY_DEFAULT_USER_DS 15
#define __USER_DS (GDT_ENTRY_DEFAULT_USER_DS * 8 + 3)
#define GDT_ENTRY_KERNEL_BASE 12
......@@ -56,14 +58,14 @@
#define GDT_ENTRY_KERNEL_DS (GDT_ENTRY_KERNEL_BASE + 1)
#define __KERNEL_DS (GDT_ENTRY_KERNEL_DS * 8)
#define GDT_ENTRY_TSS (GDT_ENTRY_KERNEL_BASE + 2)
#define GDT_ENTRY_LDT (GDT_ENTRY_KERNEL_BASE + 3)
#define GDT_ENTRY_TSS (GDT_ENTRY_KERNEL_BASE + 4)
#define GDT_ENTRY_LDT (GDT_ENTRY_KERNEL_BASE + 5)
#define GDT_ENTRY_PNPBIOS_BASE (GDT_ENTRY_KERNEL_BASE + 4)
#define GDT_ENTRY_APMBIOS_BASE (GDT_ENTRY_KERNEL_BASE + 9)
#define GDT_ENTRY_PNPBIOS_BASE (GDT_ENTRY_KERNEL_BASE + 6)
#define GDT_ENTRY_APMBIOS_BASE (GDT_ENTRY_KERNEL_BASE + 11)
/*
* The GDT has 21 entries but we pad it to cacheline boundary:
* The GDT has 23 entries but we pad it to cacheline boundary:
*/
#define GDT_ENTRIES 24
......
include/linux/agp_backend.h
View file @ c198ff87
......@@ -51,6 +51,7 @@ enum chipset_type {
INTEL_I850,
INTEL_I860,
INTEL_460GX,
INTEL_I7505,
VIA_GENERIC,
VIA_VP3,
VIA_MVP3,
......
include/linux/device-mapper.h
View file @ c198ff87
......@@ -7,13 +7,6 @@
#ifndef _LINUX_DEVICE_MAPPER_H
#define _LINUX_DEVICE_MAPPER_H
#define DM_DIR "mapper" /* Slashes not supported */
#define DM_MAX_TYPE_NAME 16
#define DM_NAME_LEN 128
#define DM_UUID_LEN 129
#ifdef __KERNEL__
struct dm_target;
struct dm_table;
struct dm_dev;
......@@ -101,6 +94,4 @@ struct dm_target {
int dm_register_target(struct target_type *t);
int dm_unregister_target(struct target_type *t);
#endif /* __KERNEL__ */
#endif /* _LINUX_DEVICE_MAPPER_H */
include/linux/dm-ioctl.h
View file @ c198ff87
......@@ -7,9 +7,13 @@
#ifndef _LINUX_DM_IOCTL_H
#define _LINUX_DM_IOCTL_H
#include <linux/device-mapper.h>
#include <linux/types.h>
#define DM_DIR "mapper" /* Slashes not supported */
#define DM_MAX_TYPE_NAME 16
#define DM_NAME_LEN 128
#define DM_UUID_LEN 129
/*
* Implements a traditional ioctl interface to the device mapper.
*/
......
include/linux/pci_ids.h
View file @ c198ff87
......@@ -1764,6 +1764,9 @@
#define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221
#define PCI_DEVICE_ID_INTEL_82092AA_1 0x1222
#define PCI_DEVICE_ID_INTEL_7116 0x1223
#define PCI_DEVICE_ID_INTEL_7505_0 0x2550
#define PCI_DEVICE_ID_INTEL_7505_1 0x2552
#define PCI_DEVICE_ID_INTEL_7205_0 0x255d
#define PCI_DEVICE_ID_INTEL_82596 0x1226
#define PCI_DEVICE_ID_INTEL_82865 0x1227
#define PCI_DEVICE_ID_INTEL_82557 0x1229
......
mm/highmem.c
View file @ c198ff87
......@@ -452,8 +452,6 @@ inline void blk_queue_bounce(request_queue_t *q, struct bio **bio_orig)
mempool_t *pool;
int bio_gfp;
BUG_ON((*bio_orig)->bi_idx);
/*
* for non-isa bounce case, just check if the bounce pfn is equal
* to or bigger than the highest pfn in the system -- in that case,
......
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