Commit c1e3c119 authored by Barry Song's avatar Barry Song Committed by Barry Song

ARM: SIRF: make sirf irqchip driver optional since new SoCs will have GIC

New MARCO and POLO SoC use GIC, so make irq.c optional and enable it
only if we enable ARCH_PRIMA2 in Kconfig
Signed-off-by: default avatarBarry Song <Baohua.Song@csr.com>
parent 156a0997
...@@ -7,9 +7,13 @@ config ARCH_PRIMA2 ...@@ -7,9 +7,13 @@ config ARCH_PRIMA2
default y default y
select CPU_V7 select CPU_V7
select ZONE_DMA select ZONE_DMA
select SIRF_IRQ
help help
Support for CSR SiRFSoC ARM Cortex A9 Platform Support for CSR SiRFSoC ARM Cortex A9 Platform
endmenu endmenu
config SIRF_IRQ
bool
endif endif
obj-y := timer.o obj-y := timer.o
obj-y += irq.o
obj-y += rstc.o obj-y += rstc.o
obj-y += common.o obj-y += common.o
obj-y += rtciobrg.o obj-y += rtciobrg.o
obj-$(CONFIG_DEBUG_LL) += lluart.o obj-$(CONFIG_DEBUG_LL) += lluart.o
obj-$(CONFIG_CACHE_L2X0) += l2x0.o obj-$(CONFIG_CACHE_L2X0) += l2x0.o
obj-$(CONFIG_SUSPEND) += pm.o sleep.o obj-$(CONFIG_SUSPEND) += pm.o sleep.o
obj-$(CONFIG_SIRF_IRQ) += irq.o
...@@ -63,7 +63,7 @@ void __init sirfsoc_of_irq_init(void) ...@@ -63,7 +63,7 @@ void __init sirfsoc_of_irq_init(void)
np = of_find_matching_node(NULL, intc_ids); np = of_find_matching_node(NULL, intc_ids);
if (!np) if (!np)
panic("unable to find compatible intc node in dtb\n"); return;
sirfsoc_intc_base = of_iomap(np, 0); sirfsoc_intc_base = of_iomap(np, 0);
if (!sirfsoc_intc_base) if (!sirfsoc_intc_base)
......
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