Commit c205d932 authored by Chris Ball's avatar Chris Ball Committed by Jonathan Corbet

viafb: Add 1200x900 DCON/LCD panel modes for OLPC XO-1.5

[jc: extensive merge conflict fixes]
Cc: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
Cc: ScottFang@viatech.com.cn
Cc: JosephChan@via.com.tw
Signed-off-by: default avatarChris Ball <cjb@laptop.org>
parent 13178243
...@@ -62,6 +62,7 @@ static struct pll_map pll_value[] = { ...@@ -62,6 +62,7 @@ static struct pll_map pll_value[] = {
CX700_52_977M, VX855_52_977M}, CX700_52_977M, VX855_52_977M},
{CLK_56_250M, CLE266_PLL_56_250M, K800_PLL_56_250M, {CLK_56_250M, CLE266_PLL_56_250M, K800_PLL_56_250M,
CX700_56_250M, VX855_56_250M}, CX700_56_250M, VX855_56_250M},
{CLK_57_275M, 0, 0, 0, VX855_57_275M},
{CLK_60_466M, CLE266_PLL_60_466M, K800_PLL_60_466M, {CLK_60_466M, CLE266_PLL_60_466M, K800_PLL_60_466M,
CX700_60_466M, VX855_60_466M}, CX700_60_466M, VX855_60_466M},
{CLK_61_500M, CLE266_PLL_61_500M, K800_PLL_61_500M, {CLK_61_500M, CLE266_PLL_61_500M, K800_PLL_61_500M,
......
...@@ -75,7 +75,7 @@ ...@@ -75,7 +75,7 @@
/*SAMM operation flag*/ /*SAMM operation flag*/
#define OP_SAMM 0x80 #define OP_SAMM 0x80
#define LCD_PANEL_ID_MAXIMUM 22 #define LCD_PANEL_ID_MAXIMUM 23
#define STATE_ON 0x1 #define STATE_ON 0x1
#define STATE_OFF 0x0 #define STATE_OFF 0x0
......
...@@ -398,6 +398,15 @@ static void fp_id_to_vindex(int panel_id) ...@@ -398,6 +398,15 @@ static void fp_id_to_vindex(int panel_id)
viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
viaparinfo->lvds_setting_info->LCDDithering = 1; viaparinfo->lvds_setting_info->LCDDithering = 1;
break; break;
case 0x17:
/* OLPC XO-1.5 panel */
viaparinfo->lvds_setting_info->lcd_panel_hres = 1200;
viaparinfo->lvds_setting_info->lcd_panel_vres = 900;
viaparinfo->lvds_setting_info->lcd_panel_id =
LCD_PANEL_IDD_1200X900;
viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
viaparinfo->lvds_setting_info->LCDDithering = 0;
break;
default: default:
viaparinfo->lvds_setting_info->lcd_panel_hres = 800; viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
viaparinfo->lvds_setting_info->lcd_panel_vres = 600; viaparinfo->lvds_setting_info->lcd_panel_vres = 600;
......
...@@ -60,6 +60,8 @@ ...@@ -60,6 +60,8 @@
#define LCD_PANEL_IDB_1360X768 0x0B #define LCD_PANEL_IDB_1360X768 0x0B
/* Resolution: 480x640, Channel: single, Dithering: Enable */ /* Resolution: 480x640, Channel: single, Dithering: Enable */
#define LCD_PANEL_IDC_480X640 0x0C #define LCD_PANEL_IDC_480X640 0x0C
/* Resolution: 1200x900, Channel: single, Dithering: Disable */
#define LCD_PANEL_IDD_1200X900 0x0D
extern int viafb_LCD2_ON; extern int viafb_LCD2_ON;
......
...@@ -570,6 +570,10 @@ ...@@ -570,6 +570,10 @@
#define M1200X720_R60_HSP NEGATIVE #define M1200X720_R60_HSP NEGATIVE
#define M1200X720_R60_VSP POSITIVE #define M1200X720_R60_VSP POSITIVE
/* 1200x900@60 Sync Polarity (DCON) */
#define M1200X900_R60_HSP NEGATIVE
#define M1200X900_R60_VSP NEGATIVE
/* 1280x600@60 Sync Polarity (GTF Mode) */ /* 1280x600@60 Sync Polarity (GTF Mode) */
#define M1280x600_R60_HSP NEGATIVE #define M1280x600_R60_HSP NEGATIVE
#define M1280x600_R60_VSP POSITIVE #define M1280x600_R60_VSP POSITIVE
...@@ -651,6 +655,7 @@ ...@@ -651,6 +655,7 @@
#define CLK_52_406M 52406000 #define CLK_52_406M 52406000
#define CLK_52_977M 52977000 #define CLK_52_977M 52977000
#define CLK_56_250M 56250000 #define CLK_56_250M 56250000
#define CLK_57_275M 57275000
#define CLK_60_466M 60466000 #define CLK_60_466M 60466000
#define CLK_61_500M 61500000 #define CLK_61_500M 61500000
#define CLK_65_000M 65000000 #define CLK_65_000M 65000000
...@@ -939,6 +944,7 @@ ...@@ -939,6 +944,7 @@
#define VX855_52_406M 0x00580C03 #define VX855_52_406M 0x00580C03
#define VX855_52_977M 0x00940C05 #define VX855_52_977M 0x00940C05
#define VX855_56_250M 0x009D0C05 #define VX855_56_250M 0x009D0C05
#define VX855_57_275M 0x009D8C85 /* Used by XO panel */
#define VX855_60_466M 0x00A90C05 #define VX855_60_466M 0x00A90C05
#define VX855_61_500M 0x00AC0C05 #define VX855_61_500M 0x00AC0C05
#define VX855_65_000M 0x006D0C03 #define VX855_65_000M 0x006D0C03
...@@ -1065,6 +1071,7 @@ ...@@ -1065,6 +1071,7 @@
#define RES_1600X1200_60HZ_PIXCLOCK 6172 #define RES_1600X1200_60HZ_PIXCLOCK 6172
#define RES_1600X1200_75HZ_PIXCLOCK 4938 #define RES_1600X1200_75HZ_PIXCLOCK 4938
#define RES_1280X720_60HZ_PIXCLOCK 13426 #define RES_1280X720_60HZ_PIXCLOCK 13426
#define RES_1200X900_60HZ_PIXCLOCK 17459
#define RES_1920X1080_60HZ_PIXCLOCK 5787 #define RES_1920X1080_60HZ_PIXCLOCK 5787
#define RES_1400X1050_60HZ_PIXCLOCK 8214 #define RES_1400X1050_60HZ_PIXCLOCK 8214
#define RES_1400X1050_75HZ_PIXCLOCK 6410 #define RES_1400X1050_75HZ_PIXCLOCK 6410
......
...@@ -66,6 +66,7 @@ struct res_map_refresh res_map_refresh_tbl[] = { ...@@ -66,6 +66,7 @@ struct res_map_refresh res_map_refresh_tbl[] = {
{1088, 612, RES_1088X612_60HZ_PIXCLOCK, 60}, {1088, 612, RES_1088X612_60HZ_PIXCLOCK, 60},
{1152, 720, RES_1152X720_60HZ_PIXCLOCK, 60}, {1152, 720, RES_1152X720_60HZ_PIXCLOCK, 60},
{1200, 720, RES_1200X720_60HZ_PIXCLOCK, 60}, {1200, 720, RES_1200X720_60HZ_PIXCLOCK, 60},
{1200, 900, RES_1200X900_60HZ_PIXCLOCK, 60},
{1280, 600, RES_1280X600_60HZ_PIXCLOCK, 60}, {1280, 600, RES_1280X600_60HZ_PIXCLOCK, 60},
{1280, 720, RES_1280X720_50HZ_PIXCLOCK, 50}, {1280, 720, RES_1280X720_50HZ_PIXCLOCK, 50},
{1280, 768, RES_1280X768_50HZ_PIXCLOCK, 50}, {1280, 768, RES_1280X768_50HZ_PIXCLOCK, 50},
...@@ -759,6 +760,16 @@ struct crt_mode_table CRTM1200x720[] = { ...@@ -759,6 +760,16 @@ struct crt_mode_table CRTM1200x720[] = {
{1568, 1200, 1200, 368, 1256, 128, 746, 720, 720, 26, 721, 3} } {1568, 1200, 1200, 368, 1256, 128, 746, 720, 720, 26, 721, 3} }
}; };
/* 1200x900 (DCON) */
struct crt_mode_table DCON1200x900[] = {
/* r_rate, vclk, hsp, vsp */
{REFRESH_60, CLK_57_275M, M1200X900_R60_HSP, M1200X900_R60_VSP,
/* The correct htotal is 1240, but this doesn't raster on VX855. */
/* Via suggested changing to a multiple of 16, hence 1264. */
/* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
{1264, 1200, 1200, 64, 1211, 32, 912, 900, 900, 12, 901, 10} }
};
/* 1280x600 (GTF) */ /* 1280x600 (GTF) */
struct crt_mode_table CRTM1280x600[] = { struct crt_mode_table CRTM1280x600[] = {
/* r_rate, vclk, hsp, vsp */ /* r_rate, vclk, hsp, vsp */
...@@ -937,6 +948,9 @@ struct VideoModeTable viafb_modes[] = { ...@@ -937,6 +948,9 @@ struct VideoModeTable viafb_modes[] = {
/* Display : 1200x720 (GTF) */ /* Display : 1200x720 (GTF) */
{CRTM1200x720, ARRAY_SIZE(CRTM1200x720)}, {CRTM1200x720, ARRAY_SIZE(CRTM1200x720)},
/* Display : 1200x900 (DCON) */
{DCON1200x900, ARRAY_SIZE(DCON1200x900)},
/* Display : 1280x600 (GTF) */ /* Display : 1280x600 (GTF) */
{CRTM1280x600, ARRAY_SIZE(CRTM1280x600)}, {CRTM1280x600, ARRAY_SIZE(CRTM1280x600)},
......
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