Commit c232db9e authored by Jaroslav Kysela's avatar Jaroslav Kysela

[ALSA] add overclocking option for the analog input

PCI drivers,BT87x driver
adds CONFIG_SND_BT87X_OVERCLOCK to enable sample rates
up to 1792000 Hz when recording from the analog input
Signed-off-by: default avatarClemens Ladisch <clemens@ladisch.de>
parent 9f94a3c8
...@@ -112,6 +112,16 @@ config SND_BT87X ...@@ -112,6 +112,16 @@ config SND_BT87X
To compile this driver as a module, choose M here: the module To compile this driver as a module, choose M here: the module
will be called snd-bt87x. will be called snd-bt87x.
config SND_BT87X_OVERCLOCK
bool "Bt87x Audio overclocking"
depends on SND_BT87X
help
Say Y here if 448000 Hz isn't enough for you and you want to
record from the analog input with up to 1792000 Hz.
Higher sample rates won't hurt your hardware, but audio
quality may suffer.
config SND_CS46XX config SND_CS46XX
tristate "Cirrus Logic (Sound Fusion) CS4280/CS461x/CS462x/CS463x" tristate "Cirrus Logic (Sound Fusion) CS4280/CS461x/CS462x/CS463x"
depends on SND depends on SND
......
...@@ -140,6 +140,14 @@ MODULE_PARM_DESC(digital_rate, "Digital input rate for Bt87x soundcard"); ...@@ -140,6 +140,14 @@ MODULE_PARM_DESC(digital_rate, "Digital input rate for Bt87x soundcard");
#define RISC_SYNC_FM1 0x6 #define RISC_SYNC_FM1 0x6
#define RISC_SYNC_VRO 0xc #define RISC_SYNC_VRO 0xc
#define ANALOG_CLOCK 1792000
#ifdef CONFIG_SND_BT87X_OVERCLOCK
#define CLOCK_DIV_MIN 1
#else
#define CLOCK_DIV_MIN 4
#endif
#define CLOCK_DIV_MAX 15
#define ERROR_INTERRUPTS (INT_FBUS | INT_FTRGT | INT_PPERR | \ #define ERROR_INTERRUPTS (INT_FBUS | INT_FTRGT | INT_PPERR | \
INT_RIPERR | INT_PABORT | INT_OCERR) INT_RIPERR | INT_PABORT | INT_OCERR)
#define MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS) #define MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS)
...@@ -304,8 +312,8 @@ static snd_pcm_hardware_t snd_bt87x_analog_hw = { ...@@ -304,8 +312,8 @@ static snd_pcm_hardware_t snd_bt87x_analog_hw = {
SNDRV_PCM_INFO_MMAP_VALID, SNDRV_PCM_INFO_MMAP_VALID,
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8, .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
.rates = SNDRV_PCM_RATE_KNOT, .rates = SNDRV_PCM_RATE_KNOT,
.rate_min = 119466, .rate_min = ANALOG_CLOCK / CLOCK_DIV_MAX,
.rate_max = 448000, .rate_max = ANALOG_CLOCK / CLOCK_DIV_MIN,
.channels_min = 1, .channels_min = 1,
.channels_max = 1, .channels_max = 1,
.buffer_bytes_max = 255 * 4092, .buffer_bytes_max = 255 * 4092,
...@@ -347,9 +355,9 @@ static int snd_bt87x_set_digital_hw(bt87x_t *chip, snd_pcm_runtime_t *runtime) ...@@ -347,9 +355,9 @@ static int snd_bt87x_set_digital_hw(bt87x_t *chip, snd_pcm_runtime_t *runtime)
static int snd_bt87x_set_analog_hw(bt87x_t *chip, snd_pcm_runtime_t *runtime) static int snd_bt87x_set_analog_hw(bt87x_t *chip, snd_pcm_runtime_t *runtime)
{ {
static ratnum_t analog_clock = { static ratnum_t analog_clock = {
.num = 1792000, .num = ANALOG_CLOCK,
.den_min = 4, .den_min = CLOCK_DIV_MIN,
.den_max = 15, .den_max = CLOCK_DIV_MAX,
.den_step = 1 .den_step = 1
}; };
static snd_pcm_hw_constraint_ratnums_t constraint_rates = { static snd_pcm_hw_constraint_ratnums_t constraint_rates = {
...@@ -434,7 +442,7 @@ static int snd_bt87x_prepare(snd_pcm_substream_t *substream) ...@@ -434,7 +442,7 @@ static int snd_bt87x_prepare(snd_pcm_substream_t *substream)
spin_lock_irq(&chip->reg_lock); spin_lock_irq(&chip->reg_lock);
chip->reg_control &= ~(CTL_DA_SDR_MASK | CTL_DA_SBR); chip->reg_control &= ~(CTL_DA_SDR_MASK | CTL_DA_SBR);
decimation = (1792000 + runtime->rate / 4) / runtime->rate; decimation = (ANALOG_CLOCK + runtime->rate / 4) / runtime->rate;
chip->reg_control |= decimation << CTL_DA_SDR_SHIFT; chip->reg_control |= decimation << CTL_DA_SDR_SHIFT;
if (runtime->format == SNDRV_PCM_FORMAT_S8) if (runtime->format == SNDRV_PCM_FORMAT_S8)
chip->reg_control |= CTL_DA_SBR; chip->reg_control |= CTL_DA_SBR;
......
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