Commit c25f0c6a authored by Daniele Ceraolo Spurio's avatar Daniele Ceraolo Spurio Committed by Mika Kuoppala

drm/i915/icl: do a posting read after irq install

When reading GEN11_GT_INTR_DWx closely after enabling the interrupts
in gen11_irq_postinstall, the returned value is garbage. This can
cause other parts of the setup code (e.g. gen11_reset_one_iir) to
think that there are interrupts to be cleared when there are none.

The garbage value is only seen on the first read done after the enable,
so this looks like a posting issue. Adding a posting read after enabling
the interrupts does indeed fix the problem.

Note that the posting read has been purposely added outside of
gen11_master_intr_enable since the issue has only been observed when the
full interrupt setup is performed.

Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Acked-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Acked-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190123023227.8117-1-daniele.ceraolospurio@intel.com
parent a9dc3395
......@@ -4089,6 +4089,7 @@ static int gen11_irq_postinstall(struct drm_device *dev)
I915_WRITE(GEN11_DISPLAY_INT_CTL, GEN11_DISPLAY_IRQ_ENABLE);
gen11_master_intr_enable(dev_priv->regs);
POSTING_READ(GEN11_GFX_MSTR_IRQ);
return 0;
}
......
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