Commit c32b1ceb authored by Anton Blanchard's avatar Anton Blanchard Committed by Linus Torvalds

[PATCH] ppc64: allow EEH to be disabled

Allow EEH to be disabled for pSeries targets, but only if the EMBEDDED option
is enabled.  This version incorporates some suggestions from Arnd Bergmann and
Linas Vepstas.
Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 5c8bfbc4
......@@ -234,6 +234,11 @@ config PREEMPT_BKL
Say Y here if you are building a kernel for a desktop system.
Say N if you are unsure.
config EEH
bool "PCI Extended Error Handling (EEH)" if EMBEDDED
depends on PPC_PSERIES
default y if !EMBEDDED
#
# Use the generic interrupt handling code in kernel/irq/:
#
......
......@@ -30,9 +30,10 @@ obj-$(CONFIG_PPC_ISERIES) += iSeries_irq.o \
obj-$(CONFIG_PPC_MULTIPLATFORM) += nvram.o i8259.o prom_init.o prom.o mpic.o
obj-$(CONFIG_PPC_PSERIES) += pSeries_pci.o pSeries_lpar.o pSeries_hvCall.o \
eeh.o pSeries_nvram.o rtasd.o ras.o \
pSeries_nvram.o rtasd.o ras.o \
xics.o rtas.o pSeries_setup.o pSeries_iommu.o
obj-$(CONFIG_EEH) += eeh.o
obj-$(CONFIG_PROC_FS) += proc_ppc64.o
obj-$(CONFIG_RTAS_FLASH) += rtas_flash.o
obj-$(CONFIG_SMP) += smp.o
......
......@@ -764,8 +764,6 @@ void __init eeh_init(void)
struct device_node *phb, *np;
struct eeh_early_enable_info info;
init_pci_config_tokens();
np = of_find_node_by_path("/rtas");
if (np == NULL)
return;
......
......@@ -40,7 +40,6 @@
#include <linux/adb.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
......@@ -59,13 +58,12 @@
#include <asm/time.h>
#include <asm/nvram.h>
#include <asm/plpar_wrappers.h>
#include "i8259.h"
#include <asm/xics.h>
#include <asm/ppcdebug.h>
#include <asm/cputable.h>
#include "i8259.h"
#include "mpic.h"
#include "pci.h"
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
......@@ -73,7 +71,6 @@
#define DBG(fmt...)
#endif
extern void find_and_init_phbs(void);
extern void pSeries_final_fixup(void);
extern void pSeries_get_boot_time(struct rtc_time *rtc_time);
......@@ -87,10 +84,6 @@ extern void generic_find_legacy_serial_ports(u64 *physport,
int fwnmi_active; /* TRUE if an FWNMI handler is present */
unsigned long virtPython0Facilities = 0; // python0 facility area (memory mapped io) (64-bit format) VIRTUAL address.
extern unsigned long loops_per_jiffy;
extern unsigned long ppc_proc_freq;
extern unsigned long ppc_tb_freq;
......@@ -230,7 +223,7 @@ static void __init pSeries_setup_arch(void)
fwnmi_init();
/* Find and initialize PCI host bridges */
/* iSeries needs to be done much later. */
init_pci_config_tokens();
eeh_init();
find_and_init_phbs();
......
......@@ -20,28 +20,28 @@
#ifndef _PPC64_EEH_H
#define _PPC64_EEH_H
#include <linux/config.h>
#include <linux/init.h>
#include <linux/list.h>
#include <linux/string.h>
#include <linux/notifier.h>
struct pci_dev;
struct device_node;
struct device_node;
struct notifier_block;
#ifdef CONFIG_EEH
/* Values for eeh_mode bits in device_node */
#define EEH_MODE_SUPPORTED (1<<0)
#define EEH_MODE_NOCHECK (1<<1)
#define EEH_MODE_ISOLATED (1<<2)
#ifdef CONFIG_PPC_PSERIES
extern void __init eeh_init(void);
unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val);
int eeh_dn_check_failure (struct device_node *dn, struct pci_dev *dev);
void __iomem *eeh_ioremap(unsigned long addr, void __iomem *vaddr);
void __init eeh_init(void);
unsigned long eeh_check_failure(const volatile void __iomem *token,
unsigned long val);
int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev);
void __init pci_addr_cache_build(void);
#else
#define eeh_check_failure(token, val) (val)
#endif
/**
* eeh_add_device_early
......@@ -52,7 +52,6 @@ void __init pci_addr_cache_build(void);
* device (including config space i/o). Call eeh_add_device_late
* to finish the eeh setup for this device.
*/
struct device_node;
void eeh_add_device_early(struct device_node *);
void eeh_add_device_late(struct pci_dev *);
......@@ -69,8 +68,6 @@ void eeh_remove_device(struct pci_dev *);
#define EEH_ENABLE 1
#define EEH_RELEASE_LOADSTORE 2
#define EEH_RELEASE_DMA 3
int eeh_set_option(struct pci_dev *dev, int options);
/**
* Notifier event flags.
......@@ -107,6 +104,18 @@ int eeh_unregister_notifier(struct notifier_block *nb);
*/
#define EEH_IO_ERROR_VALUE(size) (~0U >> ((4 - (size)) * 8))
#else
#define eeh_init()
#define eeh_check_failure(token, val) (val)
#define eeh_dn_check_failure(dn, dev) (0)
#define pci_addr_cache_build()
#define eeh_add_device_early(dn)
#define eeh_add_device_late(dev)
#define eeh_remove_device(dev)
#define EEH_POSSIBLE_ERROR(val, type) (0)
#define EEH_IO_ERROR_VALUE(size) (-1UL)
#endif
/*
* MMIO read/write operations with EEH support.
*/
......@@ -194,7 +203,8 @@ static inline void eeh_raw_writeq(u64 val, volatile void __iomem *addr)
#define EEH_CHECK_ALIGN(v,a) \
((((unsigned long)(v)) & ((a) - 1)) == 0)
static inline void eeh_memset_io(volatile void __iomem *addr, int c, unsigned long n)
static inline void eeh_memset_io(volatile void __iomem *addr, int c,
unsigned long n)
{
u32 lc = c;
lc |= lc << 8;
......
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