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Commit c412c2f2 authored by Nishanth Menon's avatar Nishanth Menon Committed by Vignesh Raghavendra
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arm64: dts: ti: k3-am625-sk: Add boot phase tags marking 

bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT.

Describe the same for am625-sk boot devices.
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20230911162535.1044560-4-nm@ti.comSigned-off-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
parent 944adefc
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arch/arm64/boot/dts/ti/k3-am625-sk.dts
View file @ c412c2f2
...@@ -31,6 +31,7 @@ memory@80000000 { ...@@ -31,6 +31,7 @@ memory@80000000 {
vmain_pd: regulator-0 { vmain_pd: regulator-0 {
/* TPS65988 PD CONTROLLER OUTPUT */ /* TPS65988 PD CONTROLLER OUTPUT */
bootph-all;
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vmain_pd"; regulator-name = "vmain_pd";
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
...@@ -41,6 +42,7 @@ vmain_pd: regulator-0 { ...@@ -41,6 +42,7 @@ vmain_pd: regulator-0 {
vcc_5v0: regulator-1 { vcc_5v0: regulator-1 {
/* Output of LM34936 */ /* Output of LM34936 */
bootph-all;
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vcc_5v0"; regulator-name = "vcc_5v0";
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
...@@ -52,6 +54,7 @@ vcc_5v0: regulator-1 { ...@@ -52,6 +54,7 @@ vcc_5v0: regulator-1 {
vcc_3v3_sys: regulator-2 { vcc_3v3_sys: regulator-2 {
/* output of LM61460-Q1 */ /* output of LM61460-Q1 */
bootph-all;
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vcc_3v3_sys"; regulator-name = "vcc_3v3_sys";
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
...@@ -63,6 +66,7 @@ vcc_3v3_sys: regulator-2 { ...@@ -63,6 +66,7 @@ vcc_3v3_sys: regulator-2 {
vdd_mmc1: regulator-3 { vdd_mmc1: regulator-3 {
/* TPS22918DBVR */ /* TPS22918DBVR */
bootph-all;
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vdd_mmc1"; regulator-name = "vdd_mmc1";
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
...@@ -75,6 +79,7 @@ vdd_mmc1: regulator-3 { ...@@ -75,6 +79,7 @@ vdd_mmc1: regulator-3 {
vdd_sd_dv: regulator-4 { vdd_sd_dv: regulator-4 {
/* Output of TLV71033 */ /* Output of TLV71033 */
bootph-all;
compatible = "regulator-gpio"; compatible = "regulator-gpio";
regulator-name = "tlv71033"; regulator-name = "tlv71033";
pinctrl-names = "default"; pinctrl-names = "default";
...@@ -102,6 +107,7 @@ vcc_1v8: regulator-5 { ...@@ -102,6 +107,7 @@ vcc_1v8: regulator-5 {
&main_pmx0 { &main_pmx0 {
main_rgmii2_pins_default: main-rgmii2-default-pins { main_rgmii2_pins_default: main-rgmii2-default-pins {
bootph-all;
pinctrl-single,pins = < pinctrl-single,pins = <
AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */ AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */ AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
...@@ -119,6 +125,7 @@ AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */ ...@@ -119,6 +125,7 @@ AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */
}; };
ospi0_pins_default: ospi0-default-pins { ospi0_pins_default: ospi0-default-pins {
bootph-all;
pinctrl-single,pins = < pinctrl-single,pins = <
AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */ AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */ AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
...@@ -135,20 +142,32 @@ AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */ ...@@ -135,20 +142,32 @@ AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */
}; };
vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
bootph-all;
pinctrl-single,pins = < pinctrl-single,pins = <
AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */ AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
>; >;
}; };
main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
bootph-all;
pinctrl-single,pins = < pinctrl-single,pins = <
AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */ AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
>; >;
}; };
}; };
&main_gpio0 {
bootph-all;
};
&main_gpio1 {
bootph-all;
};
&main_i2c1 { &main_i2c1 {
bootph-all;
exp1: gpio@22 { exp1: gpio@22 {
bootph-all;
compatible = "ti,tca6424"; compatible = "ti,tca6424";
reg = <0x22>; reg = <0x22>;
gpio-controller; gpio-controller;
...@@ -207,12 +226,18 @@ mbox_m4_0: mbox-m4-0 { ...@@ -207,12 +226,18 @@ mbox_m4_0: mbox-m4-0 {
}; };
}; };
&fss {
bootph-all;
};
&ospi0 { &ospi0 {
bootph-all;
status = "okay"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>; pinctrl-0 = <&ospi0_pins_default>;
flash@0 { flash@0 {
bootph-all;
compatible = "jedec,spi-nor"; compatible = "jedec,spi-nor";
reg = <0x0>; reg = <0x0>;
spi-tx-bus-width = <8>; spi-tx-bus-width = <8>;
...@@ -225,6 +250,7 @@ flash@0 { ...@@ -225,6 +250,7 @@ flash@0 {
cdns,read-delay = <4>; cdns,read-delay = <4>;
partitions { partitions {
bootph-all;
compatible = "fixed-partitions"; compatible = "fixed-partitions";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
...@@ -260,6 +286,7 @@ partition@800000 { ...@@ -260,6 +286,7 @@ partition@800000 {
}; };
partition@3fc0000 { partition@3fc0000 {
bootph-pre-ram;
label = "ospi.phypattern"; label = "ospi.phypattern";
reg = <0x3fc0000 0x40000>; reg = <0x3fc0000 0x40000>;
}; };
......
arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi
View file @ c412c2f2
...@@ -28,6 +28,7 @@ chosen { ...@@ -28,6 +28,7 @@ chosen {
}; };
memory@80000000 { memory@80000000 {
bootph-pre-ram;
device_type = "memory"; device_type = "memory";
/* 2G RAM */ /* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>; reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
...@@ -130,6 +131,7 @@ hdmi_connector_in: endpoint { ...@@ -130,6 +131,7 @@ hdmi_connector_in: endpoint {
&main_pmx0 { &main_pmx0 {
/* First pad number is ALW package and second is AMC package */ /* First pad number is ALW package and second is AMC package */
main_uart0_pins_default: main-uart0-default-pins { main_uart0_pins_default: main-uart0-default-pins {
bootph-all;
pinctrl-single,pins = < pinctrl-single,pins = <
AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14/A13) UART0_RXD */ AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14/A13) UART0_RXD */
AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14/E11) UART0_TXD */ AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14/E11) UART0_TXD */
...@@ -137,6 +139,7 @@ AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14/E11) UART0_TXD */ ...@@ -137,6 +139,7 @@ AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14/E11) UART0_TXD */
}; };
main_uart1_pins_default: main-uart1-default-pins { main_uart1_pins_default: main-uart1-default-pins {
bootph-pre-ram;
pinctrl-single,pins = < pinctrl-single,pins = <
AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19/B18) MCASP0_AXR3.UART1_CTSn */ AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19/B18) MCASP0_AXR3.UART1_CTSn */
AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19/B17) MCASP0_AXR2.UART1_RTSn */ AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19/B17) MCASP0_AXR2.UART1_RTSn */
...@@ -167,6 +170,7 @@ AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24/H19) GPMC0_CSn3.I2C2_SDA */ ...@@ -167,6 +170,7 @@ AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24/H19) GPMC0_CSn3.I2C2_SDA */
}; };
main_mmc0_pins_default: main-mmc0-default-pins { main_mmc0_pins_default: main-mmc0-default-pins {
bootph-all;
pinctrl-single,pins = < pinctrl-single,pins = <
AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3/V3) MMC0_CMD */ AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3/V3) MMC0_CMD */
AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1/Y1) MMC0_CLK */ AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1/Y1) MMC0_CLK */
...@@ -182,6 +186,7 @@ AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2/V4) MMC0_DAT7 */ ...@@ -182,6 +186,7 @@ AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2/V4) MMC0_DAT7 */
}; };
main_mmc1_pins_default: main-mmc1-default-pins { main_mmc1_pins_default: main-mmc1-default-pins {
bootph-all;
pinctrl-single,pins = < pinctrl-single,pins = <
AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21/C18) MMC1_CMD */ AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21/C18) MMC1_CMD */
AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22/A20) MMC1_CLK */ AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22/A20) MMC1_CLK */
...@@ -207,6 +212,7 @@ AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22/U16) MDIO0_MDIO */ ...@@ -207,6 +212,7 @@ AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22/U16) MDIO0_MDIO */
}; };
main_rgmii1_pins_default: main-rgmii1-default-pins { main_rgmii1_pins_default: main-rgmii1-default-pins {
bootph-all;
pinctrl-single,pins = < pinctrl-single,pins = <
AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17/W15) RGMII1_RD0 */ AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17/W15) RGMII1_RD0 */
AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17/Y16) RGMII1_RD1 */ AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17/Y16) RGMII1_RD1 */
...@@ -274,6 +280,7 @@ AM62X_IOPAD(0x078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */ ...@@ -274,6 +280,7 @@ AM62X_IOPAD(0x078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */
&mcu_pmx0 { &mcu_pmx0 {
wkup_uart0_pins_default: wkup-uart0-default-pins { wkup_uart0_pins_default: wkup-uart0-default-pins {
bootph-pre-ram;
pinctrl-single,pins = < pinctrl-single,pins = <
AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6/A7) WKUP_UART0_CTSn */ AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6/A7) WKUP_UART0_CTSn */
AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4/B4) WKUP_UART0_RTSn */ AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4/B4) WKUP_UART0_RTSn */
...@@ -285,12 +292,14 @@ AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5/C6) WKUP_UART0_TXD */ ...@@ -285,12 +292,14 @@ AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5/C6) WKUP_UART0_TXD */
&wkup_uart0 { &wkup_uart0 {
/* WKUP UART0 is used by DM firmware */ /* WKUP UART0 is used by DM firmware */
bootph-pre-ram;
status = "reserved"; status = "reserved";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&wkup_uart0_pins_default>; pinctrl-0 = <&wkup_uart0_pins_default>;
}; };
&main_uart0 { &main_uart0 {
bootph-all;
status = "okay"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>; pinctrl-0 = <&main_uart0_pins_default>;
...@@ -298,6 +307,7 @@ &main_uart0 { ...@@ -298,6 +307,7 @@ &main_uart0 {
&main_uart1 { &main_uart1 {
/* Main UART1 is used by TIFS firmware */ /* Main UART1 is used by TIFS firmware */
bootph-pre-ram;
status = "reserved"; status = "reserved";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&main_uart1_pins_default>; pinctrl-0 = <&main_uart1_pins_default>;
...@@ -390,6 +400,7 @@ sii9022_out: endpoint { ...@@ -390,6 +400,7 @@ sii9022_out: endpoint {
}; };
&sdhci0 { &sdhci0 {
bootph-all;
status = "okay"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&main_mmc0_pins_default>; pinctrl-0 = <&main_mmc0_pins_default>;
...@@ -399,6 +410,7 @@ &sdhci0 { ...@@ -399,6 +410,7 @@ &sdhci0 {
&sdhci1 { &sdhci1 {
/* SD/MMC */ /* SD/MMC */
bootph-all;
status = "okay"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&main_mmc1_pins_default>; pinctrl-0 = <&main_mmc1_pins_default>;
...@@ -407,21 +419,25 @@ &sdhci1 { ...@@ -407,21 +419,25 @@ &sdhci1 {
}; };
&cpsw3g { &cpsw3g {
bootph-all;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&main_rgmii1_pins_default>; pinctrl-0 = <&main_rgmii1_pins_default>;
}; };
&cpsw_port1 { &cpsw_port1 {
bootph-all;
phy-mode = "rgmii-rxid"; phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy0>; phy-handle = <&cpsw3g_phy0>;
}; };
&cpsw3g_mdio { &cpsw3g_mdio {
bootph-all;
status = "okay"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&main_mdio1_pins_default>; pinctrl-0 = <&main_mdio1_pins_default>;
cpsw3g_phy0: ethernet-phy@0 { cpsw3g_phy0: ethernet-phy@0 {
bootph-all;
reg = <0>; reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
......
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