Commit c465613b authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Check for CPT and not !IBX in ironlake_disable_pch_transcoder()

ironlake_enaable_pch_transcoder() checks for CPT to see if it should
enable the timing override chicken bit, but
ironlake_disable_pch_transcoder() checks for !IBX to see if it should
clear the same bit. Change ironlake_disable_pch_transcoder() to check
for CPT as well to keep the two sides consistent.
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446146763-31821-8-git-send-email-ville.syrjala@linux.intel.comReviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
parent aca7b684
...@@ -2059,7 +2059,7 @@ static void ironlake_disable_pch_transcoder(struct drm_i915_private *dev_priv, ...@@ -2059,7 +2059,7 @@ static void ironlake_disable_pch_transcoder(struct drm_i915_private *dev_priv,
if (wait_for((I915_READ(reg) & TRANS_STATE_ENABLE) == 0, 50)) if (wait_for((I915_READ(reg) & TRANS_STATE_ENABLE) == 0, 50))
DRM_ERROR("failed to disable transcoder %c\n", pipe_name(pipe)); DRM_ERROR("failed to disable transcoder %c\n", pipe_name(pipe));
if (!HAS_PCH_IBX(dev)) { if (HAS_PCH_CPT(dev)) {
/* Workaround: Clear the timing override chicken bit again. */ /* Workaround: Clear the timing override chicken bit again. */
reg = TRANS_CHICKEN2(pipe); reg = TRANS_CHICKEN2(pipe);
val = I915_READ(reg); val = I915_READ(reg);
......
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