Commit c49aed77 authored by Pierre-Louis Bossart's avatar Pierre-Louis Bossart Committed by Mark Brown

ASoC: rt5640: add internal clock source support

Adding missing definitions and flags to select internal
clock source as system clock, needed for jack detection.
Signed-off-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 29b4817d
...@@ -1870,6 +1870,9 @@ static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai, ...@@ -1870,6 +1870,9 @@ static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
case RT5640_SCLK_S_PLL1: case RT5640_SCLK_S_PLL1:
reg_val |= RT5640_SCLK_SRC_PLL1; reg_val |= RT5640_SCLK_SRC_PLL1;
break; break;
case RT5640_SCLK_S_RCCLK:
reg_val |= RT5640_SCLK_SRC_RCCLK;
break;
default: default:
dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id); dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
return -EINVAL; return -EINVAL;
......
...@@ -984,6 +984,7 @@ ...@@ -984,6 +984,7 @@
#define RT5640_SCLK_SRC_SFT 14 #define RT5640_SCLK_SRC_SFT 14
#define RT5640_SCLK_SRC_MCLK (0x0 << 14) #define RT5640_SCLK_SRC_MCLK (0x0 << 14)
#define RT5640_SCLK_SRC_PLL1 (0x1 << 14) #define RT5640_SCLK_SRC_PLL1 (0x1 << 14)
#define RT5640_SCLK_SRC_RCCLK (0x2 << 14)
#define RT5640_PLL1_SRC_MASK (0x3 << 12) #define RT5640_PLL1_SRC_MASK (0x3 << 12)
#define RT5640_PLL1_SRC_SFT 12 #define RT5640_PLL1_SRC_SFT 12
#define RT5640_PLL1_SRC_MCLK (0x0 << 12) #define RT5640_PLL1_SRC_MCLK (0x0 << 12)
......
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