Commit c49e99c2 authored by Marcin Wojtas's avatar Marcin Wojtas Committed by David S. Miller

ARM: dts: armada-38x: enable buffer manager support on Armada 38x boards

Since mvneta driver supports using hardware buffer management (BM), in
order to use it, board files have to be adjusted accordingly. This commit
enables BM on:
* A385-DB-AP - each port has its own pool for long and common pool for
short packets,
* A388-ClearFog - same as above,
* A388-DB - to each port unique 'short' and 'long' pools are mapped,
* A388-GP - same as above.

Moreover appropriate entry is added to 'soc' node ranges, as well as "okay"
status for 'bm' and 'bm-bppi' (internal SRAM) nodes.

[gregory.clement@free-electrons.com: add suppport for the ClearFog board]
Signed-off-by: default avatarMarcin Wojtas <mw@semihalf.com>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 4a547a5a
...@@ -61,7 +61,8 @@ soc { ...@@ -61,7 +61,8 @@ soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>; MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
internal-regs { internal-regs {
spi1: spi@10680 { spi1: spi@10680 {
...@@ -138,12 +139,18 @@ ethernet@30000 { ...@@ -138,12 +139,18 @@ ethernet@30000 {
status = "okay"; status = "okay";
phy = <&phy2>; phy = <&phy2>;
phy-mode = "sgmii"; phy-mode = "sgmii";
buffer-manager = <&bm>;
bm,pool-long = <1>;
bm,pool-short = <3>;
}; };
ethernet@34000 { ethernet@34000 {
status = "okay"; status = "okay";
phy = <&phy1>; phy = <&phy1>;
phy-mode = "sgmii"; phy-mode = "sgmii";
buffer-manager = <&bm>;
bm,pool-long = <2>;
bm,pool-short = <3>;
}; };
ethernet@70000 { ethernet@70000 {
...@@ -157,6 +164,13 @@ ethernet@70000 { ...@@ -157,6 +164,13 @@ ethernet@70000 {
status = "okay"; status = "okay";
phy = <&phy0>; phy = <&phy0>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
buffer-manager = <&bm>;
bm,pool-long = <0>;
bm,pool-short = <3>;
};
bm@c8000 {
status = "okay";
}; };
nfc: flash@d0000 { nfc: flash@d0000 {
...@@ -178,6 +192,10 @@ usb3@f0000 { ...@@ -178,6 +192,10 @@ usb3@f0000 {
}; };
}; };
bm-bppi {
status = "okay";
};
pcie-controller { pcie-controller {
status = "okay"; status = "okay";
......
...@@ -78,6 +78,9 @@ soc { ...@@ -78,6 +78,9 @@ soc {
internal-regs { internal-regs {
ethernet@30000 { ethernet@30000 {
phy-mode = "sgmii"; phy-mode = "sgmii";
buffer-manager = <&bm>;
bm,pool-long = <2>;
bm,pool-short = <1>;
status = "okay"; status = "okay";
fixed-link { fixed-link {
...@@ -88,6 +91,9 @@ fixed-link { ...@@ -88,6 +91,9 @@ fixed-link {
ethernet@34000 { ethernet@34000 {
phy-mode = "sgmii"; phy-mode = "sgmii";
buffer-manager = <&bm>;
bm,pool-long = <3>;
bm,pool-short = <1>;
status = "okay"; status = "okay";
fixed-link { fixed-link {
......
...@@ -66,7 +66,8 @@ soc { ...@@ -66,7 +66,8 @@ soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>; MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
internal-regs { internal-regs {
spi@10600 { spi@10600 {
...@@ -99,6 +100,9 @@ ethernet@30000 { ...@@ -99,6 +100,9 @@ ethernet@30000 {
status = "okay"; status = "okay";
phy = <&phy1>; phy = <&phy1>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
buffer-manager = <&bm>;
bm,pool-long = <2>;
bm,pool-short = <3>;
}; };
usb@58000 { usb@58000 {
...@@ -109,6 +113,9 @@ ethernet@70000 { ...@@ -109,6 +113,9 @@ ethernet@70000 {
status = "okay"; status = "okay";
phy = <&phy0>; phy = <&phy0>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
buffer-manager = <&bm>;
bm,pool-long = <0>;
bm,pool-short = <1>;
}; };
mdio@72004 { mdio@72004 {
...@@ -129,6 +136,10 @@ sata@e0000 { ...@@ -129,6 +136,10 @@ sata@e0000 {
status = "okay"; status = "okay";
}; };
bm@c8000 {
status = "okay";
};
flash@d0000 { flash@d0000 {
status = "okay"; status = "okay";
num-cs = <1>; num-cs = <1>;
...@@ -169,6 +180,10 @@ usb3@f8000 { ...@@ -169,6 +180,10 @@ usb3@f8000 {
}; };
}; };
bm-bppi {
status = "okay";
};
pcie-controller { pcie-controller {
status = "okay"; status = "okay";
/* /*
......
...@@ -60,7 +60,8 @@ soc { ...@@ -60,7 +60,8 @@ soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>; MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
internal-regs { internal-regs {
spi@10600 { spi@10600 {
...@@ -133,6 +134,9 @@ ethernet@30000 { ...@@ -133,6 +134,9 @@ ethernet@30000 {
status = "okay"; status = "okay";
phy = <&phy1>; phy = <&phy1>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
buffer-manager = <&bm>;
bm,pool-long = <2>;
bm,pool-short = <3>;
}; };
/* CON4 */ /* CON4 */
...@@ -152,6 +156,9 @@ ethernet@70000 { ...@@ -152,6 +156,9 @@ ethernet@70000 {
status = "okay"; status = "okay";
phy = <&phy0>; phy = <&phy0>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
buffer-manager = <&bm>;
bm,pool-long = <0>;
bm,pool-short = <1>;
}; };
...@@ -186,6 +193,10 @@ sata1: sata-port@1 { ...@@ -186,6 +193,10 @@ sata1: sata-port@1 {
}; };
}; };
bm@c8000 {
status = "okay";
};
sata@e0000 { sata@e0000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&sata2_pins>, <&sata3_pins>; pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
...@@ -240,6 +251,10 @@ usb3@f8000 { ...@@ -240,6 +251,10 @@ usb3@f8000 {
}; };
}; };
bm-bppi {
status = "okay";
};
pcie-controller { pcie-controller {
status = "okay"; status = "okay";
/* /*
......
...@@ -58,7 +58,8 @@ soc { ...@@ -58,7 +58,8 @@ soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>; MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
internal-regs { internal-regs {
ethernet@70000 { ethernet@70000 {
...@@ -66,6 +67,9 @@ ethernet@70000 { ...@@ -66,6 +67,9 @@ ethernet@70000 {
pinctrl-names = "default"; pinctrl-names = "default";
phy = <&phy_dedicated>; phy = <&phy_dedicated>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
buffer-manager = <&bm>;
bm,pool-long = <0>;
bm,pool-short = <1>;
status = "okay"; status = "okay";
}; };
...@@ -110,6 +114,15 @@ serial@12000 { ...@@ -110,6 +114,15 @@ serial@12000 {
pinctrl-names = "default"; pinctrl-names = "default";
status = "okay"; status = "okay";
}; };
bm@c8000 {
status = "okay";
};
}; };
bm-bppi {
status = "okay";
};
}; };
}; };
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