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Kirill Smelkov
linux
Commits
c5019a57
Commit
c5019a57
authored
Jul 24, 2005
by
David S. Miller
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[SPARC64]: Kill totally unused inline functions from asm/spitfire.h
Signed-off-by:
David S. Miller
<
davem@davemloft.net
>
parent
620de546
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include/asm-sparc64/spitfire.h
include/asm-sparc64/spitfire.h
+0
-130
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include/asm-sparc64/spitfire.h
View file @
c5019a57
...
...
@@ -56,52 +56,6 @@ extern void cheetah_enable_pcache(void);
SPITFIRE_HIGHEST_LOCKED_TLBENT : \
CHEETAH_HIGHEST_LOCKED_TLBENT)
static
__inline__
unsigned
long
spitfire_get_isfsr
(
void
)
{
unsigned
long
ret
;
__asm__
__volatile__
(
"ldxa [%1] %2, %0"
:
"=r"
(
ret
)
:
"r"
(
TLB_SFSR
),
"i"
(
ASI_IMMU
));
return
ret
;
}
static
__inline__
unsigned
long
spitfire_get_dsfsr
(
void
)
{
unsigned
long
ret
;
__asm__
__volatile__
(
"ldxa [%1] %2, %0"
:
"=r"
(
ret
)
:
"r"
(
TLB_SFSR
),
"i"
(
ASI_DMMU
));
return
ret
;
}
static
__inline__
unsigned
long
spitfire_get_sfar
(
void
)
{
unsigned
long
ret
;
__asm__
__volatile__
(
"ldxa [%1] %2, %0"
:
"=r"
(
ret
)
:
"r"
(
DMMU_SFAR
),
"i"
(
ASI_DMMU
));
return
ret
;
}
static
__inline__
void
spitfire_put_isfsr
(
unsigned
long
sfsr
)
{
__asm__
__volatile__
(
"stxa %0, [%1] %2
\n\t
"
"membar #Sync"
:
/* no outputs */
:
"r"
(
sfsr
),
"r"
(
TLB_SFSR
),
"i"
(
ASI_IMMU
));
}
static
__inline__
void
spitfire_put_dsfsr
(
unsigned
long
sfsr
)
{
__asm__
__volatile__
(
"stxa %0, [%1] %2
\n\t
"
"membar #Sync"
:
/* no outputs */
:
"r"
(
sfsr
),
"r"
(
TLB_SFSR
),
"i"
(
ASI_DMMU
));
}
/* The data cache is write through, so this just invalidates the
* specified line.
*/
...
...
@@ -193,90 +147,6 @@ static __inline__ void spitfire_put_itlb_data(int entry, unsigned long data)
"i"
(
ASI_ITLB_DATA_ACCESS
));
}
/* Spitfire hardware assisted TLB flushes. */
/* Context level flushes. */
static
__inline__
void
spitfire_flush_dtlb_primary_context
(
void
)
{
__asm__
__volatile__
(
"stxa %%g0, [%0] %1
\n\t
"
"membar #Sync"
:
/* No outputs */
:
"r"
(
0x40
),
"i"
(
ASI_DMMU_DEMAP
));
}
static
__inline__
void
spitfire_flush_itlb_primary_context
(
void
)
{
__asm__
__volatile__
(
"stxa %%g0, [%0] %1
\n\t
"
"membar #Sync"
:
/* No outputs */
:
"r"
(
0x40
),
"i"
(
ASI_IMMU_DEMAP
));
}
static
__inline__
void
spitfire_flush_dtlb_secondary_context
(
void
)
{
__asm__
__volatile__
(
"stxa %%g0, [%0] %1
\n\t
"
"membar #Sync"
:
/* No outputs */
:
"r"
(
0x50
),
"i"
(
ASI_DMMU_DEMAP
));
}
static
__inline__
void
spitfire_flush_itlb_secondary_context
(
void
)
{
__asm__
__volatile__
(
"stxa %%g0, [%0] %1
\n\t
"
"membar #Sync"
:
/* No outputs */
:
"r"
(
0x50
),
"i"
(
ASI_IMMU_DEMAP
));
}
static
__inline__
void
spitfire_flush_dtlb_nucleus_context
(
void
)
{
__asm__
__volatile__
(
"stxa %%g0, [%0] %1
\n\t
"
"membar #Sync"
:
/* No outputs */
:
"r"
(
0x60
),
"i"
(
ASI_DMMU_DEMAP
));
}
static
__inline__
void
spitfire_flush_itlb_nucleus_context
(
void
)
{
__asm__
__volatile__
(
"stxa %%g0, [%0] %1
\n\t
"
"membar #Sync"
:
/* No outputs */
:
"r"
(
0x60
),
"i"
(
ASI_IMMU_DEMAP
));
}
/* Page level flushes. */
static
__inline__
void
spitfire_flush_dtlb_primary_page
(
unsigned
long
page
)
{
__asm__
__volatile__
(
"stxa %%g0, [%0] %1
\n\t
"
"membar #Sync"
:
/* No outputs */
:
"r"
(
page
),
"i"
(
ASI_DMMU_DEMAP
));
}
static
__inline__
void
spitfire_flush_itlb_primary_page
(
unsigned
long
page
)
{
__asm__
__volatile__
(
"stxa %%g0, [%0] %1
\n\t
"
"membar #Sync"
:
/* No outputs */
:
"r"
(
page
),
"i"
(
ASI_IMMU_DEMAP
));
}
static
__inline__
void
spitfire_flush_dtlb_secondary_page
(
unsigned
long
page
)
{
__asm__
__volatile__
(
"stxa %%g0, [%0] %1
\n\t
"
"membar #Sync"
:
/* No outputs */
:
"r"
(
page
|
0x10
),
"i"
(
ASI_DMMU_DEMAP
));
}
static
__inline__
void
spitfire_flush_itlb_secondary_page
(
unsigned
long
page
)
{
__asm__
__volatile__
(
"stxa %%g0, [%0] %1
\n\t
"
"membar #Sync"
:
/* No outputs */
:
"r"
(
page
|
0x10
),
"i"
(
ASI_IMMU_DEMAP
));
}
static
__inline__
void
spitfire_flush_dtlb_nucleus_page
(
unsigned
long
page
)
{
__asm__
__volatile__
(
"stxa %%g0, [%0] %1
\n\t
"
...
...
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