Commit c5365313 authored by Adrian Bunk's avatar Adrian Bunk Committed by Paul Mackerras

[POWERPC] Remove the broken Gemini support

Signed-off-by: default avatarAdrian Bunk <bunk@stusta.de>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent cfcd1705
......@@ -344,12 +344,7 @@ i##n: \
/* System reset */
/* core99 pmac starts the seconary here by changing the vector, and
putting it back to what it was (unknown_exception) when done. */
#if defined(CONFIG_GEMINI) && defined(CONFIG_SMP)
. = 0x100
b __secondary_start_gemini
#else
EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
#endif
/* Machine check */
/*
......
......@@ -104,15 +104,6 @@ config RADSTONE_PPC7D
config PAL4
bool "SBS-Palomar4"
config GEMINI
bool "Synergy-Gemini"
select PPC_INDIRECT_PCI
depends on BROKEN
help
Select Gemini if configuring for a Synergy Microsystems' Gemini
series Single Board Computer. More information is available at:
<http://www.synergymicro.com/PressRel/97_10_15.html>.
config EST8260
bool "EST8260"
---help---
......
......@@ -670,15 +670,6 @@ config RADSTONE_PPC7D
config PAL4
bool "SBS-Palomar4"
config GEMINI
bool "Synergy-Gemini"
depends on BROKEN
select PPC_INDIRECT_PCI
help
Select Gemini if configuring for a Synergy Microsystems' Gemini
series Single Board Computer. More information is available at:
<http://www.synergymicro.com/PressRel/97_10_15.html>.
config EST8260
bool "EST8260"
---help---
......
......@@ -116,10 +116,6 @@ zimageinitrd-$(CONFIG_WALNUT) := zImage.initrd-TREE
extra.o-$(CONFIG_CHESTNUT) := misc-chestnut.o
end-$(CONFIG_CHESTNUT) := chestnut
zimage-$(CONFIG_GEMINI) := zImage-STRIPELF
zimageinitrd-$(CONFIG_GEMINI) := zImage.initrd-STRIPELF
end-$(CONFIG_GEMINI) := gemini
extra.o-$(CONFIG_KATANA) := misc-katana.o
end-$(CONFIG_KATANA) := katana
cacheflag-$(CONFIG_KATANA) := -include $(clear_L2_L3)
......
......@@ -42,14 +42,11 @@
#endif
/* Will / Can the user give input?
* Val Henson has requested that Gemini doesn't wait for the
* user to edit the cmdline or not.
*/
#if (defined(CONFIG_SERIAL_8250_CONSOLE) \
|| defined(CONFIG_VGA_CONSOLE) \
|| defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
|| defined(CONFIG_SERIAL_MPSC_CONSOLE)) \
&& !defined(CONFIG_GEMINI)
|| defined(CONFIG_SERIAL_MPSC_CONSOLE))
#define INTERACTIVE_CONSOLE 1
#endif
......@@ -178,16 +175,6 @@ decompress_kernel(unsigned long load_addr, int num_words, unsigned long cksum)
if (keyb_present)
CRT_tstc(); /* Forces keyboard to be initialized */
#ifdef CONFIG_GEMINI
/*
* If cmd_line is empty and cmd_preset is not, copy cmd_preset
* to cmd_line. This way we can override cmd_preset with the
* command line from Smon.
*/
if ( (cmd_line[0] == '\0') && (cmd_preset[0] != '\0'))
memcpy (cmd_line, cmd_preset, sizeof(cmd_preset));
#endif
/* Display standard Linux/PPC boot prompt for kernel args */
puts("\nLinux/PPC load: ");
......
This diff is collapsed.
......@@ -310,12 +310,7 @@ i##n: \
/* System reset */
/* core99 pmac starts the seconary here by changing the vector, and
putting it back to what it was (unknown_exception) when done. */
#if defined(CONFIG_GEMINI) && defined(CONFIG_SMP)
. = 0x100
b __secondary_start_gemini
#else
EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
#endif
/* Machine check */
. = 0x200
......@@ -897,19 +892,6 @@ fix_mem_constants:
#endif /* CONFIG_APUS */
#ifdef CONFIG_SMP
#ifdef CONFIG_GEMINI
.globl __secondary_start_gemini
__secondary_start_gemini:
mfspr r4,SPRN_HID0
ori r4,r4,HID0_ICFI
li r3,0
ori r3,r3,HID0_ICE
andc r4,r4,r3
mtspr SPRN_HID0,r4
sync
b __secondary_start
#endif /* CONFIG_GEMINI */
.globl __secondary_start_pmac_0
__secondary_start_pmac_0:
/* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
......
......@@ -13,7 +13,6 @@ obj-$(CONFIG_TQM8260) += tqm8260_setup.o
obj-$(CONFIG_CPCI690) += cpci690.o
obj-$(CONFIG_EV64260) += ev64260.o
obj-$(CONFIG_CHESTNUT) += chestnut.o
obj-$(CONFIG_GEMINI) += gemini_pci.o gemini_setup.o gemini_prom.o
obj-$(CONFIG_LOPEC) += lopec.o
obj-$(CONFIG_KATANA) += katana.o
obj-$(CONFIG_HDPU) += hdpu.o
......
/*
* Onboard registers and descriptions for Synergy Microsystems'
* "Gemini" boards.
*
*/
#ifdef __KERNEL__
#ifndef __PPC_GEMINI_H
#define __PPC_GEMINI_H
/* Registers */
#define GEMINI_SERIAL_B (0xffeffb00)
#define GEMINI_SERIAL_A (0xffeffb08)
#define GEMINI_USWITCH (0xffeffd00)
#define GEMINI_BREV (0xffeffe00)
#define GEMINI_BECO (0xffeffe08)
#define GEMINI_FEAT (0xffeffe10)
#define GEMINI_BSTAT (0xffeffe18)
#define GEMINI_CPUSTAT (0xffeffe20)
#define GEMINI_L2CFG (0xffeffe30)
#define GEMINI_MEMCFG (0xffeffe38)
#define GEMINI_FLROM (0xffeffe40)
#define GEMINI_P0PCI (0xffeffe48)
#define GEMINI_FLWIN (0xffeffe50)
#define GEMINI_P0INTMASK (0xffeffe60)
#define GEMINI_P0INTAP (0xffeffe68)
#define GEMINI_PCIERR (0xffeffe70)
#define GEMINI_LEDBASE (0xffeffe80)
#define GEMINI_RTC (0xffe9fff8)
#define GEMINI_LEDS 8
#define GEMINI_SWITCHES 8
/* Flash ROM bit definitions */
#define GEMINI_FLS_WEN (1<<0)
#define GEMINI_FLS_JMP (1<<6)
#define GEMINI_FLS_BOOT (1<<7)
/* Memory bit definitions */
#define GEMINI_MEM_TYPE_MASK 0xc0
#define GEMINI_MEM_SIZE_MASK 0x38
#define GEMINI_MEM_BANK_MASK 0x07
/* L2 cache bit definitions */
#define GEMINI_L2_SIZE_MASK 0xc0
#define GEMINI_L2_RATIO_MASK 0x03
/* Timebase register bit definitons */
#define GEMINI_TIMEB0_EN (1<<0)
#define GEMINI_TIMEB1_EN (1<<1)
#define GEMINI_TIMEB2_EN (1<<2)
#define GEMINI_TIMEB3_EN (1<<3)
/* CPU status bit definitions */
#define GEMINI_CPU_ID_MASK 0x03
#define GEMINI_CPU_COUNT_MASK 0x0c
#define GEMINI_CPU0_HALTED (1<<4)
#define GEMINI_CPU1_HALTED (1<<5)
#define GEMINI_CPU2_HALTED (1<<6)
#define GEMINI_CPU3_HALTED (1<<7)
/* Board status bit definitions */
#define GEMINI_BRD_FAIL (1<<0) /* FAIL led is lit */
#define GEMINI_BRD_BUS_MASK 0x0c /* PowerPC bus speed */
/* Board family/feature bit descriptions */
#define GEMINI_FEAT_HAS_FLASH (1<<0)
#define GEMINI_FEAT_HAS_ETH (1<<1)
#define GEMINI_FEAT_HAS_SCSI (1<<2)
#define GEMINI_FEAT_HAS_P0 (1<<3)
#define GEMINI_FEAT_FAM_MASK 0xf0
/* Mod/ECO bit definitions */
#define GEMINI_ECO_LEVEL_MASK 0x0f
#define GEMINI_MOD_MASK 0xf0
/* Type/revision bit definitions */
#define GEMINI_REV_MASK 0x0f
#define GEMINI_TYPE_MASK 0xf0
/* User switch definitions */
#define GEMINI_SWITCH_VERBOSE 1 /* adds "debug" to boot cmd line */
#define GEMINI_SWITCH_SINGLE_USER 7 /* boots into "single-user" mode */
#define SGS_RTC_CONTROL 0
#define SGS_RTC_SECONDS 1
#define SGS_RTC_MINUTES 2
#define SGS_RTC_HOURS 3
#define SGS_RTC_DAY 4
#define SGS_RTC_DAY_OF_MONTH 5
#define SGS_RTC_MONTH 6
#define SGS_RTC_YEAR 7
#define SGS_RTC_SET 0x80
#define SGS_RTC_IS_STOPPED 0x80
#define GRACKLE_CONFIG_ADDR_ADDR (0xfec00000)
#define GRACKLE_CONFIG_DATA_ADDR (0xfee00000)
#define GEMINI_BOOT_INIT (0xfff00100)
#ifndef __ASSEMBLY__
static inline void grackle_write( unsigned long addr, unsigned long data )
{
__asm__ __volatile__(
" stwbrx %1, 0, %0\n \
sync\n \
stwbrx %3, 0, %2\n \
sync "
: /* no output */
: "r" (GRACKLE_CONFIG_ADDR_ADDR), "r" (addr),
"r" (GRACKLE_CONFIG_DATA_ADDR), "r" (data));
}
static inline unsigned long grackle_read( unsigned long addr )
{
unsigned long val;
__asm__ __volatile__(
" stwbrx %1, 0, %2\n \
sync\n \
lwbrx %0, 0, %3\n \
sync "
: "=r" (val)
: "r" (addr), "r" (GRACKLE_CONFIG_ADDR_ADDR),
"r" (GRACKLE_CONFIG_DATA_ADDR));
return val;
}
static inline void gemini_led_on( int led )
{
if (led >= 0 && led < GEMINI_LEDS)
*(unsigned char *)(GEMINI_LEDBASE + (led<<3)) = 1;
}
static inline void gemini_led_off(int led)
{
if (led >= 0 && led < GEMINI_LEDS)
*(unsigned char *)(GEMINI_LEDBASE + (led<<3)) = 0;
}
static inline int gemini_led_val(int led)
{
int val = 0;
if (led >= 0 && led < GEMINI_LEDS)
val = *(unsigned char *)(GEMINI_LEDBASE + (led<<3));
return (val & 0x1);
}
/* returns processor id from the board */
static inline int gemini_processor(void)
{
unsigned char cpu = *(unsigned char *)(GEMINI_CPUSTAT);
return (int) ((cpu == 0) ? 4 : (cpu & GEMINI_CPU_ID_MASK));
}
extern void _gemini_reboot(void);
extern void gemini_prom_init(void);
extern void gemini_init_l2(void);
#endif /* __ASSEMBLY__ */
#endif
#endif /* __KERNEL__ */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include <asm/machdep.h>
#include <platforms/gemini.h>
#include <asm/byteorder.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#include <asm/pci-bridge.h>
void __init gemini_pcibios_fixup(void)
{
int i;
struct pci_dev *dev = NULL;
for_each_pci_dev(dev) {
for(i = 0; i < 6; i++) {
if (dev->resource[i].flags & IORESOURCE_IO) {
dev->resource[i].start |= (0xfe << 24);
dev->resource[i].end |= (0xfe << 24);
}
}
}
}
/* The "bootloader" for Synergy boards does none of this for us, so we need to
lay it all out ourselves... --Dan */
void __init gemini_find_bridges(void)
{
struct pci_controller* hose;
ppc_md.pcibios_fixup = gemini_pcibios_fixup;
hose = pcibios_alloc_controller();
if (!hose)
return;
setup_indirect_pci(hose, 0xfec00000, 0xfee00000);
}
/*
* Not really prom support code (yet), but sort of anti-prom code. The current
* bootloader does a number of things it shouldn't and doesn't do things that it
* should. The stuff in here is mainly a hodge-podge collection of setup code
* to get the board up and running.
* ---Dan
*/
#include <asm/reg.h>
#include <asm/page.h>
#include <platforms/gemini.h>
#include <asm/ppc_asm.h>
/*
* On 750's the MMU is on when Linux is booted, so we need to clear out the
* bootloader's BAT settings, make sure we're in supervisor state (gotcha!),
* and turn off the MMU.
*
*/
_GLOBAL(gemini_prom_init)
#ifdef CONFIG_SMP
/* Since the MMU's on, get stuff in rom space that we'll need */
lis r4,GEMINI_CPUSTAT@h
ori r4,r4,GEMINI_CPUSTAT@l
lbz r5,0(r4)
andi. r5,r5,3
mr r24,r5 /* cpu # used later on */
#endif
mfmsr r4
li r3,MSR_PR /* ensure supervisor! */
ori r3,r3,MSR_IR|MSR_DR
andc r4,r4,r3
mtmsr r4
isync
#if 0
/* zero out the bats now that the MMU is off */
prom_no_mmu:
li r3,0
mtspr SPRN_IBAT0U,r3
mtspr SPRN_IBAT0L,r3
mtspr SPRN_IBAT1U,r3
mtspr SPRN_IBAT1L,r3
mtspr SPRN_IBAT2U,r3
mtspr SPRN_IBAT2L,r3
mtspr SPRN_IBAT3U,r3
mtspr SPRN_IBAT3L,r3
mtspr SPRN_DBAT0U,r3
mtspr SPRN_DBAT0L,r3
mtspr SPRN_DBAT1U,r3
mtspr SPRN_DBAT1L,r3
mtspr SPRN_DBAT2U,r3
mtspr SPRN_DBAT2L,r3
mtspr SPRN_DBAT3U,r3
mtspr SPRN_DBAT3L,r3
#endif
/* the bootloader (as far as I'm currently aware) doesn't mess with page
tables, but since we're already here, might as well zap these, too */
li r4,0
mtspr SPRN_SDR1,r4
li r4,16
mtctr r4
li r3,0
li r4,0
3: mtsrin r3,r4
addi r3,r3,1
bdnz 3b
#ifdef CONFIG_SMP
/* The 750 book (and Mot/IBM support) says that this will "assist" snooping
when in SMP. Not sure yet whether this should stay or leave... */
mfspr r4,SPRN_HID0
ori r4,r4,HID0_ABE
mtspr SPRN_HID0,r4
sync
#endif /* CONFIG_SMP */
blr
/* apparently, SMon doesn't pay attention to HID0[SRST]. Disable the MMU and
branch to 0xfff00100 */
_GLOBAL(_gemini_reboot)
lis r5,GEMINI_BOOT_INIT@h
ori r5,r5,GEMINI_BOOT_INIT@l
li r6,MSR_IP
mtspr SPRN_SRR0,r5
mtspr SPRN_SRR1,r6
rfi
#ifdef __KERNEL__
#ifndef __ASMPPC_GEMINI_SERIAL_H
#define __ASMPPC_GEMINI_SERIAL_H
#include <platforms/gemini.h>
#ifdef CONFIG_SERIAL_MANY_PORTS
#define RS_TABLE_SIZE 64
#else
#define RS_TABLE_SIZE 4
#endif
/* Rate for the 24.576 Mhz clock for the onboard serial chip */
#define BASE_BAUD (24576000 / 16)
#ifdef CONFIG_SERIAL_DETECT_IRQ
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_AUTO_IRQ)
#else
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST)
#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF)
#endif
#define STD_SERIAL_PORT_DEFNS \
{ 0, BASE_BAUD, GEMINI_SERIAL_A, 15, STD_COM_FLAGS }, /* ttyS0 */ \
{ 0, BASE_BAUD, GEMINI_SERIAL_B, 14, STD_COM_FLAGS }, /* ttyS1 */ \
#ifdef CONFIG_GEMINI_PU32
#define PU32_SERIAL_PORT_DEFNS \
{ 0, BASE_BAUD, NULL, 0, STD_COM_FLAGS },
#else
#define PU32_SERIAL_PORT_DEFNS
#endif
#define SERIAL_PORT_DFNS \
STD_SERIAL_PORT_DEFNS \
PU32_SERIAL_PORT_DEFNS
#endif
#endif /* __KERNEL__ */
This diff is collapsed.
......@@ -45,7 +45,6 @@ obj-$(CONFIG_EBONY) += pci_auto.o todc_time.o
obj-$(CONFIG_EV64260) += todc_time.o pci_auto.o
obj-$(CONFIG_EV64360) += todc_time.o
obj-$(CONFIG_CHESTNUT) += mv64360_pic.o pci_auto.o
obj-$(CONFIG_GEMINI) += open_pic.o
obj-$(CONFIG_GT64260) += gt64260_pic.o
obj-$(CONFIG_LOPEC) += pci_auto.o todc_time.o
obj-$(CONFIG_HDPU) += pci_auto.o
......
......@@ -58,10 +58,7 @@ static struct sysrq_key_op sysrq_xmon_op =
void
xmon_map_scc(void)
{
#if defined(CONFIG_GEMINI)
/* should already be mapped by the kernel boot */
sccd = (volatile unsigned char *) 0xffeffb08;
#elif defined(CONFIG_405GP)
#if defined(CONFIG_405GP)
sccd = (volatile unsigned char *)0xef600300;
#elif defined(CONFIG_440EP)
sccd = (volatile unsigned char *) ioremap(PPC440EP_UART0_ADDR, 8);
......
/*
* Registers for the SGS-Thomson M48T35 Timekeeper RAM chip
* and
* Registers for the SGS-Thomson M48T37 Timekeeper RAM chip
* The 37 is the 35 plus alarm and century thus the offsets
* are shifted by the extra registers.
*/
#ifndef __PPC_M48T35_H
#define __PPC_M48T35_H
/* RTC offsets */
#define M48T35_RTC_FLAGS (-8) /* the negative regs are really T37 only */
#define M48T35_RTC_CENTURY (-7)
#define M48T35_RTC_AL_SEC (-6)
#define M48T35_RTC_AL_MIN (-5)
#define M48T35_RTC_AL_HRS (-4)
#define M48T35_RTC_AL_DOM (-3)
#define M48T35_RTC_INTERRUPT (-2)
#define M48T35_RTC_WATCHDOG (-1)
#define M48T35_RTC_CONTROL 0 /* T35 starts here */
#define M48T35_RTC_SECONDS 1
#define M48T35_RTC_MINUTES 2
#define M48T35_RTC_HOURS 3
#define M48T35_RTC_DAY 4
#define M48T35_RTC_DOM 5
#define M48T35_RTC_MONTH 6
#define M48T35_RTC_YEAR 7
/* this way help us know which bits go with which regs */
#define M48T35_RTC_FLAGS_BL 0x10
#define M48T35_RTC_FLAGS_AF 0x40
#define M48T35_RTC_FLAGS_WDF 0x80
#define M48T35_RTC_INTERRUPT_AFE 0x80
#define M48T35_RTC_INTERRUPT_ABE 0x20
#define M48T35_RTC_INTERRUPT_ALL (M48T35_RTC_INTERRUPT_AFE|M48T35_RTC_INTERRUPT_ABE)
#define M48T35_RTC_WATCHDOG_RB 0x03
#define M48T35_RTC_WATCHDOG_BMB 0x7c
#define M48T35_RTC_WATCHDOG_WDS 0x80
#define M48T35_RTC_WATCHDOG_ALL (M48T35_RTC_WATCHDOG_RB|M48T35_RTC_WATCHDOG_BMB|M48T35_RTC_W)
#define M48T35_RTC_CONTROL_WRITE 0x80
#define M48T35_RTC_CONTROL_READ 0x40
#define M48T35_RTC_CONTROL_CAL_SIGN 0x20
#define M48T35_RTC_CONTROL_CAL_VALUE 0x1f
#define M48T35_RTC_CONTROL_LOCKED (M48T35_RTC_WRITE|M48T35_RTC_READ)
#define M48T35_RTC_CONTROL_CALIBRATION (M48T35_RTC_CONTROL_CAL_SIGN|M48T35_RTC_CONTROL_CAL_VALUE)
#define M48T35_RTC_SECONDS_SEC_1 0x0f
#define M48T35_RTC_SECONDS_SEC_10 0x70
#define M48T35_RTC_SECONDS_ST 0x80
#define M48T35_RTC_SECONDS_SEC_ALL (M48T35_RTC_SECONDS_SEC_1|M48T35_RTC_SECONDS_SEC_10)
#define M48T35_RTC_MINUTES_MIN_1 0x0f
#define M48T35_RTC_MINUTES_MIN_10 0x70
#define M48T35_RTC_MINUTES_MIN_ALL (M48T35_RTC_MINUTES_MIN_1|M48T35_RTC_MINUTES_MIN_10)
#define M48T35_RTC_HOURS_HRS_1 0x0f
#define M48T35_RTC_HOURS_HRS_10 0x30
#define M48T35_RTC_HOURS_HRS_ALL (M48T35_RTC_HOURS_HRS_1|M48T35_RTC_HOURS_HRS_10)
#define M48T35_RTC_DAY_DAY_1 0x03
#define M48T35_RTC_DAY_FT 0x40
#define M48T35_RTC_ALARM_OFF 0x00
#define M48T35_RTC_WATCHDOG_OFF 0x00
/* legacy */
#define M48T35_RTC_SET 0x80
#define M48T35_RTC_STOPPED 0x80
#define M48T35_RTC_READ 0x40
#endif
......@@ -11,8 +11,6 @@
#include <platforms/ev64260.h>
#elif defined(CONFIG_CHESTNUT)
#include <platforms/chestnut.h>
#elif defined(CONFIG_GEMINI)
#include <platforms/gemini_serial.h>
#elif defined(CONFIG_POWERPMC250)
#include <platforms/powerpmc250.h>
#elif defined(CONFIG_LOPEC)
......
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