Commit c56b4bcb authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk

into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents 23a3e707 99355085
...@@ -60,15 +60,20 @@ __und_invalid: sub sp, sp, #S_FRAME_SIZE ...@@ -60,15 +60,20 @@ __und_invalid: sub sp, sp, #S_FRAME_SIZE
/* /*
* SVC mode handlers * SVC mode handlers
*/ */
.macro svc_entry, sym
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ save r0 - r12
ldr r2, .LC\sym
add r0, sp, #S_FRAME_SIZE
ldmia r2, {r2 - r4} @ get pc, cpsr
add r5, sp, #S_SP
mov r1, lr
stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_ro
.endm
.align 5 .align 5
__dabt_svc: sub sp, sp, #S_FRAME_SIZE __dabt_svc:
stmia sp, {r0 - r12} @ save r0 - r12 svc_entry abt
ldr r2, .LCabt
add r0, sp, #S_FRAME_SIZE
ldmia r2, {r2 - r4} @ get pc, cpsr
add r5, sp, #S_SP
mov r1, lr
stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_ro
mrs r9, cpsr @ Enable interrupts if they were mrs r9, cpsr @ Enable interrupts if they were
tst r3, #PSR_I_BIT tst r3, #PSR_I_BIT
biceq r9, r9, #PSR_I_BIT @ previously biceq r9, r9, #PSR_I_BIT @ previously
...@@ -91,14 +96,8 @@ __dabt_svc: sub sp, sp, #S_FRAME_SIZE ...@@ -91,14 +96,8 @@ __dabt_svc: sub sp, sp, #S_FRAME_SIZE
ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr
.align 5 .align 5
__irq_svc: sub sp, sp, #S_FRAME_SIZE __irq_svc:
stmia sp, {r0 - r12} @ save r0 - r12 svc_entry irq
ldr r7, .LCirq
add r5, sp, #S_FRAME_SIZE
ldmia r7, {r7 - r9}
add r4, sp, #S_SP
mov r6, lr
stmia r4, {r5, r6, r7, r8, r9} @ save sp_SVC, lr_SVC, pc, cpsr, old_ro
#ifdef CONFIG_PREEMPT #ifdef CONFIG_PREEMPT
get_thread_info r8 get_thread_info r8
ldr r9, [r8, #TI_PREEMPT] @ get preempt count ldr r9, [r8, #TI_PREEMPT] @ get preempt count
...@@ -148,16 +147,10 @@ svc_preempt: teq r9, #0 @ was preempt count = 0 ...@@ -148,16 +147,10 @@ svc_preempt: teq r9, #0 @ was preempt count = 0
#endif #endif
.align 5 .align 5
__und_svc: sub sp, sp, #S_FRAME_SIZE __und_svc:
stmia sp, {r0 - r12} @ save r0 - r12 svc_entry und
ldr r3, .LCund
mov r4, lr ldr r0, [r2, #-4] @ r0 = instruction
ldmia r3, {r5 - r7}
add r3, sp, #S_FRAME_SIZE
add r2, sp, #S_SP
stmia r2, {r3 - r7} @ save sp_SVC, lr_SVC, pc, cpsr, old_ro
ldr r0, [r5, #-4] @ r0 = instruction
adrsvc al, r9, 1f @ r9 = normal FP return adrsvc al, r9, 1f @ r9 = normal FP return
bl call_fpe @ lr = undefined instr return bl call_fpe @ lr = undefined instr return
...@@ -170,14 +163,8 @@ __und_svc: sub sp, sp, #S_FRAME_SIZE ...@@ -170,14 +163,8 @@ __und_svc: sub sp, sp, #S_FRAME_SIZE
ldmia sp, {r0 - pc}^ @ Restore SVC registers ldmia sp, {r0 - pc}^ @ Restore SVC registers
.align 5 .align 5
__pabt_svc: sub sp, sp, #S_FRAME_SIZE __pabt_svc:
stmia sp, {r0 - r12} @ save r0 - r12 svc_entry abt
ldr r2, .LCabt
add r0, sp, #S_FRAME_SIZE
ldmia r2, {r2 - r4} @ get pc, cpsr
add r5, sp, #S_SP
mov r1, lr
stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_ro
mrs r9, cpsr @ Enable interrupts if they were mrs r9, cpsr @ Enable interrupts if they were
tst r3, #PSR_I_BIT tst r3, #PSR_I_BIT
biceq r9, r9, #PSR_I_BIT @ previously biceq r9, r9, #PSR_I_BIT @ previously
......
...@@ -744,11 +744,12 @@ static void s3c24xx_serial_set_termios(struct uart_port *port, ...@@ -744,11 +744,12 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
unsigned long flags; unsigned long flags;
unsigned int baud, quot; unsigned int baud, quot;
unsigned int ulcon; unsigned int ulcon;
unsigned int umcon;
/* /*
* We don't support modem control lines. * We don't support modem control lines.
*/ */
termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR); termios->c_cflag &= ~(HUPCL | CMSPAR);
termios->c_cflag |= CLOCAL; termios->c_cflag |= CLOCAL;
/* /*
...@@ -806,8 +807,10 @@ static void s3c24xx_serial_set_termios(struct uart_port *port, ...@@ -806,8 +807,10 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
if (termios->c_cflag & CSTOPB) if (termios->c_cflag & CSTOPB)
ulcon |= S3C2410_LCON_STOPB; ulcon |= S3C2410_LCON_STOPB;
umcon = (termios->c_cflag & CRTSCTS) ? S3C2410_UMCOM_AFC : 0;
if (termios->c_cflag & PARENB) { if (termios->c_cflag & PARENB) {
if (!(termios->c_cflag & PARODD)) if (termios->c_cflag & PARODD)
ulcon |= S3C2410_LCON_PODD; ulcon |= S3C2410_LCON_PODD;
else else
ulcon |= S3C2410_LCON_PEVEN; ulcon |= S3C2410_LCON_PEVEN;
...@@ -821,6 +824,7 @@ static void s3c24xx_serial_set_termios(struct uart_port *port, ...@@ -821,6 +824,7 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
wr_regl(port, S3C2410_ULCON, ulcon); wr_regl(port, S3C2410_ULCON, ulcon);
wr_regl(port, S3C2410_UBRDIV, quot); wr_regl(port, S3C2410_UBRDIV, quot);
wr_regl(port, S3C2410_UMCON, umcon);
dbg("uart: ulcon = 0x%08x, ucon = 0x%08x, ufcon = 0x%08x\n", dbg("uart: ulcon = 0x%08x, ucon = 0x%08x, ufcon = 0x%08x\n",
rd_regl(port, S3C2410_ULCON), rd_regl(port, S3C2410_ULCON),
......
...@@ -31,6 +31,8 @@ ...@@ -31,6 +31,8 @@
#ifdef CONFIG_DISCONTIGMEM #ifdef CONFIG_DISCONTIGMEM
#define NODES_SHIFT 4 /* Up to 16 nodes */
/* /*
* Given a kernel address, find the home node of the underlying memory. * Given a kernel address, find the home node of the underlying memory.
*/ */
......
...@@ -65,12 +65,9 @@ static inline unsigned sz __in##fnsuffix (unsigned int port) \ ...@@ -65,12 +65,9 @@ static inline unsigned sz __in##fnsuffix (unsigned int port) \
return (unsigned sz)value; \ return (unsigned sz)value; \
} }
static inline unsigned int __ioaddr (unsigned int port) static inline void __iomem *__ioaddr (unsigned int port)
{ {
if (__PORT_PCIO(port)) return (void __iomem *)(__PORT_PCIO(port) ? PCIO_BASE + port : port);
return (unsigned int)(PCIO_BASE + (port));
else
return (unsigned int)(0 + (port));
} }
#define DECLARE_IO(sz,fnsuffix,instr) \ #define DECLARE_IO(sz,fnsuffix,instr) \
...@@ -170,7 +167,7 @@ DECLARE_IO(int,l,"") ...@@ -170,7 +167,7 @@ DECLARE_IO(int,l,"")
result; \ result; \
}) })
#define __ioaddrc(port) (__PORT_PCIO((port)) ? PCIO_BASE + ((port)) : ((port))) #define __ioaddrc(port) ((void __iomem *)(__PORT_PCIO(port) ? PCIO_BASE + (port) : (port)))
#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) #define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p))
#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) #define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p))
......
...@@ -113,6 +113,9 @@ ...@@ -113,6 +113,9 @@
S3C2410_UFCON_TXTRIG0 | \ S3C2410_UFCON_TXTRIG0 | \
S3C2410_UFCON_RXTRIG8 ) S3C2410_UFCON_RXTRIG8 )
#define S3C2410_UMCOM_AFC (1<<4)
#define S3C2410_UMCOM_RTS_LOW (1<<0)
#define S3C2410_UFSTAT_TXFULL (1<<9) #define S3C2410_UFSTAT_TXFULL (1<<9)
#define S3C2410_UFSTAT_RXFULL (1<<8) #define S3C2410_UFSTAT_RXFULL (1<<8)
#define S3C2410_UFSTAT_TXMASK (15<<4) #define S3C2410_UFSTAT_TXMASK (15<<4)
......
...@@ -7,12 +7,17 @@ ...@@ -7,12 +7,17 @@
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
/* This declaration for the size of the NUMA (CONFIG_DISCONTIGMEM)
* memory node table is the default.
*
* A good place to override this value is include/asm/arch/memory.h.
*/
#ifndef __ASM_ARM_NUMNODES_H #ifndef __ASM_ARM_NUMNODES_H
#define __ASM_ARM_NUMNODES_H #define __ASM_ARM_NUMNODES_H
#ifdef CONFIG_ARCH_LH7A40X #ifndef NODES_SHIFT
# define NODES_SHIFT 4 /* Max 16 nodes for the Sharp CPUs */
#else
# define NODES_SHIFT 2 /* Normally, Max 4 Nodes */ # define NODES_SHIFT 2 /* Normally, Max 4 Nodes */
#endif #endif
......
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