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Commit c5ac1f1c authored by Russell King's avatar Russell King
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Merge http://linus.bkbits.net/linux-2.5 

into flint.arm.linux.org.uk:/usr/src/linux-bk-2.5/linux-2.5-rmk
parents 1673f3b4 c71c14e5
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Showing with 1789 additions and 1884 deletions
arch/arm/Config.help
View file @ c5ac1f1c
This diff is collapsed.
arch/arm/boot/Makefile
View file @ c5ac1f1c
......@@ -10,6 +10,11 @@
SYSTEM =$(TOPDIR)/vmlinux
# Note: the following conditions must always be true:
# ZRELADDR == virt_to_phys(TEXTADDR)
# PARAMS_PHYS must be with 4MB of ZRELADDR
# INITRD_PHYS must be in RAM
ifeq ($(CONFIG_CPU_26),y)
ZRELADDR = 0x02080000
PARAMS_PHYS = 0x0207c000
......@@ -129,14 +134,14 @@ zImage: compressed/vmlinux
bootpImage: bootp/bootp
$(OBJCOPY) $(OBJCOPYFLAGS) $< $@
compressed/vmlinux: $(TOPDIR)/vmlinux
compressed/vmlinux: $(TOPDIR)/vmlinux FORCE
@$(MAKE) -C compressed vmlinux
bootp/bootp: zImage initrd
bootp/bootp: zImage initrd FORCE
@$(MAKE) -C bootp bootp
initrd:
@test "$(INITRD_PHYS)" != "" || (echo This architecture does not support INITRD; exit -1)
@test "$(INITRD_PHYS)" != "" || (echo This machine does not support INITRD; exit -1)
@test "$(INITRD)" != "" || (echo You must specify INITRD; exit -1)
install: Image
......@@ -149,3 +154,5 @@ clean:
$(RM) Image zImage bootpImage
@$(MAKE) -C compressed clean
@$(MAKE) -C bootp clean
FORCE:
arch/arm/boot/bootp/Makefile
View file @ c5ac1f1c
......@@ -5,8 +5,7 @@
ZSYSTEM =$(TOPDIR)/arch/arm/boot/zImage
ZLDFLAGS =-p -X -T bootp.lds \
--defsym initrd_addr=$(INITRD_PHYS) \
--defsym params=$(PARAMS_PHYS) \
--defsym kernel_addr=$(ZTEXTADDR)
--defsym params=$(PARAMS_PHYS)
all: bootp
......
arch/arm/boot/bootp/bootp.lds
View file @ c5ac1f1c
/*
* linux/arch/arm/boot/bootp/bootp.lds
*
* Copyright (C) 2000 Russell King
* Copyright (C) 2000-2002 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
......@@ -15,13 +15,9 @@ SECTIONS
_text = .;
.text : {
_stext = .;
_start = .;
init.o(.start)
kernel_start = .;
*(.start)
kernel.o
kernel_len = . - kernel_start;
. = ALIGN(32);
*(.text)
initrd_start = .;
initrd.o
initrd_len = . - initrd_start;
......
arch/arm/boot/bootp/init.S
View file @ c5ac1f1c
/*
* linux/arch/arm/boot/bootp/init.S
*
* Copyright (C) 2000 Russell King
* Copyright (C) 2000-2002 Russell King
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
......@@ -11,8 +11,9 @@
* r0 through to r3 straight through.
*/
.section .start,#alloc,#execinstr
.type _entry, #function
_entry: adr r10, initdata
.type _start, #function
.globl _start
_start: adr r10, initdata
ldr r11, initdata
sub r11, r10, r11 @ work out exec offset
b splitify
......@@ -22,17 +23,11 @@ _entry: adr r10, initdata
initdata: .word initdata @ compiled address of this
.size initdata,. - initdata
.text
splitify: adr r13, data
ldmia r13!, {r4-r6} @ move the initrd
add r4, r4, r11 @ correction
bl move
ldmia r13!, {r4-r6} @ then the kernel
mov r12, r5
add r4, r4, r11 @ correction
bl move
/*
* Setup the initrd parameters to pass to the kernel. This can either be
* passed in via a param_struct or a tag list. We spot the param_struct
......@@ -76,6 +71,7 @@ taglist: ldr r9, [r8, #0] @ tag length
mov r4, #16 @ length of initrd tag
mov r9, #0 @ end of tag list terminator
stmia r8, {r4, r5, r6, r7, r9}
adr r12, kernel_start
mov pc, r12 @ call kernel
/*
......@@ -97,15 +93,12 @@ data: .word initrd_start
.word initrd_addr
.word initrd_len
.word kernel_start
.word kernel_addr
.word kernel_len
.word 0x54410001 @ r4 = ATAG_CORE
.word 0x54420005 @ r5 = ATAG_INITRD
.word initrd_addr @ r6
.word initrd_len @ r7
.word params @ r8
.type kernel_start,#object
.type initrd_start,#object
kernel_start:
arch/arm/boot/compressed/head.S
View file @ c5ac1f1c
......@@ -19,6 +19,13 @@
*/
#ifdef DEBUG
#if defined(CONFIG_DEBUG_DC21285_PORT)
.macro loadsp, rb
mov \rb, #0x42000000
.endm
.macro writeb, rb
str \rb, [r3, #0x160]
.endm
#elif defined(CONFIG_FOOTBRIDGE)
.macro loadsp, rb
mov \rb, #0x7c000000
.endm
......@@ -40,6 +47,14 @@
.macro writeb, rb
strb \rb, [r3, #0]
.endm
#elif defined(CONFIG_ARCH_PXA) /* Xscale-type */
.macro loadsp, rb
mov \rb, #0x40000000
orr \rb, \rb, #0x00100000
.endm
.macro writeb, rb
strb \rb, [r3, #0]
.endm
#else
#error no serial architecture defined
#endif
......
arch/arm/config.in
View file @ c5ac1f1c
This diff is collapsed.
arch/arm/kernel/armksyms.c
View file @ c5ac1f1c
......@@ -73,6 +73,7 @@ extern void abort(void);
extern void ret_from_exception(void);
extern void fpundefinstr(void);
extern void fp_enter(void);
extern void fp_init(union fp_state *);
/*
* This has a special calling convention; it doesn't
......@@ -129,6 +130,7 @@ EXPORT_SYMBOL(disable_irq);
EXPORT_SYMBOL(set_irq_type);
EXPORT_SYMBOL(pm_idle);
EXPORT_SYMBOL(pm_power_off);
EXPORT_SYMBOL(fp_init);
/* processor dependencies */
EXPORT_SYMBOL(__machine_arch_type);
......
arch/arm/kernel/entry-armv.S
View file @ c5ac1f1c
......@@ -657,7 +657,7 @@ __und_invalid: sub sp, sp, #S_FRAME_SIZE
#if defined CONFIG_FPE_NWFPE || defined CONFIG_FPE_FASTFPE
/* The FPE is always present */
.equ fpe_not_present, 0
.equ fpe_not_present, fpundefinstr
#else
wfs_mask_data: .word 0x0e200110 @ WFS/RFS
.word 0x0fef0fff
......@@ -788,15 +788,16 @@ svc_preempt: teq r9, #0 @ was preempt count = 0
.align 5
__und_svc: sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ save r0 - r12
ldr r7, .LCund
mov r6, lr
ldmia r7, {r7 - r9}
add r5, sp, #S_FRAME_SIZE
add r4, sp, #S_SP
stmia r4, {r5 - r9} @ save sp_SVC, lr_SVC, pc, cpsr, old_ro
ldr r3, .LCund
mov r4, lr
ldmia r3, {r5 - r7}
add r3, sp, #S_FRAME_SIZE
add r2, sp, #S_SP
stmia r2, {r3 - r7} @ save sp_SVC, lr_SVC, pc, cpsr, old_ro
adrsvc al, r9, 1f @ r9 = normal FP return
bl call_fpe @ lr = undefined instr return
ldr r0, [r5, #-4] @ r0 = instruction
adrsvc al, r9, 1f @ r9 = normal FP return
bl call_fpe @ lr = undefined instr return
mov r0, sp @ struct pt_regs *regs
bl do_undefinstr
......@@ -913,17 +914,58 @@ __und_usr: sub sp, sp, #S_FRAME_SIZE @ Allocate frame size in one go
zero_fp
tst r6, #PSR_T_BIT @ Thumb mode?
bne fpundefinstr @ ignore FP
sub r4, r5, #4
1: ldrt r0, [r4] @ r0 = instruction
adrsvc al, r9, ret_from_exception @ r9 = normal FP return
adrsvc al, lr, fpundefinstr @ lr = undefined instr return
call_fpe: enable_irq r0 @ Enable interrupts
get_thread_info r10 @ get current thread
/*
* The out of line fixup for the ldrt above.
*/
.section .fixup, "ax"
2: mov pc, r9
.previous
.section __ex_table,"a"
.long 1b, 2b
.previous
/*
* r0 = instruction.
*
* Check whether the instruction is a co-processor instruction.
* If yes, we need to call the relevant co-processor handler.
*
* Note that we don't do a full check here for the co-processor
* instructions; all instructions with bit 27 set are well
* defined. The only instructions that should fault are the
* co-processor instructions. However, we have to watch out
* for the ARM6/ARM7 SWI bug.
*
* Emulators may wish to make use of the instruction value we
* prepared for them in r0.
*/
call_fpe: enable_irq r10 @ Enable interrupts
tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27
#if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710)
and r10, r0, #0x0f000000 @ mask out op-code bits
teqne r10, #0x0f000000 @ SWI (ARM6/7 bug)?
#endif
moveq pc, lr
do_fpe: get_thread_info r10 @ get current thread
ldr r4, [r10, #TI_TASK] @ get current task
mov r8, #1
strb r8, [r4, #TSK_USED_MATH] @ set current->used_math
ldr r4, .LCfp
add r10, r10, #TI_FPSTATE @ r10 = workspace
ldr pc, [r4] @ Call FP module USR entry point
/*
* The FP module is called with these registers set:
* r0 = instruction
* r5 = PC
* r9 = normal "successful" return address
* r10 = FP workspace
* lr = unrecognised FP instruction return address
*/
fpundefinstr: mov r0, sp
adrsvc al, lr, ret_from_exception
......
arch/arm/kernel/head.S
View file @ c5ac1f1c
......@@ -117,8 +117,8 @@ __turn_mmu_on:
#ifdef CONFIG_ALIGNMENT_TRAP
orr r0, r0, #2 @ ...........A.
#endif
mcr p15, 0, r0, c1, c0
mov r0, r0
mcr p15, 0, r0, c1, c0, 0 @ write control reg
mrc p15, 0, r0, c1, c0, 0 @ read it back.
mov r0, r0
mov r0, r0
mov pc, lr
......
arch/arm/kernel/init_task.c
View file @ c5ac1f1c
......@@ -12,7 +12,7 @@
static struct fs_struct init_fs = INIT_FS;
static struct files_struct init_files = INIT_FILES;
static struct signal_struct init_signals = INIT_SIGNALS;
static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
struct mm_struct init_mm = INIT_MM(init_mm);
/*
......
arch/arm/kernel/irq.c
View file @ c5ac1f1c
......@@ -18,12 +18,12 @@
* Naturally it's not a 1:1 relation, but there are similarities.
*/
#include <linux/config.h>
#include <linux/ptrace.h>
#include <linux/kernel_stat.h>
#include <linux/signal.h>
#include <linux/sched.h>
#include <linux/ioport.h>
#include <linux/interrupt.h>
#include <linux/ptrace.h>
#include <linux/slab.h>
#include <linux/random.h>
#include <linux/smp.h>
......@@ -217,14 +217,11 @@ do_simple_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
desc->triggered = 1;
irq_enter();
kstat.irqs[cpu][irq]++;
action = desc->action;
if (action)
__do_irq(irq, desc->action, regs);
irq_exit();
}
/*
......@@ -256,7 +253,6 @@ do_edge_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
*/
desc->running = 1;
irq_enter();
kstat.irqs[cpu][irq]++;
do {
......@@ -272,9 +268,7 @@ do_edge_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
}
__do_irq(irq, action, regs);
} while (desc->pending);
irq_exit();
} while (desc->pending && desc->enabled);
desc->running = 0;
......@@ -311,7 +305,6 @@ do_level_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
desc->chip->ack(irq);
if (likely(desc->enabled)) {
irq_enter();
kstat.irqs[cpu][irq]++;
/*
......@@ -325,7 +318,6 @@ do_level_IRQ(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
!check_irq_lock(desc, irq, regs)))
desc->chip->unmask(irq);
}
irq_exit();
}
}
......@@ -345,12 +337,11 @@ asmlinkage void asm_do_IRQ(int irq, struct pt_regs *regs)
if (irq >= NR_IRQS)
desc = &bad_irq_desc;
irq_enter();
spin_lock(&irq_controller_lock);
desc->handle(irq, desc, regs);
spin_unlock(&irq_controller_lock);
if (softirq_pending(smp_processor_id()))
do_softirq();
irq_exit();
}
void __set_irq_handler(unsigned int irq, irq_handler_t handle, int is_chained)
......
arch/arm/kernel/plx90x0.c
View file @ c5ac1f1c
......@@ -34,9 +34,9 @@
#define PLX_SET_CONFIG \
{ unsigned long flags; \
local_irq_save(flags); \
__raw_writel((1<<31 | (dev->bus->number << 16) \
| (dev->devfn << 8) | (where & ~3) \
| ((dev->bus->number == 0)?0:1)), PLX_BASE + 0xac); \
__raw_writel((1<<31 | (bus->number << 16) \
| (devfn << 8) | (where & ~3) \
| ((bus->number == 0)?0:1)), PLX_BASE + 0xac); \
#define PLX_CONFIG_WRITE(size) \
PLX_SET_CONFIG \
......@@ -58,47 +58,47 @@
/* Configuration space access routines */
static int
plx90x0_read_config_byte (struct pci_dev *dev,
int where, u8 *value)
{
PLX_CONFIG_READ(b)
}
static int
plx90x0_read_config_word (struct pci_dev *dev,
int where, u16 *value)
{
PLX_CONFIG_READ(w)
}
static int
plx90x0_read_config_dword (struct pci_dev *dev,
int where, u32 *value)
plx90x0_read_config (struct pci_bus *bus, unsigned int devfn, int where,
int where, int size, u32 *value)
{
PLX_CONFIG_READ(l)
}
static int
plx90x0_write_config_byte (struct pci_dev *dev,
int where, u8 value)
{
PLX_CONFIG_WRITE(b)
switch (size) {
case 1:
PLX_CONFIG_READ(b)
break;
case 2:
PLX_CONFIG_READ(w)
break;
case 4:
PLX_CONFIG_READ(l)
break;
}
return PCIBIOS_SUCCESSFUL;
}
static int
plx90x0_write_config_word (struct pci_dev *dev,
int where, u16 value)
plx90x0_write_config (struct pci_bus *bus, unsigned int devfn, int where,
int where, int size, u32 value)
{
PLX_CONFIG_WRITE(w)
switch (size) {
case 1:
PLX_CONFIG_WRITE(b)
break;
case 2:
PLX_CONFIG_WRITE(w)
break;
case 4:
PLX_CONFIG_WRITE(l)
break;
}
return PCIBIOS_SUCCESSFUL;
}
static int
plx90x0_write_config_dword (struct pci_dev *dev,
int where, u32 value)
static struct pci_ops plx90x0_ops =
{
PLX_CONFIG_WRITE(l)
}
.read = plx90x0_read_config,
.write = plx90x0_write_config,
};
static void
plx_syserr_handler(int irq, void *handle, struct pt_regs *regs)
......@@ -108,17 +108,6 @@ plx_syserr_handler(int irq, void *handle, struct pt_regs *regs)
__raw_writew(0xf000, PLX_BASE + 6);
}
static struct pci_ops
plx90x0_ops =
{
plx90x0_read_config_byte,
plx90x0_read_config_word,
plx90x0_read_config_dword,
plx90x0_write_config_byte,
plx90x0_write_config_word,
plx90x0_write_config_dword,
};
/*
* Initialise the PCI system.
*/
......
arch/arm/kernel/process.c
View file @ c5ac1f1c
......@@ -177,9 +177,9 @@ void show_regs(struct pt_regs * regs)
flags & PSR_Z_BIT ? 'Z' : 'z',
flags & PSR_C_BIT ? 'C' : 'c',
flags & PSR_V_BIT ? 'V' : 'v');
printk(" IRQs %s FIQs %s Mode %s%s Segment %s\n",
interrupts_enabled(regs) ? "on" : "off",
fast_interrupts_enabled(regs) ? "on" : "off",
printk(" IRQs o%s FIQs o%s Mode %s%s Segment %s\n",
interrupts_enabled(regs) ? "n" : "ff",
fast_interrupts_enabled(regs) ? "n" : "ff",
processor_modes[processor_mode(regs)],
thumb_mode(regs) ? " (T)" : "",
get_fs() == get_ds() ? "kernel" : "user");
......@@ -293,15 +293,22 @@ void exit_thread(void)
{
}
static void default_fp_init(union fp_state *fp)
{
memset(fp, 0, sizeof(union fp_state));
}
void (*fp_init)(union fp_state *) = default_fp_init;
void flush_thread(void)
{
struct thread_info *thread = current_thread_info();
struct task_struct *tsk = current;
memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
memset(&thread->fpstate, 0, sizeof(union fp_state));
tsk->used_math = 0;
current->used_math = 0;
memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
fp_init(&thread->fpstate);
}
void release_thread(struct task_struct *dead_task)
......
arch/arm/kernel/ptrace.c
View file @ c5ac1f1c
......@@ -339,7 +339,7 @@ add_breakpoint(struct task_struct *child, struct debug_info *dbg, unsigned long
return res;
}
int ptrace_set_bpt(struct task_struct *child)
void ptrace_set_bpt(struct task_struct *child)
{
struct pt_regs *regs;
unsigned long pc, insn;
......@@ -350,7 +350,7 @@ int ptrace_set_bpt(struct task_struct *child)
if (thumb_mode(regs)) {
printk(KERN_WARNING "ptrace: can't handle thumb mode\n");
return -EINVAL;
return;
}
res = read_tsk_long(child, pc, &insn);
......@@ -376,8 +376,6 @@ int ptrace_set_bpt(struct task_struct *child)
if (!alt || predicate(insn) != PREDICATE_ALWAYS)
res = add_breakpoint(child, dbg, pc + 4);
}
return res;
}
/*
......
arch/arm/kernel/ptrace.h
View file @ c5ac1f1c
......@@ -8,7 +8,7 @@
* published by the Free Software Foundation.
*/
extern void __ptrace_cancel_bpt(struct task_struct *);
extern int ptrace_set_bpt(struct task_struct *);
extern void ptrace_set_bpt(struct task_struct *);
extern void ptrace_break(struct task_struct *, struct pt_regs *);
/*
......
arch/arm/kernel/setup.c
View file @ c5ac1f1c
......@@ -77,6 +77,8 @@ struct cpu_user_fns cpu_user;
unsigned char aux_device_present;
char elf_platform[ELF_PLATFORM_SIZE];
char saved_command_line[COMMAND_LINE_SIZE];
unsigned long phys_initrd_start __initdata = 0;
unsigned long phys_initrd_size __initdata = 0;
static struct meminfo meminfo __initdata = { 0, };
static struct proc_info_item proc_info;
......@@ -326,6 +328,22 @@ parse_cmdline(struct meminfo *mi, char **cmdline_p, char *from)
mi->bank[mi->nr_banks].size = size;
mi->bank[mi->nr_banks].node = PHYS_TO_NID(start);
mi->nr_banks += 1;
} else if (c == ' ' && !memcmp(from, "initrd=", 7)) {
unsigned long start, size;
/*
* Remove space character
*/
if (to != command_line)
to -= 1;
start = memparse(from + 7, &from);
if (*from == ',') {
size = memparse(from + 1, &from);
phys_initrd_start = start;
phys_initrd_size = size;
}
}
c = *from++;
if (!c)
......@@ -353,19 +371,6 @@ setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz)
#endif
}
/*
* initial ram disk
*/
static void __init setup_initrd(unsigned int start, unsigned int size)
{
#ifdef CONFIG_BLK_DEV_INITRD
if (start == 0)
size = 0;
initrd_start = start;
initrd_end = start + size;
#endif
}
static void __init
request_standard_resources(struct meminfo *mi, struct machine_desc *mdesc)
{
......@@ -499,7 +504,8 @@ __tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
static int __init parse_tag_initrd(const struct tag *tag)
{
setup_initrd(tag->u.initrd.start, tag->u.initrd.size);
phys_initrd_start = __virt_to_phys(tag->u.initrd.start);
phys_initrd_size = tag->u.initrd.size;
return 0;
}
......@@ -507,13 +513,8 @@ __tagtable(ATAG_INITRD, parse_tag_initrd);
static int __init parse_tag_initrd2(const struct tag *tag)
{
unsigned long start = 0;
if (tag->u.initrd.size) {
start = (unsigned long)phys_to_virt(tag->u.initrd.start);
setup_initrd(start, tag->u.initrd.size);
}
phys_initrd_start = tag->u.initrd.start;
phys_initrd_size = tag->u.initrd.size;
return 0;
}
......
arch/arm/kernel/signal.c
View file @ c5ac1f1c
......@@ -373,7 +373,7 @@ setup_return(struct pt_regs *regs, struct k_sigaction *ka,
regs->ARM_r0 = usig;
regs->ARM_sp = (unsigned long)frame;
regs->ARM_lr = retcode;
regs->ARM_pc = handler & (thumb ? ~1 : ~3);
regs->ARM_pc = handler;
#ifdef CONFIG_CPU_32
regs->ARM_cpsr = cpsr;
......@@ -503,7 +503,6 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
*/
static int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall)
{
struct k_sigaction *ka;
siginfo_t info;
int single_stepping;
......@@ -519,11 +518,22 @@ static int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall)
single_stepping = ptrace_cancel_bpt(current);
for (;;) {
unsigned long signr;
spin_lock_irq (&current->sigmask_lock);
signr = dequeue_signal(&current->blocked, &info);
spin_unlock_irq (&current->sigmask_lock);
unsigned long signr = 0;
struct k_sigaction *ka;
sigset_t *mask = &current->blocked;
local_irq_disable();
if (current->sig->shared_pending.head) {
spin_lock(&current->sig->siglock);
signr = dequeue_signal(&current->sig->shared_pending, mask, &info);
spin_unlock(&current->sig->siglock);
}
if (!signr) {
spin_lock(&current->sigmask_lock);
signr = dequeue_signal(&current->pending, mask, &info);
spin_unlock(&current->sigmask_lock);
}
local_irq_enable();
if (!signr)
break;
......@@ -531,13 +541,14 @@ static int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall)
if ((current->ptrace & PT_PTRACED) && signr != SIGKILL) {
/* Let the debugger run. */
current->exit_code = signr;
current->state = TASK_STOPPED;
set_current_state(TASK_STOPPED);
notify_parent(current, SIGCHLD);
schedule();
single_stepping |= ptrace_cancel_bpt(current);
/* We're back. Did the debugger cancel the sig? */
if (!(signr = current->exit_code))
signr = current->exit_code;
if (signr == 0)
continue;
current->exit_code = 0;
......@@ -589,7 +600,7 @@ static int do_signal(sigset_t *oldset, struct pt_regs *regs, int syscall)
case SIGSTOP: {
struct signal_struct *sig;
current->state = TASK_STOPPED;
set_current_state(TASK_STOPPED);
current->exit_code = signr;
sig = current->parent->sig;
if (sig && !(sig->action[SIGCHLD-1].sa.sa_flags & SA_NOCLDSTOP))
......
arch/arm/kernel/sys_arm.c
View file @ c5ac1f1c
......@@ -239,7 +239,7 @@ asmlinkage int sys_ipc (uint call, int first, int second, int third, void *ptr,
asmlinkage int sys_fork(struct pt_regs *regs)
{
struct task_struct *p;
p = do_fork(SIGCHLD, regs->ARM_sp, regs, 0);
p = do_fork(SIGCHLD, regs->ARM_sp, regs, 0, NULL);
return IS_ERR(p) ? PTR_ERR(p) : p->pid;
}
......@@ -249,16 +249,25 @@ asmlinkage int sys_fork(struct pt_regs *regs)
asmlinkage int sys_clone(unsigned long clone_flags, unsigned long newsp, struct pt_regs *regs)
{
struct task_struct *p;
/*
* We don't support SETTID / CLEARTID
*/
if (clone_flags & (CLONE_SETTID | CLONE_CLEARTID))
return -EINVAL;
if (!newsp)
newsp = regs->ARM_sp;
p = do_fork(clone_flags & ~CLONE_IDLETASK, newsp, regs, 0);
p = do_fork(clone_flags & ~CLONE_IDLETASK, newsp, regs, 0, NULL);
return IS_ERR(p) ? PTR_ERR(p) : p->pid;
}
asmlinkage int sys_vfork(struct pt_regs *regs)
{
struct task_struct *p;
p = do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->ARM_sp, regs, 0);
p = do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->ARM_sp, regs, 0, NULL);
return IS_ERR(p) ? PTR_ERR(p) : p->pid;
}
......
arch/arm/kernel/via82c505.c
View file @ c5ac1f1c
......@@ -15,63 +15,49 @@
#define MAX_SLOTS 7
#define CONFIG_CMD(dev, where) (0x80000000 | (dev->bus->number << 16) | (dev->devfn << 8) | (where & ~3))
#define CONFIG_CMD(bus, devfn, where) (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
static int
via82c505_read_config_byte(struct pci_dev *dev, int where, u8 *value)
via82c505_read_config(struct pci_bus *bus, unsigned int devfn, int where,
int size, u32 *value)
{
outl(CONFIG_CMD(dev,where),0xCF8);
*value=inb(0xCFC + (where&3));
return PCIBIOS_SUCCESSFUL;
}
static int
via82c505_read_config_word(struct pci_dev *dev, int where, u16 *value)
{
outl(CONFIG_CMD(dev,where),0xCF8);
*value=inw(0xCFC + (where&2));
return PCIBIOS_SUCCESSFUL;
}
static int
via82c505_read_config_dword(struct pci_dev *dev, int where, u32 *value)
{
outl(CONFIG_CMD(dev,where),0xCF8);
*value=inl(0xCFC);
return PCIBIOS_SUCCESSFUL;
}
static int
via82c505_write_config_byte(struct pci_dev *dev, int where, u8 value)
{
outl(CONFIG_CMD(dev,where),0xCF8);
outb(value, 0xCFC + (where&3));
return PCIBIOS_SUCCESSFUL;
}
static int
via82c505_write_config_word(struct pci_dev *dev, int where, u16 value)
{
outl(CONFIG_CMD(dev,where),0xCF8);
outw(value, 0xCFC + (where&2));
switch (size) {
case 1:
*value=inb(0xCFC + (where&3));
break;
case 2:
*value=inw(0xCFC + (where&2));
break;
case 4:
*value=inl(0xCFC);
break;
}
return PCIBIOS_SUCCESSFUL;
}
static int
via82c505_write_config_dword(struct pci_dev *dev, int where, u32 value)
via82c505_write_config(struct pci_bus *bus, unsigned int devfn, int where
int size, u32 value)
{
outl(CONFIG_CMD(dev,where),0xCF8);
outl(value, 0xCFC);
outl(CONFIG_CMD(bus,devfn,where),0xCF8);
switch (size) {
case 1:
outb(value, 0xCFC + (where&3));
break;
case 2:
outw(value, 0xCFC + (where&2));
break;
case 4:
outl(value, 0xCFC);
break;
}
return PCIBIOS_SUCCESSFUL;
}
static struct pci_ops via82c505_ops = {
via82c505_read_config_byte,
via82c505_read_config_word,
via82c505_read_config_dword,
via82c505_write_config_byte,
via82c505_write_config_word,
via82c505_write_config_dword,
.read = via82c505_read_config,
.write = via82c505_write_config,
};
void __init via82c505_preinit(void *sysdata)
......
arch/arm/lib/Makefile
View file @ c5ac1f1c
......@@ -17,8 +17,6 @@ obj-y := backtrace.o changebit.o csumipv6.o csumpartial.o \
obj-m :=
obj-n :=
obj-$(CONFIG_VT)+= kbd.o
obj-arc := ecard.o io-acorn.o floppydma.o
obj-rpc := ecard.o io-acorn.o floppydma.o
obj-clps7500 := io-acorn.o
......
arch/arm/lib/findbit.S
View file @ c5ac1f1c
......@@ -83,7 +83,15 @@ ENTRY(_find_next_zero_bit_be)
/*
* One or more bits in the LSB of r3 are assumed to be set.
*/
.found: tst r3, #0x0f
.found:
#if __LINUX_ARM_ARCH__ >= 5
rsb r1, r3, #0
and r3, r3, r1
clz r3, r3
rsb r3, r3, #31
add r0, r2, r3
#else
tst r3, #0x0f
addeq r2, r2, #4
movne r3, r3, lsl #4
tst r3, #0x30
......@@ -92,5 +100,6 @@ ENTRY(_find_next_zero_bit_be)
tst r3, #0x40
addeq r2, r2, #1
mov r0, r2
#endif
RETINSTR(mov,pc,lr)
arch/arm/lib/kbd.c deleted 100644 → 0
View file @ 1673f3b4
#include <linux/config.h>
#include <linux/kd.h>
#include <linux/kbd_ll.h>
#include <linux/kbd_kern.h>
/*
* Translation of escaped scancodes to keycodes.
* This is now user-settable.
* The keycodes 1-88,96-111,119 are fairly standard, and
* should probably not be changed - changing might confuse X.
* X also interprets scancode 0x5d (KEY_Begin).
*
* For 1-88 keycode equals scancode.
*/
#define E0_KPENTER 96
#define E0_RCTRL 97
#define E0_KPSLASH 98
#define E0_PRSCR 99
#define E0_RALT 100
#define E0_BREAK 101 /* (control-pause) */
#define E0_HOME 102
#define E0_UP 103
#define E0_PGUP 104
#define E0_LEFT 105
#define E0_RIGHT 106
#define E0_END 107
#define E0_DOWN 108
#define E0_PGDN 109
#define E0_INS 110
#define E0_DEL 111
/* for USB 106 keyboard */
#define E0_YEN 124
#define E0_BACKSLASH 89
#define E1_PAUSE 119
/*
* The keycodes below are randomly located in 89-95,112-118,120-127.
* They could be thrown away (and all occurrences below replaced by 0),
* but that would force many users to use the `setkeycodes' utility, where
* they needed not before. It does not matter that there are duplicates, as
* long as no duplication occurs for any single keyboard.
*/
#define SC_LIM 89
#define FOCUS_PF1 85 /* actual code! */
#define FOCUS_PF2 89
#define FOCUS_PF3 90
#define FOCUS_PF4 91
#define FOCUS_PF5 92
#define FOCUS_PF6 93
#define FOCUS_PF7 94
#define FOCUS_PF8 95
#define FOCUS_PF9 120
#define FOCUS_PF10 121
#define FOCUS_PF11 122
#define FOCUS_PF12 123
#define JAP_86 124
/* tfj@olivia.ping.dk:
* The four keys are located over the numeric keypad, and are
* labelled A1-A4. It's an rc930 keyboard, from
* Regnecentralen/RC International, Now ICL.
* Scancodes: 59, 5a, 5b, 5c.
*/
#define RGN1 124
#define RGN2 125
#define RGN3 126
#define RGN4 127
static unsigned char high_keys[128 - SC_LIM] = {
RGN1, RGN2, RGN3, RGN4, 0, 0, 0, /* 0x59-0x5f */
0, 0, 0, 0, 0, 0, 0, 0, /* 0x60-0x67 */
0, 0, 0, 0, 0, FOCUS_PF11, 0, FOCUS_PF12, /* 0x68-0x6f */
0, 0, 0, FOCUS_PF2, FOCUS_PF9, 0, 0, FOCUS_PF3, /* 0x70-0x77 */
FOCUS_PF4, FOCUS_PF5, FOCUS_PF6, FOCUS_PF7, /* 0x78-0x7b */
FOCUS_PF8, JAP_86, FOCUS_PF10, 0 /* 0x7c-0x7f */
};
/* BTC */
#define E0_MACRO 112
/* LK450 */
#define E0_F13 113
#define E0_F14 114
#define E0_HELP 115
#define E0_DO 116
#define E0_F17 117
#define E0_KPMINPLUS 118
/*
* My OmniKey generates e0 4c for the "OMNI" key and the
* right alt key does nada. [kkoller@nyx10.cs.du.edu]
*/
#define E0_OK 124
/*
* New microsoft keyboard is rumoured to have
* e0 5b (left window button), e0 5c (right window button),
* e0 5d (menu button). [or: LBANNER, RBANNER, RMENU]
* [or: Windows_L, Windows_R, TaskMan]
*/
#define E0_MSLW 125
#define E0_MSRW 126
#define E0_MSTM 127
static unsigned char e0_keys[128] = {
0, 0, 0, 0, 0, 0, 0, 0, /* 0x00-0x07 */
0, 0, 0, 0, 0, 0, 0, 0, /* 0x08-0x0f */
0, 0, 0, 0, 0, 0, 0, 0, /* 0x10-0x17 */
0, 0, 0, 0, E0_KPENTER, E0_RCTRL, 0, 0, /* 0x18-0x1f */
0, 0, 0, 0, 0, 0, 0, 0, /* 0x20-0x27 */
0, 0, 0, 0, 0, 0, 0, 0, /* 0x28-0x2f */
0, 0, 0, 0, 0, E0_KPSLASH, 0, E0_PRSCR, /* 0x30-0x37 */
E0_RALT, 0, 0, 0, 0, E0_F13, E0_F14, E0_HELP, /* 0x38-0x3f */
E0_DO, E0_F17, 0, 0, 0, 0, E0_BREAK, E0_HOME, /* 0x40-0x47 */
E0_UP, E0_PGUP, 0, E0_LEFT, E0_OK, E0_RIGHT, E0_KPMINPLUS, E0_END, /* 0x48-0x4f */
E0_DOWN, E0_PGDN, E0_INS, E0_DEL, 0, 0, 0, 0, /* 0x50-0x57 */
0, 0, 0, E0_MSLW, E0_MSRW, E0_MSTM, 0, 0, /* 0x58-0x5f */
0, 0, 0, 0, 0, 0, 0, 0, /* 0x60-0x67 */
0, 0, 0, 0, 0, 0, 0, E0_MACRO, /* 0x68-0x6f */
//0, 0, 0, 0, 0, 0, 0, 0, /* 0x70-0x77 */
0, 0, 0, 0, 0, E0_BACKSLASH, 0, 0, /* 0x70-0x77 */
0, 0, 0, E0_YEN, 0, 0, 0, 0 /* 0x78-0x7f */
};
static int gen_setkeycode(unsigned int scancode, unsigned int keycode)
{
if (scancode < SC_LIM || scancode > 255 || keycode > 127)
return -EINVAL;
if (scancode < 128)
high_keys[scancode - SC_LIM] = keycode;
else
e0_keys[scancode - 128] = keycode;
return 0;
}
static int gen_getkeycode(unsigned int scancode)
{
return
(scancode < SC_LIM || scancode > 255) ? -EINVAL :
(scancode <
128) ? high_keys[scancode - SC_LIM] : e0_keys[scancode - 128];
}
static int
gen_translate(unsigned char scancode, unsigned char *keycode, char raw_mode)
{
static int prev_scancode = 0;
/* special prefix scancodes.. */
if (scancode == 0xe0 || scancode == 0xe1) {
prev_scancode = scancode;
return 0;
}
/* 0xFF is sent by a few keyboards, ignore it. 0x00 is error */
if (scancode == 0x00 || scancode == 0xff) {
prev_scancode = 0;
return 0;
}
scancode &= 0x7f;
if (prev_scancode) {
/*
* usually it will be 0xe0, but a Pause key generates
* e1 1d 45 e1 9d c5 when pressed, and nothing when released
*/
if (prev_scancode != 0xe0) {
if (prev_scancode == 0xe1 && scancode == 0x1d) {
prev_scancode = 0x100;
return 0;
}
else if (prev_scancode == 0x100
&& scancode == 0x45) {
*keycode = E1_PAUSE;
prev_scancode = 0;
} else {
#ifdef KBD_REPORT_UNKN
if (!raw_mode)
printk(KERN_INFO
"keyboard: unknown e1 escape sequence\n");
#endif
prev_scancode = 0;
return 0;
}
} else {
prev_scancode = 0;
/*
* The keyboard maintains its own internal caps lock and
* num lock statuses. In caps lock mode E0 AA precedes make
* code and E0 2A follows break code. In num lock mode,
* E0 2A precedes make code and E0 AA follows break code.
* We do our own book-keeping, so we will just ignore these.
*/
/*
* For my keyboard there is no caps lock mode, but there are
* both Shift-L and Shift-R modes. The former mode generates
* E0 2A / E0 AA pairs, the latter E0 B6 / E0 36 pairs.
* So, we should also ignore the latter. - aeb@cwi.nl
*/
if (scancode == 0x2a || scancode == 0x36)
return 0;
if (e0_keys[scancode])
*keycode = e0_keys[scancode];
else {
#ifdef KBD_REPORT_UNKN
if (!raw_mode)
printk(KERN_INFO
"keyboard: unknown scancode e0 %02x\n",
scancode);
#endif
return 0;
}
}
} else if (scancode >= SC_LIM) {
/* This happens with the FOCUS 9000 keyboard
Its keys PF1..PF12 are reported to generate
55 73 77 78 79 7a 7b 7c 74 7e 6d 6f
Moreover, unless repeated, they do not generate
key-down events, so we have to zero up_flag below */
/* Also, Japanese 86/106 keyboards are reported to
generate 0x73 and 0x7d for \ - and \ | respectively. */
/* Also, some Brazilian keyboard is reported to produce
0x73 and 0x7e for \ ? and KP-dot, respectively. */
*keycode = high_keys[scancode - SC_LIM];
if (!*keycode) {
if (!raw_mode) {
#ifdef KBD_REPORT_UNKN
printk(KERN_INFO
"keyboard: unrecognized scancode (%02x)"
" - ignored\n", scancode);
#endif
}
return 0;
}
} else
*keycode = scancode;
return 1;
}
static char gen_unexpected_up(unsigned char keycode)
{
/* unexpected, but this can happen: maybe this was a key release for a
FOCUS 9000 PF key; if we want to see it, we have to clear up_flag */
if (keycode >= SC_LIM || keycode == 85)
return 0;
else
return 0200;
}
/*
* These are the default mappings
*/
int (*k_setkeycode)(unsigned int, unsigned int) = gen_setkeycode;
int (*k_getkeycode)(unsigned int) = gen_getkeycode;
int (*k_translate)(unsigned char, unsigned char *, char) = gen_translate;
char (*k_unexpected_up)(unsigned char) = gen_unexpected_up;
void (*k_leds)(unsigned char);
/* Simple translation table for the SysRq keys */
#ifdef CONFIG_MAGIC_SYSRQ
static unsigned char gen_sysrq_xlate[128] =
"\000\0331234567890-=\177\t" /* 0x00 - 0x0f */
"qwertyuiop[]\r\000as" /* 0x10 - 0x1f */
"dfghjkl;'`\000\\zxcv" /* 0x20 - 0x2f */
"bnm,./\000*\000 \000\201\202\203\204\205" /* 0x30 - 0x3f */
"\206\207\210\211\212\000\000789-456+1" /* 0x40 - 0x4f */
"230\177\000\000\213\214\000\000\000\000\000\000\000\000\000\000" /* 0x50 - 0x5f */
"\r\000/"; /* 0x60 - 0x6f */
unsigned char *k_sysrq_xlate = gen_sysrq_xlate;
int k_sysrq_key = 0x54;
#endif
arch/arm/lib/strchr.S
View file @ c5ac1f1c
......@@ -15,11 +15,12 @@
.text
.align 5
ENTRY(strchr)
and r1, r1, #0xff
1: ldrb r2, [r0], #1
teq r2, r1
teqne r2, #0
bne 1b
teq r2, #0
moveq r0, #0
subne r0, r0, #1
teq r2, r1
movne r0, #0
subeq r0, r0, #1
RETINSTR(mov,pc,lr)
arch/arm/mach-arc/Config.help 0 → 100644
View file @ c5ac1f1c
CONFIG_ARCH_ARCA5K
This selects what ARM system you wish to build the kernel for. It
also selects to some extent the CPU type. If you are unsure what
to set this option to, please consult any information supplied with
your system.
CONFIG_ARCH_A5K
Say Y here to to support the Acorn A5000. Linux can support the
internal IDE disk and CD-ROM interface, serial and parallel port,
and the floppy drive. Note that on some A5000s the floppy is
plugged into the wrong socket on the motherboard.
CONFIG_ARCH_ARC
The Acorn Archimedes was an personal computer based on an 8K ARM2
processor, released in 1987. It supported 512K of RAM and 2 800K
floppy disks. Picture and more detailed specifications at
<http://www.computingmuseum.com/museum/archi.htm>.
CONFIG_PAGESIZE_16
Say Y here if your Archimedes or A5000 system has only 2MB of
memory, otherwise say N. The resulting kernel will not run on a
machine with 4MB of memory.
arch/arm/mach-arc/Config.in 0 → 100644
View file @ c5ac1f1c
mainmenu_option next_comment
comment 'Archimedes/A5000 Implementations'
# These architectures will be combined. However, until this
# is complete... Note that the ARC will take precedence over
# A5K
comment 'Archimedes/A5000 Implementations (select only ONE)'
dep_bool ' Archimedes' CONFIG_ARCH_ARC $CONFIG_ARCH_ARCA5K
dep_bool ' A5000' CONFIG_ARCH_A5K $CONFIG_ARCH_ARCA5K
if [ "$CONFIG_ARCH_ARCA5K" = "y" ]; then
bool '2MB physical memory' CONFIG_PAGESIZE_16
fi
endmenu
arch/arm/mach-clps711x/Config.help 0 → 100644
View file @ c5ac1f1c
CONFIG_ARCH_AUTCPU12
Say Y if you intend to run the kernel on the autronix autcpu12
board. This board is based on a Cirrus Logic CS89712.
CONFIG_ARCH_CDB89712
This is an evaluation board from Cirrus for the CS89712 processor.
The board includes 2 serial ports, Ethernet, IRDA, and expansion
headers. It comes with 16 MB SDRAM and 8 MB flash ROM.
CONFIG_ARCH_CEIVA
Say Y here if you intend to run this kernel on the Ceiva/Polaroid
PhotoMax Digital Picture Frame.
CONFIG_ARCH_EDB7211
Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211
evaluation board.
CONFIG_ARCH_P720T
Say Y here if you intend to run this kernel on the ARM Prospector
720T.
CONFIG_EP72XX_ROM_BOOT
If you say Y here, your CLPS711x-based kernel will use the bootstrap
mode memory map instead of the normal memory map.
Processors derived from the Cirrus CLPS-711X core support two boot
modes. Normal mode boots from the external memory device at CS0.
Bootstrap mode rearranges parts of the memory map, placing an
internal 128 byte bootstrap ROM at CS0. This option performs the
address map changes required to support booting in this mode.
You almost surely want to say N here.
arch/arm/mach-clps711x/Config.in 0 → 100644
View file @ c5ac1f1c
mainmenu_option next_comment
comment 'CLPS711X/EP721X Implementations'
dep_bool ' AUTCPU12' CONFIG_ARCH_AUTCPU12 $CONFIG_ARCH_CLPS711X
dep_bool ' CDB89712' CONFIG_ARCH_CDB89712 $CONFIG_ARCH_CLPS711X
dep_bool ' CEIVA' CONFIG_ARCH_CEIVA $CONFIG_ARCH_CLPS711X
dep_bool ' CLEP7312' CONFIG_ARCH_CLEP7312 $CONFIG_ARCH_CLPS711X
dep_bool ' EDB7211' CONFIG_ARCH_EDB7211 $CONFIG_ARCH_CLPS711X
dep_bool ' P720T' CONFIG_ARCH_P720T $CONFIG_ARCH_CLPS711X
dep_bool ' FORTUNET' CONFIG_ARCH_FORTUNET $CONFIG_ARCH_CLPS711X
# XXX Maybe these should indicate register compatibility
# instead of being mutually exclusive.
if [ "$CONFIG_ARCH_EDB7211" = "y" ]; then
define_bool CONFIG_ARCH_EP7211 y
else
define_bool CONFIG_ARCH_EP7211 n
fi
if [ "$CONFIG_ARCH_P720T" = "y" -o \
"$CONFIG_ARCH_CEIVA" = "y" ]; then
define_bool CONFIG_ARCH_EP7212 y
else
define_bool CONFIG_ARCH_EP7212 n
fi
if [ "$CONFIG_ARCH_EP7211" = "y" -o \
"$CONFIG_ARCH_EP7212" = "y" ]; then
bool ' EP72xx ROM boot' CONFIG_EP72XX_ROM_BOOT
fi
endmenu
arch/arm/mach-clps711x/Makefile
View file @ c5ac1f1c
......@@ -9,8 +9,7 @@ obj-m :=
obj-n :=
obj- :=
export-objs := leds-p720t.o
obj-$(CONFIG_ARCH_CEIVA) += ceiva.o
obj-$(CONFIG_ARCH_AUTCPU12) += autcpu12.o
obj-$(CONFIG_ARCH_CDB89712) += cdb89712.o
obj-$(CONFIG_ARCH_CLEP7312) += clep7312.o
......
include/asm-arm/mach/amba_kmi.h → arch/arm/mach-clps711x/ceiva.c
View file @ c5ac1f1c
/*
* linux/include/asm-arm/mach/amba_kmi.h
* linux/arch/arm/mach-clps711x/arch-ceiva.c
*
* Copyright (C) 2000 Deep Blue Solutions Ltd.
* Copyright (C) 2002, Rob Scott <rscott@mtrob.fdns.net>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -17,24 +17,45 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
struct kmi_info {
u_int base;
u_int irq;
u_char divisor;
u_char type;
u_char state;
u_char prev_rx;
u_char last_tx;
u_char resend_count;
u_short res;
u_char present;
wait_queue_head_t wait_q;
void (*rx)(struct kmi_info *, u_int val,
struct pt_regs *regs);
char name[8];
#include <linux/init.h>
#include <linux/types.h>
#include <linux/string.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <linux/kernel.h>
#include <asm/hardware.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/sizes.h>
#include <asm/mach/map.h>
extern void clps711x_init_irq(void);
static struct map_desc ceiva_io_desc[] __initdata = {
/* virtual, physical, length, type */
/* SED1355 controlled video RAM & registers */
{ CEIVA_VIRT_SED1355, CEIVA_PHYS_SED1355, SZ_2M, MT_DEVICE }
};
#define KMI_KEYBOARD 0
#define KMI_MOUSE 1
int register_kmi(struct kmi_info *kmi);
static void __init ceiva_map_io(void)
{
clps711x_map_io();
iotable_init(ceiva_io_desc, ARRAY_SIZE(ceiva_io_desc));
}
MACHINE_START(CEIVA, "CEIVA/Polaroid Photo MAX Digital Picture Frame")
MAINTAINER("Rob Scott")
BOOT_MEM(0xc0000000, 0x80000000, 0xff000000)
BOOT_PARAMS(0xc0000100)
MAPIO(ceiva_map_io)
INITIRQ(clps711x_init_irq)
MACHINE_END
arch/arm/mach-clps711x/p720t-leds.c
View file @ c5ac1f1c
......@@ -64,4 +64,4 @@ static int __init leds_init(void)
return 0;
}
__initcall(leds_init);
arch_initcall(leds_init);
arch/arm/mach-epxa10db/Config.help 0 → 100644
View file @ c5ac1f1c
CONFIG_PLD_HOTSWAP
This enables support for the dynamic loading and configuration of
compatible drivers when the contents of the PLD are changed. This
is still experimental and requires configuration tools which are
not yet generally available. Say N here. You must enable the kernel
module loader for this feature to work.
arch/arm/mach-epxa10db/Config.in 0 → 100644
View file @ c5ac1f1c
mainmenu_option next_comment
comment 'Epxa10db'
if [ "$CONFIG_ARCH_CAMELOT" = "y" ]; then
comment 'PLD hotswap support'
define_bool CONFIG_PLD y
dep_bool 'Support for PLD device hotplugging (experimental)' CONFIG_PLD_HOTSWAP $CONFIG_EXPERIMENTAL
fi
endmenu
arch/arm/mach-footbridge/Config.help 0 → 100644
View file @ c5ac1f1c
CONFIG_ARCH_CATS
Say Y here if you intend to run this kernel on the CATS.
Saying N will reduce the size of the Footbridge kernel.
CONFIG_ARCH_EBSA285_ADDIN
Say Y here if you intend to run this kernel on the EBSA285 card
in addin mode.
Saying N will reduce the size of the Footbridge kernel.
CONFIG_ARCH_EBSA285_HOST
Say Y here if you intend to run this kernel on the EBSA285 card
in host ("central function") mode.
Saying N will reduce the size of the Footbridge kernel.
CONFIG_ARCH_NETWINDER
Say Y here if you intend to run this kernel on the Rebel.COM
NetWinder. Information about this machine can be found at:
<http://www.netwinder.org/>
Saying N will reduce the size of the Footbridge kernel.
CONFIG_ARCH_PERSONAL_SERVER
Say Y here if you intend to run this kernel on the Compaq
Personal Server.
Saying N will reduce the size of the Footbridge kernel.
The Compaq Personal Server is not available for purchase.
There are no product plans beyond the current research
prototypes at this time. Information is available at:
<http://crl.research.compaq.com/projects/personalserver/>
If you have any questions or comments about the Compaq Personal
Server, send e-mail to skiff@crl.dec.com.
arch/arm/mach-footbridge/Config.in 0 → 100644
View file @ c5ac1f1c
mainmenu_option next_comment
comment 'Footbridge Implementations'
dep_bool ' CATS' CONFIG_ARCH_CATS $CONFIG_ARCH_FOOTBRIDGE
dep_bool ' Compaq Personal Server' CONFIG_ARCH_PERSONAL_SERVER $CONFIG_ARCH_FOOTBRIDGE
dep_bool ' EBSA285 (addin mode)' CONFIG_ARCH_EBSA285_ADDIN $CONFIG_ARCH_FOOTBRIDGE
dep_bool ' EBSA285 (host mode)' CONFIG_ARCH_EBSA285_HOST $CONFIG_ARCH_FOOTBRIDGE
dep_bool ' NetWinder' CONFIG_ARCH_NETWINDER $CONFIG_ARCH_FOOTBRIDGE
endmenu
arch/arm/mach-footbridge/dc21285.c
View file @ c5ac1f1c
......@@ -36,12 +36,11 @@ extern void pcibios_report_status(u_int status_mask, int warn);
extern void register_isa_ports(unsigned int, unsigned int, unsigned int);
static unsigned long
dc21285_base_address(struct pci_dev *dev)
dc21285_base_address(struct pci_bus *bus, unsigned int devfn)
{
unsigned long addr = 0;
unsigned int devfn = dev->devfn;
if (dev->bus->number == 0) {
if (bus->number == 0) {
if (PCI_SLOT(devfn) == 0)
/*
* For devfn 0, point at the 21285
......@@ -54,54 +53,33 @@ dc21285_base_address(struct pci_dev *dev)
addr = PCICFG0_BASE | 0xc00000 | (devfn << 8);
}
} else
addr = PCICFG1_BASE | (dev->bus->number << 16) | (devfn << 8);
addr = PCICFG1_BASE | (bus->number << 16) | (devfn << 8);
return addr;
}
static int
dc21285_read_config_byte(struct pci_dev *dev, int where, u8 *value)
dc21285_read_config(struct pci_bus *bus, unsigned int devfn, int where,
int size, u32 *value)
{
unsigned long addr = dc21285_base_address(dev);
u8 v;
if (addr)
asm("ldr%?b %0, [%1, %2]"
: "=r" (v) : "r" (addr), "r" (where));
else
v = 0xff;
*value = v;
return PCIBIOS_SUCCESSFUL;
}
static int
dc21285_read_config_word(struct pci_dev *dev, int where, u16 *value)
{
unsigned long addr = dc21285_base_address(dev);
u16 v;
if (addr)
asm("ldr%?h %0, [%1, %2]"
: "=r" (v) : "r" (addr), "r" (where));
else
v = 0xffff;
*value = v;
return PCIBIOS_SUCCESSFUL;
}
static int
dc21285_read_config_dword(struct pci_dev *dev, int where, u32 *value)
{
unsigned long addr = dc21285_base_address(dev);
unsigned long addr = dc21285_base_address(bus, devfn);
u32 v;
if (addr)
asm("ldr%? %0, [%1, %2]"
: "=r" (v) : "r" (addr), "r" (where));
switch (size) {
case 1:
asm("ldr%?b %0, [%1, %2]"
: "=r" (v) : "r" (addr), "r" (where));
break;
case 2:
asm("ldr%?h %0, [%1, %2]"
: "=r" (v) : "r" (addr), "r" (where));
break;
case 4:
asm("ldr%? %0, [%1, %2]"
: "=r" (v) : "r" (addr), "r" (where));
break;
}
else
v = 0xffffffff;
......@@ -111,48 +89,33 @@ dc21285_read_config_dword(struct pci_dev *dev, int where, u32 *value)
}
static int
dc21285_write_config_byte(struct pci_dev *dev, int where, u8 value)
{
unsigned long addr = dc21285_base_address(dev);
if (addr)
asm("str%?b %0, [%1, %2]"
: : "r" (value), "r" (addr), "r" (where));
return PCIBIOS_SUCCESSFUL;
}
static int
dc21285_write_config_word(struct pci_dev *dev, int where, u16 value)
{
unsigned long addr = dc21285_base_address(dev);
if (addr)
asm("str%?h %0, [%1, %2]"
: : "r" (value), "r" (addr), "r" (where));
return PCIBIOS_SUCCESSFUL;
}
static int
dc21285_write_config_dword(struct pci_dev *dev, int where, u32 value)
dc21285_write_config(struct pci_bus *bus, unsigned int devfn, int where,
int size, u32 value)
{
unsigned long addr = dc21285_base_address(dev);
unsigned long addr = dc21285_base_address(bus, devfn);
if (addr)
asm("str%? %0, [%1, %2]"
: : "r" (value), "r" (addr), "r" (where));
switch (size) {
case 1:
asm("str%?b %0, [%1, %2]"
: : "r" (value), "r" (addr), "r" (where));
break;
case 2:
asm("str%?h %0, [%1, %2]"
: : "r" (value), "r" (addr), "r" (where));
break;
case 4:
asm("str%? %0, [%1, %2]"
: : "r" (value), "r" (addr), "r" (where));
break;
}
return PCIBIOS_SUCCESSFUL;
}
static struct pci_ops dc21285_ops = {
dc21285_read_config_byte,
dc21285_read_config_word,
dc21285_read_config_dword,
dc21285_write_config_byte,
dc21285_write_config_word,
dc21285_write_config_dword,
.read = dc21285_read_config,
.write = dc21285_write_config,
};
static struct timer_list serr_timer;
......
arch/arm/mach-ftvpci/leds.c
View file @ c5ac1f1c
......@@ -5,6 +5,7 @@
*/
#include <linux/module.h>
#include <linux/init.h>
#include <asm/hardware.h>
#include <asm/leds.h>
......@@ -26,6 +27,10 @@ static void ftvpci_leds_event(led_event_t ledevt)
}
}
void (*leds_event)(led_event_t) = ftvpci_leds_event;
static int __init ftvpci_leds_init(void)
{
leds_event = ftvpci_leds_event;
return 0;
}
EXPORT_SYMBOL(leds_event);
arch_initcall(ftvpci_leds_init);
arch/arm/mach-integrator/Makefile
View file @ c5ac1f1c
......@@ -9,8 +9,6 @@ obj-m :=
obj-n :=
obj- :=
export-objs := leds.o
obj-$(CONFIG_LEDS) += leds.o
obj-$(CONFIG_PCI) += pci_v3.o pci.o
......
arch/arm/mach-integrator/arch.c
View file @ c5ac1f1c
......@@ -29,38 +29,10 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/amba_kmi.h>
extern void integrator_map_io(void);
extern void integrator_init_irq(void);
#ifdef CONFIG_KMI_KEYB
static struct kmi_info integrator_keyboard __initdata = {
.base = IO_ADDRESS(KMI0_BASE),
.irq = IRQ_KMIINT0,
.divisor = 24 / 8 - 1,
.type = KMI_KEYBOARD,
};
static struct kmi_info integrator_mouse __initdata = {
.base = IO_ADDRESS(KMI1_BASE),
.irq = IRQ_KMIINT1,
.divisor = 24 / 8 - 1,
.type = KMI_MOUSE,
};
#endif
static int __init integrator_init(void)
{
#ifdef CONFIG_KMI_KEYB
register_kmi(&integrator_keyboard);
register_kmi(&integrator_mouse);
#endif
return 0;
}
__initcall(integrator_init);
MACHINE_START(INTEGRATOR, "ARM-Integrator")
MAINTAINER("ARM Ltd/Deep Blue Solutions Ltd")
BOOT_MEM(0x00000000, 0x16000000, 0xf1600000)
......
arch/arm/mach-integrator/cpu.c
View file @ c5ac1f1c
......@@ -181,4 +181,4 @@ static int __init integrator_cpu_init(void)
return 0;
}
__initcall(integrator_cpu_init);
core_initcall(integrator_cpu_init);
arch/arm/mach-integrator/pci_v3.c
View file @ c5ac1f1c
......@@ -181,11 +181,12 @@ static spinlock_t v3_lock = SPIN_LOCK_UNLOCKED;
#undef V3_LB_BASE_PREFETCH
#define V3_LB_BASE_PREFETCH 0
static unsigned long v3_open_config_window(struct pci_dev *dev, int offset)
static unsigned long v3_open_config_window(struct pci_bus *bus,
unsigned int devfn, int offset)
{
unsigned int address, mapaddress, busnr;
busnr = dev->bus->number;
busnr = bus->number;
/*
* Trap out illegal values
......@@ -194,11 +195,11 @@ static unsigned long v3_open_config_window(struct pci_dev *dev, int offset)
BUG();
if (busnr > 255)
BUG();
if (dev->devfn > 255)
if (devfn > 255)
BUG();
if (busnr == 0) {
int slot = PCI_SLOT(dev->devfn);
int slot = PCI_SLOT(devfn);
/*
* local bus segment so need a type 0 config cycle
......@@ -210,7 +211,7 @@ static unsigned long v3_open_config_window(struct pci_dev *dev, int offset)
* 3:1 = config cycle (101)
* 0 = PCI A1 & A0 are 0 (0)
*/
address = PCI_FUNC(dev->devfn) << 8;
address = PCI_FUNC(devfn) << 8;
mapaddress = V3_LB_MAP_TYPE_CONFIG;
if (slot > 12)
......@@ -237,7 +238,7 @@ static unsigned long v3_open_config_window(struct pci_dev *dev, int offset)
* 0 = PCI A1 & A0 from host bus (1)
*/
mapaddress = V3_LB_MAP_TYPE_CONFIG | V3_LB_MAP_AD_LOW_EN;
address = (busnr << 16) | (dev->devfn << 8);
address = (busnr << 16) | (devfn << 8);
}
/*
......@@ -276,104 +277,62 @@ static void v3_close_config_window(void)
V3_LB_BASE_ADR_SIZE_256MB | V3_LB_BASE_ENABLE);
}
static int v3_read_config_byte(struct pci_dev *dev, int where, u8 *val)
{
unsigned long addr;
unsigned long flags;
u8 v;
spin_lock_irqsave(&v3_lock, flags);
addr = v3_open_config_window(dev, where);
v = __raw_readb(addr);
v3_close_config_window();
spin_unlock_irqrestore(&v3_lock, flags);
*val = v;
return PCIBIOS_SUCCESSFUL;
}
static int v3_read_config_word(struct pci_dev *dev, int where, u16 *val)
{
unsigned long addr;
unsigned long flags;
u16 v;
spin_lock_irqsave(&v3_lock, flags);
addr = v3_open_config_window(dev, where);
v = __raw_readw(addr);
v3_close_config_window();
spin_unlock_irqrestore(&v3_lock, flags);
*val = v;
return PCIBIOS_SUCCESSFUL;
}
static int v3_read_config_dword(struct pci_dev *dev, int where, u32 *val)
static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where,
int size, u32 *val)
{
unsigned long addr;
unsigned long flags;
u32 v;
spin_lock_irqsave(&v3_lock, flags);
addr = v3_open_config_window(dev, where);
addr = v3_open_config_window(bus, devfn, where);
v = __raw_readl(addr);
switch (size) {
case 1:
v = __raw_readb(addr);
break;
v3_close_config_window();
spin_unlock_irqrestore(&v3_lock, flags);
*val = v;
return PCIBIOS_SUCCESSFUL;
}
static int v3_write_config_byte(struct pci_dev *dev, int where, u8 val)
{
unsigned long addr;
unsigned long flags;
spin_lock_irqsave(&v3_lock, flags);
addr = v3_open_config_window(dev, where);
__raw_writeb(val, addr);
__raw_readb(addr);
v3_close_config_window();
spin_unlock_irqrestore(&v3_lock, flags);
return PCIBIOS_SUCCESSFUL;
}
static int v3_write_config_word(struct pci_dev *dev, int where, u16 val)
{
unsigned long addr;
unsigned long flags;
spin_lock_irqsave(&v3_lock, flags);
addr = v3_open_config_window(dev, where);
case 2:
v = __raw_readw(addr);
break;
__raw_writew(val, addr);
__raw_readw(addr);
case 4:
v = __raw_readl(addr);
break;
}
v3_close_config_window();
spin_unlock_irqrestore(&v3_lock, flags);
*val = v;
return PCIBIOS_SUCCESSFUL;
}
static int v3_write_config_dword(struct pci_dev *dev, int where, u32 val)
static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where,
int size, u32 val)
{
unsigned long addr;
unsigned long flags;
spin_lock_irqsave(&v3_lock, flags);
addr = v3_open_config_window(dev, where);
__raw_writel(val, addr);
__raw_readl(addr);
addr = v3_open_config_window(bus, devfn, where);
switch (size) {
case 1:
__raw_writeb((u8)val, addr);
__raw_readb(addr);
break;
case 2:
__raw_writew((u16)val, addr);
__raw_readw(addr);
break;
case 4:
__raw_writel(val, addr);
__raw_readl(addr);
break;
}
v3_close_config_window();
spin_unlock_irqrestore(&v3_lock, flags);
......@@ -382,12 +341,8 @@ static int v3_write_config_dword(struct pci_dev *dev, int where, u32 val)
}
static struct pci_ops pci_v3_ops = {
.read_byte = v3_read_config_byte,
.read_word = v3_read_config_word,
.read_dword = v3_read_config_dword,
.write_byte = v3_write_config_byte,
.write_word = v3_write_config_word,
.write_dword = v3_write_config_dword,
.read = v3_read_config,
.write = v3_write_config,
};
static struct resource non_mem = {
......
arch/arm/mach-iop310/Config.help 0 → 100644
View file @ c5ac1f1c
CONFIG_ARCH_IQ80310
Say Y here if you want to run your kernel on the Intel IQ80310
evaluation kit for the IOP310 chipset.
arch/arm/mach-iop310/Config.in 0 → 100644
View file @ c5ac1f1c
mainmenu_option next_comment
comment 'IOP310 Implementation Options'
dep_bool ' IQ80310' CONFIG_ARCH_IQ80310 $CONFIG_ARCH_IOP310
comment 'IOP310 Chipset Features'
dep_bool 'Support Intel 80312 Application Accelerator Unit (EXPERIMENTAL)' CONFIG_IOP310_AAU $CONFIG_ARCH_IOP310 $CONFIG_EXPERIMENTAL
dep_bool 'Support Intel 80312 DMA (EXPERIMENTAL)' CONFIG_IOP310_DMA $CONFIG_ARCH_IOP310 $CONFIG_EXPERIMENTAL
dep_bool 'Support Intel 80312 Messaging Unit (EXPERIMENTAL)' CONFIG_IOP310_MU $CONFIG_ARCH_IOP310 $CONFIG_EXPERIMENTAL
dep_bool 'Support Intel 80312 Performance Monitor (EXPERIMENTAL)' CONFIG_IOP310_PMON $CONFIG_ARCH_IOP310 $CONFIG_EXPERIMENTAL
endmenu
arch/arm/mach-iop310/iop310-pci.c
View file @ c5ac1f1c
......@@ -55,22 +55,23 @@
#define DBG(x...) do { } while (0)
#endif
extern int (*external_fault)(unsigned long, struct pt_regs *);
static u32 iop310_cfg_address(struct pci_dev *dev, int where)
/*
* Calculate the address, etc from the bus, devfn and register
* offset. Note that we have two root buses, so we need some
* method to determine whether we need config type 0 or 1 cycles.
* We use a root bus number in our bus->sysdata structure for this.
*/
static u32 iop310_cfg_address(struct pci_bus *bus, int devfn, int where)
{
struct pci_sys_data *sys = dev->sysdata;
struct pci_sys_data *sys = bus->sysdata;
u32 addr;
where &= ~3;
if (sys->busnr == dev->bus->number)
addr = 1 << (PCI_SLOT(dev->devfn) + 16);
if (sys->busnr == bus->number)
addr = 1 << (PCI_SLOT(devfn) + 16);
else
addr = dev->bus->number << 16 |
PCI_SLOT(dev->devfn) << 11 | 1;
addr = bus->number << 16 | PCI_SLOT(devfn) << 11 | 1;
addr |= PCI_FUNC(dev->devfn) << 8 | where;
addr |= PCI_FUNC(devfn) << 8 | (where & ~3);
return addr;
}
......@@ -106,9 +107,13 @@ static int iop310_pri_pci_status(void)
return ret;
}
static inline u32 iop310_pri_read(struct pci_dev *dev, int where)
/*
* Simply write the address register and read the configuration
* data. Note that the 4 nop's ensure that we are able to handle
* a delayed abort (in theory.)
*/
static inline u32 iop310_pri_read(unsigned long addr)
{
unsigned long addr = iop310_cfg_address(dev, where);
u32 val;
__asm__ __volatile__(
......@@ -125,111 +130,59 @@ static inline u32 iop310_pri_read(struct pci_dev *dev, int where)
}
static int
iop310_pri_rd_cfg_byte(struct pci_dev *dev, int where, u8 *p)
{
u8 val;
val = iop310_pri_read(dev, where) >> ((where & 3) * 8);
if (iop310_pri_pci_status())
val = 0xff;
*p = val;
return PCIBIOS_SUCCESSFUL;
}
static int
iop310_pri_rd_cfg_word(struct pci_dev *dev, int where, u16 *p)
{
u16 val;
val = iop310_pri_read(dev, where) >> ((where & 3) * 8);
if (iop310_pri_pci_status())
val = 0xffff;
*p = val;
return PCIBIOS_SUCCESSFUL;
}
static int
iop310_pri_rd_cfg_dword(struct pci_dev *dev, int where, u32 *p)
iop310_pri_read_config(struct pci_bus *bus, unsigned int devfn, int where,
int size, u32 *value)
{
u32 val;
val = iop310_pri_read(dev, where);
unsigned long addr = iop310_cfg_address(bus, devfn, where);
u32 val = iop310_pri_read(addr) >> ((where & 3) * 8);
if (iop310_pri_pci_status())
val = 0xffffffff;
*p = val;
*value = val;
return PCIBIOS_SUCCESSFUL;
}
static int
iop310_pri_wr_cfg_byte(struct pci_dev *dev, int where, u8 v)
iop310_pri_write_config(struct pci_bus *bus, unsigned int devfn, int where
int size, u32 value)
{
unsigned long addr = iop310_cfg_address(bus, devfn, where);
u32 val;
val = iop310_pri_read(dev, where);
if (size != 4) {
val = iop310_pri_read(addr);
if (!iop310_pri_pci_status() == 0)
return PCIBIOS_SUCCESSFUL;
if (iop310_pri_pci_status() == 0) {
where = (where & 3) * 8;
val &= ~(0xff << where);
val |= v << where;
*IOP310_POCCDR = val;
}
return PCIBIOS_SUCCESSFUL;
}
static int
iop310_pri_wr_cfg_word(struct pci_dev *dev, int where, u16 v)
{
u32 val;
val = iop310_pri_read(dev, where);
if (iop310_pri_pci_status() == 0) {
where = (where & 2) * 8;
val &= ~(0xffff << where);
val |= v << where;
*IOP310_POCCDR = val;
if (size == 1)
val &= ~(0xff << where);
else
val &= ~(0xffff << where);
*IOP310_POCCDR = val | v << where;
} else {
asm volatile(
"str %1, [%2]\n\t"
"str %0, [%3]\n\t"
"nop\n\t"
"nop\n\t"
"nop\n\t"
"nop\n\t"
:
: "r" (val), "r" (addr),
"r" (IOP310_POCCAR), "r" (IOP310_POCCDR));
}
return PCIBIOS_SUCCESSFUL;
}
static int
iop310_pri_wr_cfg_dword(struct pci_dev *dev, int where, u32 val)
{
unsigned long addr;
addr = iop310_cfg_address(dev, where);
__asm__ __volatile__(
"str %1, [%2]\n\t"
"str %0, [%3]\n\t"
"nop\n\t"
"nop\n\t"
"nop\n\t"
"nop\n\t"
:
: "r" (val), "r" (addr), "r" (IOP310_POCCAR), "r" (IOP310_POCCDR));
return PCIBIOS_SUCCESSFUL;
}
static struct pci_ops iop310_primary_ops = {
iop310_pri_rd_cfg_byte,
iop310_pri_rd_cfg_word,
iop310_pri_rd_cfg_dword,
iop310_pri_wr_cfg_byte,
iop310_pri_wr_cfg_word,
iop310_pri_wr_cfg_dword,
.read = iop310_pri_read_config,
.write = iop310_pri_write_config,
};
/*
......@@ -255,9 +208,13 @@ static int iop310_sec_pci_status(void)
return ret;
}
static inline u32 iop310_sec_read(struct pci_dev *dev, int where)
/*
* Simply write the address register and read the configuration
* data. Note that the 4 nop's ensure that we are able to handle
* a delayed abort (in theory.)
*/
static inline u32 iop310_sec_read(unsigned long addr)
{
unsigned long addr = iop310_cfg_address(dev, where);
u32 val;
__asm__ __volatile__(
......@@ -274,111 +231,60 @@ static inline u32 iop310_sec_read(struct pci_dev *dev, int where)
}
static int
iop310_sec_rd_cfg_byte(struct pci_dev *dev, int where, u8 *p)
{
u8 val;
val = iop310_sec_read(dev, where) >> ((where & 3) * 8);
if (iop310_sec_pci_status())
val = 0xff;
*p = val;
return PCIBIOS_SUCCESSFUL;
}
static int
iop310_sec_rd_cfg_word(struct pci_dev *dev, int where, u16 *p)
iop310_sec_read_config(struct pci_bus *bus, unsigned int devfn, int where,
int size, u32 *value)
{
u16 val;
val = iop310_sec_read(dev, where) >> ((where & 3) * 8);
if (iop310_sec_pci_status())
val = 0xffff;
*p = val;
return PCIBIOS_SUCCESSFUL;
}
static int
iop310_sec_rd_cfg_dword(struct pci_dev *dev, int where, u32 *p)
{
u32 val;
val = iop310_sec_read(dev, where);
unsigned long addr = iop310_cfg_address(bus, devfn, where);
u32 val = iop310_sec_read(addr) >> ((where & 3) * 8);
if (iop310_sec_pci_status())
val = 0xffffffff;
*p = val;
*value = val;
return PCIBIOS_SUCCESSFUL;
}
static int
iop310_sec_wr_cfg_byte(struct pci_dev *dev, int where, u8 v)
iop310_sec_write_config(struct pci_bus *bus, unsigned int devfn, int where
int size, u32 value)
{
unsigned long addr = iop310_cfg_address(bus, devfn, where);
u32 val;
val = iop310_sec_read(dev, where);
if (size != 4) {
val = iop310_sec_read(addr);
if (iop310_sec_pci_status() == 0) {
where = (where & 3) * 8;
val &= ~(0xff << where);
val |= v << where;
*IOP310_SOCCDR = val;
}
return PCIBIOS_SUCCESSFUL;
}
static int
iop310_sec_wr_cfg_word(struct pci_dev *dev, int where, u16 v)
{
u32 val;
if (!iop310_sec_pci_status() == 0)
return PCIBIOS_SUCCESSFUL;
val = iop310_sec_read(dev, where);
where = (where & 3) * 8;
if (iop310_sec_pci_status() == 0) {
where = (where & 2) * 8;
val &= ~(0xffff << where);
val |= v << where;
*IOP310_SOCCDR = val;
if (size == 1)
val &= ~(0xff << where);
else
val &= ~(0xffff << where);
*IOP310_SOCCDR = val | v << where;
} else {
asm volatile(
"str %1, [%2]\n\t"
"str %0, [%3]\n\t"
"nop\n\t"
"nop\n\t"
"nop\n\t"
"nop\n\t"
:
: "r" (val), "r" (addr),
"r" (IOP310_SOCCAR), "r" (IOP310_SOCCDR));
}
return PCIBIOS_SUCCESSFUL;
}
static int
iop310_sec_wr_cfg_dword(struct pci_dev *dev, int where, u32 val)
{
unsigned long addr;
addr = iop310_cfg_address(dev, where);
__asm__ __volatile__(
"str %1, [%2]\n\t"
"str %0, [%3]\n\t"
"nop\n\t"
"nop\n\t"
"nop\n\t"
"nop\n\t"
:
: "r" (val), "r" (addr), "r" (IOP310_SOCCAR), "r" (IOP310_SOCCDR));
return PCIBIOS_SUCCESSFUL;
}
static struct pci_ops iop310_secondary_ops = {
iop310_sec_rd_cfg_byte,
iop310_sec_rd_cfg_word,
iop310_sec_rd_cfg_dword,
iop310_sec_wr_cfg_byte,
iop310_sec_wr_cfg_word,
iop310_sec_wr_cfg_dword,
.read = iop310_sec_read_config,
.write = iop310_sec_write_config,
};
/*
......@@ -524,5 +430,5 @@ void iop310_init(void)
*/
*IOP310_PCR &= 0xfff8;
hook_fault_code(6, iop310_pci_abort, SIGBUS, "imprecise external abort");
hook_fault_code(16+6, iop310_pci_abort, SIGBUS, "imprecise external abort");
}
arch/arm/mach-pxa/Config.in 0 → 100644
View file @ c5ac1f1c
mainmenu_option next_comment
comment 'Intel PXA250/210 Implementations'
dep_bool ' Intel DBPXA250 Development Platform' CONFIG_ARCH_LUBBOCK $CONFIG_ARCH_PXA
dep_bool ' Accelent Xscale IDP' CONFIG_ARCH_PXA_IDP $CONFIG_ARCH_PXA
endmenu
arch/arm/mach-pxa/dma.c
View file @ c5ac1f1c
......@@ -81,9 +81,9 @@ void pxa_free_dma (int dma_ch)
unsigned long flags;
if (!dma_channels[dma_ch].name) {
printk (KERN_CRIT __FUNCTION__
": trying to free channel %d which is already freed\n",
dma_ch);
printk (KERN_CRIT
"%s: trying to free channel %d which is already freed\n",
__FUNCTION__, dma_ch);
return;
}
......@@ -124,7 +124,7 @@ static int __init pxa_dma_init (void)
return ret;
}
__initcall(pxa_dma_init);
arch_initcall(pxa_dma_init);
EXPORT_SYMBOL(pxa_request_dma);
EXPORT_SYMBOL(pxa_free_dma);
......
arch/arm/mach-pxa/idp.c
View file @ c5ac1f1c
......@@ -9,6 +9,8 @@
*
* 2001-09-13: Cliff Brake <cbrake@accelent.com>
* Initial code
*
* Expected command line: mem=32M initrd=0xa1000000,4M root=/dev/ram ramdisk=8192
*/
#include <linux/kernel.h>
#include <linux/init.h>
......@@ -29,8 +31,6 @@
#include "generic.h"
#define PXA_IDP_REV02
#ifndef PXA_IDP_REV02
/* shadow registers for write only registers */
unsigned int idp_cpld_led_control_shadow = 0x1;
......@@ -103,9 +103,19 @@ static void __init idp_map_io(void)
pxa_map_io();
iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc));
set_GPIO_IRQ_edge(IRQ_TO_GPIO_2_80(TOUCH_PANEL_IRQ), TOUCH_PANEL_IRQ_EDGE);
set_irq_type(IRQ_TO_GPIO_2_80(TOUCH_PANEL_IRQ), TOUCH_PANEL_IRQ_EDGE);
// serial ports 2 & 3
pxa_gpio_mode(GPIO42_BTRXD_MD);
pxa_gpio_mode(GPIO43_BTTXD_MD);
pxa_gpio_mode(GPIO44_BTCTS_MD);
pxa_gpio_mode(GPIO45_BTRTS_MD);
pxa_gpio_mode(GPIO46_STRXD_MD);
pxa_gpio_mode(GPIO47_STTXD_MD);
}
MACHINE_START(PXA_IDP, "Accelent Xscale IDP")
MAINTAINER("Accelent Systems Inc.")
BOOT_MEM(0xa0000000, 0x40000000, 0xfc000000)
......
arch/arm/mach-rpc/riscpc.c
View file @ c5ac1f1c
......@@ -16,6 +16,7 @@
#include <linux/init.h>
#include <asm/elf.h>
#include <asm/io.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/hardware.h>
......@@ -71,6 +72,11 @@ void __init rpc_map_io(void)
{
iotable_init(rpc_io_desc, ARRAY_SIZE(rpc_io_desc));
/*
* Turn off floppy.
*/
outb(0xc, 0x3f2);
/*
* RiscPC can't handle half-word loads and stores
*/
......
arch/arm/mach-sa1100/Config.help 0 → 100644
View file @ c5ac1f1c
CONFIG_SA1100_ASSABET
Say Y here if you are using the Intel(R) StrongARM(R) SA-1110
Microprocessor Development Board (also known as the Assabet).
CONFIG_ASSABET_NEPONSET
Say Y here if you are using the Intel(R) StrongARM(R) SA-1110
Microprocessor Development Board (Assabet) with the SA-1111
Development Board (Nepon).
CONFIG_SA1100_ADSBITSY
Say Y here if you are using Applied Data Systems Intel(R)
StrongARM(R) 1110 based Bitsy, 3 x 5 inches in size, Compaq - IPAQ -
like platform. See
<http://www.applieddata.net/products_bitsySpec.asp> for more
information.
CONFIG_SA1100_BRUTUS
Say Y here if you are using the Intel(R) StrongARM(R) SA-1100
Microprocessor Development Board (also known as the Brutus).
CONFIG_SA1100_CERF
The Intrinsyc CerfBoard is based on the StrongARM 1110.
More information is available at:
<http://www.intrinsyc.com/products/referenceplatforms/cerfboard.html>.
Say Y if configuring for an Intrinsyc CerfBoard.
Say N otherwise.
CONFIG_SA1100_CERF_CPLD
Say Y here to support the Linux CerfPDA development kit from
Intrinsyc. This is a StrongARM-1110-based reference platform for
designing custom PDAs. Product info is at
<http://www.intrinsyc.com/products/referencedesigns/cerfpda.asp>.
CONFIG_SA1100_H3100
Say Y here if you intend to run this kernel on the Compaq iPAQ
H3100 handheld computer. Information about this machine and the
Linux port to this machine can be found at:
<http://www.handhelds.org/Compaq/index.html#iPAQ_H3100>
<http://www.compaq.com/products/handhelds/pocketpc/>
CONFIG_SA1100_H3600
Say Y here if you intend to run this kernel on the Compaq iPAQ
H3600 handheld computer. Information about this machine and the
Linux port to this machine can be found at:
<http://www.handhelds.org/Compaq/index.html#iPAQ_H3600>
<http://www.compaq.com/products/handhelds/pocketpc/>
CONFIG_SA1100_H3800
Say Y here if you intend to run this kernel on the Compaq iPAQ H3800
series handheld computer. Information about this machine and the
Linux port to this machine can be found at:
<http://www.handhelds.org/Compaq/index.html#iPAQ_H3800>
<http://www.compaq.com/products/handhelds/pocketpc/>
CONFIG_H3600_SLEEVE
Choose this option to enable support for extension packs (sleeves)
for the Compaq iPAQ H3XXX series of handheld computers. This option
is required for the CF, PCMCIA, Bluetooth and GSM/GPRS extension
packs.
CONFIG_SA1100_FLEXANET
Say Y here if you intend to run this kernel on the FlexaNet
handheld instruments. Information about this machine can be
found at: <http://www.flexanet.com/>.
CONFIG_SA1100_FREEBIRD
Support the FreeBird board used in Coventive embedded products. See
Documentation/arm/SA1100/Freebird for more.
CONFIG_SA1100_GRAPHICSCLIENT
Say Y here if you are using an Applied Data Systems Intel(R)
StrongARM(R) SA-1100 based Graphics Client SBC. See
<http://www.flatpanels.com/> for information on this system.
CONFIG_SA1100_GRAPHICSMASTER
Say Y here if you are using an Applied Data Systems Intel(R)
StrongARM(R) SA-1100 based Graphics Master SBC with SA-1111
StrongARM companion chip. See
<http://www.applieddata.net/products_masterSpec.asp> for information
on this system.
CONFIG_SA1100_BADGE4
Say Y here if you want to build a kernel for the HP Laboratories
BadgePAD 4.
CONFIG_SA1100_JORNADA720
Say Y here if you want to build a kernel for the HP Jornada 720
handheld computer. See <http://www.hp.com/jornada/products/720>
for details.
CONFIG_SA1100_HUW_WEBPANEL
Say Y here to support the HuW Webpanel produced by Hoeft & Wessel
AG. English-language website is at
<http://www.hoeft-wessel.de/en.htm>; credits and build instructions
at Documentation/arm/SA1100/HUW_WEBPANEL.
CONFIG_SA1100_ITSY
Say Y here if you are using the Compaq Itsy experimental pocket
computer. See <http://research.compaq.com/wrl/projects/itsy/> for
more information.
CONFIG_SA1100_LART
Say Y here if you are using the Linux Advanced Radio Terminal
(also known as the LART). See <http://www.lart.tudelft.nl/> for
information on the LART.
CONFIG_SA1100_NANOENGINE
The nanoEngine is a StrongARM 1110-based single board computer
from Bright Star Engineering. More information is available at:
<http://www.brightstareng.com/arm/nanoeng.htm>.
Say Y if configuring for a nanoEngine.
Say N otherwise.
CONFIG_SA1100_OMNIMETER
Say Y here if you are using the inhand electronics OmniMeter. See
<http://www.inhandelectronics.com/html/omni1.html> for details.
CONFIG_SA1100_PANGOLIN
Pangolin is a StrongARM 1110-based evaluation platform produced
by Dialogue Technology. It has EISA slots for ease of configuration
with SDRAM/Flash memory card, USB/Serial/Audio card, Compact Flash
card, and TFT-LCD card.
Say Y if configuring for a Pangolin.
Say N otherwise.
CONFIG_SA1100_PLEB
Say Y here if you are using a Portable Linux Embedded Board
(also known as PLEB). See <http://www.cse.unsw.edu.au/~pleb/>
for more information.
CONFIG_SA1100_PT_SYSTEM3
Say Y here if you intend to build a kernel suitable to run on
a Pruftechnik Digital Board. For more information see
<http://www.pruftechnik.com>
CONFIG_SA1100_SHANNON
The Shannon (also known as a Tuxscreen, and also as a IS2630) was a
limited edition webphone produced by Philips. The Shannon is a SA1100
platform with a 640x480 LCD, touchscreen, CIR keyboard, PCMCIA slots,
and a telco interface.
CONFIG_SA1100_SHERMAN
Say Y here to support the Blazie Engineering `Sherman' StrongARM
1110-based SBC, used primarily in assistance products for the
visually impaired. The company is now Freedom Scientific, with
a website at <http://www.freedomscientific.com/index.html>. The
Sherman product, however, appears to have been discontinued.
CONFIG_SA1100_SIMPAD
The SIEMENS webpad SIMpad is based on the StrongARM 1110. There
are two different versions CL4 and SL4. CL4 has 32MB RAM and 16MB
FLASH. The SL4 version got 64 MB RAM and 32 MB FLASH and a
PCMCIA-Slot. The version for the Germany Telecom (DTAG) is the same
like CL4 in additional it has a PCMCIA-Slot. For more information
visit <http://www.my-siemens.com or www.siemens.ch>.
CONFIG_SA1100_PFS168
The Radisys Corp. PFS-168 (aka Tulsa) is an Intel® StrongArm® SA-1110 based
computer which includes the SA-1111 Microprocessor Companion Chip and other
custom I/O designed to add connectivity and multimedia features for vending
and business machine applications. Say Y here if you require support for
this target.
CONFIG_SA1100_VICTOR
Say Y here if you are using a Visu Aide Intel(R) StrongARM(R)
SA-1100 based Victor Digital Talking Book Reader. See
<http://www.visuaide.com/pagevictor.en.html> for information on
this system.
CONFIG_SA1100_XP860
:: Config help missing ::
:: 06 August 2002 ::
CONFIG_SA1100_YOPY
Say Y here to support the Yopy PDA. Product information at
<http://www.yopy.com/>. See Documentation/arm/SA110/Yopy
for more.
CONFIG_SA1100_STORK
Say Y here if you intend to run this kernel on the Stork
handheld computer.
arch/arm/mach-sa1100/Config.in 0 → 100644
View file @ c5ac1f1c
mainmenu_option next_comment
comment 'SA11x0 Implementations'
dep_bool ' Assabet' CONFIG_SA1100_ASSABET $CONFIG_ARCH_SA1100
dep_bool ' Include support for Neponset' CONFIG_ASSABET_NEPONSET $CONFIG_SA1100_ASSABET
dep_bool ' ADS Bitsy' CONFIG_SA1100_ADSBITSY $CONFIG_ARCH_SA1100
dep_bool ' Brutus' CONFIG_SA1100_BRUTUS $CONFIG_ARCH_SA1100
dep_bool ' CerfBoard' CONFIG_SA1100_CERF $CONFIG_ARCH_SA1100
if [ "$CONFIG_SA1100_CERF" = "y" ]; then
choice 'Cerf Flash available' \
"8MB CONFIG_SA1100_CERF_FLASH_8MB \
16MB CONFIG_SA1100_CERF_FLASH_16MB \
32MB CONFIG_SA1100_CERF_FLASH_32MB" 8MB
bool 'Cerf w/CPLD support (CerfPDA)' CONFIG_SA1100_CERF_CPLD
fi
dep_bool ' Compaq iPAQ H3100' CONFIG_SA1100_H3100 $CONFIG_ARCH_SA1100
dep_bool ' Compaq iPAQ H3600/H3700' CONFIG_SA1100_H3600 $CONFIG_ARCH_SA1100
dep_bool ' Compaq iPAQ H3800' CONFIG_SA1100_H3800 $CONFIG_ARCH_SA1100
if [ "$CONFIG_SA1100_H3100" = "y" -o "$CONFIG_SA1100_H3600" = "y" -o "$CONFIG_SA1100_H3800" = "y" ]; then
define_bool CONFIG_SA1100_H3XXX y
else
define_bool CONFIG_SA1100_H3XXX n
fi
#dep_bool ' Consus' CONFIG_SA1100_CONSUS $CONFIG_ARCH_SA1100
#dep_bool ' Empeg' CONFIG_SA1100_EMPEG $CONFIG_ARCH_SA1100
dep_bool ' Extenex HandHeld Theater (Squashtail)' CONFIG_SA1100_EXTENEX1 $CONFIG_ARCH_SA1100
if [ "$CONFIG_SA1100_EXTENEX1" = "y" ]; then
bool ' Support 16 MB of DRAM (not just 8)' CONFIG_SA1100_EXTENEX1_16MB
fi
dep_bool ' FlexaNet' CONFIG_SA1100_FLEXANET $CONFIG_ARCH_SA1100
dep_bool ' FreeBird-v1.1' CONFIG_SA1100_FREEBIRD $CONFIG_ARCH_SA1100
dep_bool ' GraphicsClient Plus' CONFIG_SA1100_GRAPHICSCLIENT $CONFIG_ARCH_SA1100
dep_bool ' GraphicsMaster' CONFIG_SA1100_GRAPHICSMASTER $CONFIG_ARCH_SA1100
dep_bool ' HP Labs BadgePAD 4' CONFIG_SA1100_BADGE4 $CONFIG_ARCH_SA1100
dep_bool ' HP Jornada 720' CONFIG_SA1100_JORNADA720 $CONFIG_ARCH_SA1100
dep_bool ' HuW WebPanel' CONFIG_SA1100_HUW_WEBPANEL $CONFIG_ARCH_SA1100
dep_bool ' Itsy' CONFIG_SA1100_ITSY $CONFIG_ARCH_SA1100
dep_bool ' LART' CONFIG_SA1100_LART $CONFIG_ARCH_SA1100
dep_bool ' nanoEngine' CONFIG_SA1100_NANOENGINE $CONFIG_ARCH_SA1100
dep_bool ' OmniMeter' CONFIG_SA1100_OMNIMETER $CONFIG_ARCH_SA1100
dep_bool ' Pangolin' CONFIG_SA1100_PANGOLIN $CONFIG_ARCH_SA1100
dep_bool ' PLEB' CONFIG_SA1100_PLEB $CONFIG_ARCH_SA1100
dep_bool ' PT System 3' CONFIG_SA1100_PT_SYSTEM3 $CONFIG_ARCH_SA1100
dep_bool ' Shannon' CONFIG_SA1100_SHANNON $CONFIG_ARCH_SA1100
dep_bool ' Sherman' CONFIG_SA1100_SHERMAN $CONFIG_ARCH_SA1100
dep_bool ' Simpad' CONFIG_SA1100_SIMPAD $CONFIG_ARCH_SA1100
dep_bool ' Tulsa' CONFIG_SA1100_PFS168 $CONFIG_ARCH_SA1100
dep_bool ' Victor' CONFIG_SA1100_VICTOR $CONFIG_ARCH_SA1100
dep_bool ' XP860' CONFIG_SA1100_XP860 $CONFIG_ARCH_SA1100
dep_bool ' Yopy' CONFIG_SA1100_YOPY $CONFIG_ARCH_SA1100
dep_bool ' Stork' CONFIG_SA1100_STORK $CONFIG_ARCH_SA1100
dep_tristate 'SA1100 USB function support' CONFIG_SA1100_USB $CONFIG_ARCH_SA1100
dep_tristate ' Support for SA11x0 USB network link function' CONFIG_SA1100_USB_NETLINK $CONFIG_SA1100_USB
dep_tristate ' Support for SA11x0 USB character device emulation' CONFIG_SA1100_USB_CHAR $CONFIG_SA1100_USB
dep_tristate 'Compaq iPAQ Handheld sleeve support' CONFIG_H3600_SLEEVE $CONFIG_SA1100_H3600
endmenu
arch/arm/mach-sa1100/Makefile
View file @ c5ac1f1c
......@@ -9,8 +9,8 @@ obj-n :=
obj- :=
led-y := leds.o
export-objs := dma.o generic.o irq.o pcipool.o sa1111.o sa1111-pcibuf.o \
usb_ctl.o usb_recv.o usb_send.o pm.o
export-objs := dma.o generic.o pcipool.o pm.o sa1111.o sa1111-pcibuf.o \
usb_ctl.o usb_recv.o usb_send.o
# This needs to be cleaned up. We probably need to have SA1100
# and SA1110 config symbols.
......@@ -24,8 +24,8 @@ obj-$(CONFIG_SA1100_PT_SYSTEM3) += cpu-sa1110.o
endif
# Next, the SA1111 stuff.
obj-$(CONFIG_SA1111) += sa1111.o
obj-$(CONFIG_USB_OHCI_SA1111) += sa1111-pcibuf.o pcipool.o
obj-$(CONFIG_SA1111) += sa1111.o
obj-$(CONFIG_USB_OHCI_HCD) += sa1111-pcibuf.o pcipool.o
# Specific board support
obj-$(CONFIG_SA1100_ADSBITSY) += adsbitsy.o
......
arch/arm/mach-sa1100/adsbitsy.c
View file @ c5ac1f1c
......@@ -69,7 +69,7 @@ static int __init adsbitsy_init(void)
return 0;
}
__initcall(adsbitsy_init);
arch_initcall(adsbitsy_init);
static void __init adsbitsy_init_irq(void)
{
......
arch/arm/mach-sa1100/assabet.c
View file @ c5ac1f1c
......@@ -18,6 +18,7 @@
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/serial_core.h>
#include <linux/delay.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>
......@@ -73,12 +74,19 @@ static void assabet_backlight_power(int on)
ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
}
/*
* Turn on/off the backlight. When turning the backlight on,
* we wait 500us after turning it on so we don't cause the
* supplies to droop when we enable the LCD controller (and
* cause a hard reset.)
*/
static void assabet_lcd_power(int on)
{
#ifndef ASSABET_PAL_VIDEO
if (on)
if (on) {
ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
else
udelay(500);
} else
#endif
ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
}
......@@ -88,6 +96,12 @@ static int __init assabet_init(void)
if (!machine_is_assabet())
return -EINVAL;
/*
* Ensure that the power supply is in "high power" mode.
*/
GPDR |= GPIO_GPIO16;
GPSR = GPIO_GPIO16;
/*
* Ensure that these pins are set as outputs and are driving
* logic 0. This ensures that we won't inadvertently toggle
......@@ -126,7 +140,7 @@ static int __init assabet_init(void)
return 0;
}
__initcall(assabet_init);
arch_initcall(assabet_init);
/*
......
arch/arm/mach-sa1100/badge4.c
View file @ c5ac1f1c
......@@ -57,8 +57,9 @@ static int __init badge4_init(void)
ret = badge4_sa1111_init();
if (ret < 0)
printk(KERN_ERR __FUNCTION__
": SA-1111 initialization failed (%d)\n", ret);
printk(KERN_ERR
"%s: SA-1111 initialization failed (%d)\n",
__FUNCTION__, ret);
/* N.B, according to rmk this is the singular place that GPDR
should be set */
......@@ -109,7 +110,7 @@ static int __init badge4_init(void)
return 0;
}
__initcall(badge4_init);
arch_initcall(badge4_init);
static unsigned badge4_5V_bitmap = 0;
......@@ -132,11 +133,11 @@ void badge4_set_5V(unsigned subsystem, int on)
/* detect on->off and off->on transitions */
if ((!old_5V_bitmap) && (badge4_5V_bitmap)) {
/* was off, now on */
printk(KERN_INFO __FUNCTION__ ": enabling 5V supply rail\n");
printk(KERN_INFO "%s: enabling 5V supply rail\n", __FUNCTION__);
GPSR = BADGE4_GPIO_PCMEN5V;
} else if ((old_5V_bitmap) && (!badge4_5V_bitmap)) {
/* was on, now off */
printk(KERN_INFO __FUNCTION__ ": disabling 5V supply rail\n");
printk(KERN_INFO "%s: disabling 5V supply rail\n", __FUNCTION__);
GPCR = BADGE4_GPIO_PCMEN5V;
}
......
arch/arm/mach-sa1100/cpu-sa1100.c
View file @ c5ac1f1c
......@@ -254,4 +254,4 @@ static int __init sa1100_dram_init(void)
return ret;
}
__initcall(sa1100_dram_init);
core_initcall(sa1100_dram_init);
arch/arm/mach-sa1100/cpu-sa1110.c
View file @ c5ac1f1c
......@@ -327,4 +327,4 @@ static int __init sa1110_clk_init(void)
return 0;
}
__initcall(sa1110_clk_init);
core_initcall(sa1110_clk_init);
arch/arm/mach-sa1100/dma.c
View file @ c5ac1f1c
......@@ -126,9 +126,9 @@ int sa1100_request_dma (dma_device_t device, const char *device_id,
err = request_irq(IRQ_DMA0 + i, dma_irq_handler, SA_INTERRUPT,
device_id, regs);
if (err) {
printk(KERN_ERR __FUNCTION__
"unable to request IRQ %d for %s\n",
IRQ_DMA0 + i, device_id);
printk(KERN_ERR
"%s: unable to request IRQ %d for %s\n",
__FUNCTION__, IRQ_DMA0 + i, device_id);
dma->device = 0;
return err;
}
......@@ -164,12 +164,12 @@ void sa1100_free_dma(dma_regs_t *regs)
if (regs == (dma_regs_t *)&DDAR(i))
break;
if (i >= SA1100_DMA_CHANNELS) {
printk(KERN_ERR __FUNCTION__ ": bad DMA identifier\n");
printk(KERN_ERR "%s: bad DMA identifier\n", __FUNCTION__);
return;
}
if (!dma_chan[i].device) {
printk(KERN_ERR __FUNCTION__ "Trying to free free DMA\n");
printk(KERN_ERR "%s: Trying to free free DMA\n", __FUNCTION__);
return;
}
......@@ -215,10 +215,14 @@ void sa1100_free_dma(dma_regs_t *regs)
int sa1100_start_dma(dma_regs_t *regs, dma_addr_t dma_ptr, u_int size)
{
long flags;
unsigned long flags;
u_long status;
int ret;
if (dma_ptr & 3)
printk(KERN_WARNING "DMA: unaligned start address (0x%08lx)\n",
(unsigned long)dma_ptr);
if (size > MAX_DMA_SIZE)
return -EOVERFLOW;
......@@ -324,7 +328,7 @@ void sa1100_reset_dma(dma_regs_t *regs)
if (regs == (dma_regs_t *)&DDAR(i))
break;
if (i >= SA1100_DMA_CHANNELS) {
printk(KERN_ERR __FUNCTION__ ": bad DMA identifier\n");
printk(KERN_ERR "%s: bad DMA identifier\n", __FUNCTION__);
return;
}
......
arch/arm/mach-sa1100/flexanet.c
View file @ c5ac1f1c
......@@ -143,14 +143,6 @@ static int flexanet_serial_init(void)
}
static int __init flexanet_init(void)
{
return 0;
}
__initcall(flexanet_init);
static struct map_desc flexanet_io_desc[] __initdata = {
/* virtual physical length type */
{ 0xf0000000, 0x10000000, 0x00001000, MT_DEVICE }, /* Board Control Register */
......
arch/arm/mach-sa1100/freebird.c
View file @ c5ac1f1c
......@@ -48,7 +48,7 @@ static int __init freebird_init(void)
return 0;
}
__initcall(freebird_init);
arch_initcall(freebird_init);
static struct map_desc freebird_io_desc[] __initdata = {
/* virtual physical length type */
......
arch/arm/mach-sa1100/generic.c
View file @ c5ac1f1c
......@@ -8,11 +8,6 @@
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Since this file should be linked before any other machine specific file,
* the __initcall() here will be executed first. This serves as default
* initialization stuff for SA1100 machines which can be overriden later if
* need be.
*/
#include <linux/config.h>
#include <linux/module.h>
......@@ -117,7 +112,7 @@ static int __init sa1100_init(void)
return 0;
}
__initcall(sa1100_init);
core_initcall(sa1100_init);
void (*sa1100fb_backlight_power)(int on);
void (*sa1100fb_lcd_power)(int on);
......
arch/arm/mach-sa1100/graphicsmaster.c
View file @ c5ac1f1c
......@@ -59,7 +59,7 @@ static int __init graphicsmaster_init(void)
return 0;
}
__initcall(graphicsmaster_init);
arch_initcall(graphicsmaster_init);
/*
* Handlers for GraphicsMaster's external IRQ logic
......
arch/arm/mach-sa1100/h3600.c
View file @ c5ac1f1c
......@@ -133,7 +133,8 @@ static void h3100_control_egpio( enum ipaq_egpio_type x, int setp )
/*
if ( x != IPAQ_EGPIO_VPP_ON ) {
printk(__FUNCTION__ " : type=%d (%s) gpio=0x%x (0x%x) egpio=0x%x (0x%x) setp=%d\n",
printk("%s: type=%d (%s) gpio=0x%x (0x%x) egpio=0x%x (0x%x) setp=%d\n",
__FUNCTION__,
x, egpio_names[x], GPLR, gpio, h3600_egpio, egpio, setp );
}
*/
......
arch/arm/mach-sa1100/huw_webpanel.c
View file @ c5ac1f1c
......@@ -52,7 +52,7 @@ static int __init init_huw_cs3(void)
return 0;
}
__initcall(init_huw_cs3);
arch_initcall(init_huw_cs3);
/**
......
arch/arm/mach-sa1100/jornada720.c
View file @ c5ac1f1c
......@@ -53,7 +53,7 @@ static int __init jornada720_init(void)
return 0;
}
__initcall(jornada720_init);
arch_initcall(jornada720_init);
static struct map_desc jornada720_io_desc[] __initdata = {
/* virtual physical length type */
......
arch/arm/mach-sa1100/leds.c
View file @ c5ac1f1c
......@@ -44,4 +44,4 @@ sa1100_leds_init(void)
return 0;
}
__initcall(sa1100_leds_init);
core_initcall(sa1100_leds_init);
arch/arm/mach-sa1100/neponset.c
View file @ c5ac1f1c
......@@ -216,7 +216,7 @@ static int __init neponset_init(void)
return sa1111_init(&neponset_device, 0x40000000, IRQ_NEPONSET_SA1111);
}
__initcall(neponset_init);
arch_initcall(neponset_init);
static struct map_desc neponset_io_desc[] __initdata = {
/* virtual physical length type */
......
arch/arm/mach-sa1100/omnimeter.c
View file @ c5ac1f1c
......@@ -39,7 +39,7 @@ static int __init omnimeter_init(void)
return 0;
}
__initcall(omnimeter_init);
arch_initcall(omnimeter_init);
static struct map_desc omnimeter_io_desc[] __initdata = {
/* virtual physical length type */
......
arch/arm/mach-sa1100/pcipool.c
View file @ c5ac1f1c
......@@ -20,8 +20,6 @@
#include <asm/page.h>
#include "pcipool.h"
/*
* Pool allocator ... wraps the pci_alloc_consistent page allocator, so
* small blocks are easily used by drivers for bus mastering controllers.
......@@ -33,7 +31,6 @@ struct pci_pool { /* the pool */
spinlock_t lock;
size_t blocks_per_page;
size_t size;
int flags;
struct pci_dev *dev;
size_t allocation;
char name [32];
......@@ -52,6 +49,19 @@ struct pci_page { /* cacheable header for 'allocation' bytes */
// #define CONFIG_PCIPOOL_DEBUG
static inline const char *slot_name(const struct pci_pool *pool)
{
const struct pci_dev *pdev = pool->dev;
if (pdev == 0)
return "[0]";
else if (dev_is_sa1111(pdev))
return "[SA-1111]";
else
return pdev->slot_name;
}
/**
* pci_pool_create - Creates a pool of pci consistent memory blocks, for dma.
......@@ -60,7 +70,7 @@ struct pci_page { /* cacheable header for 'allocation' bytes */
* @size: size of the blocks in this pool.
* @align: alignment requirement for blocks; must be a power of two
* @allocation: returned blocks won't cross this boundary (or zero)
* @flags: SLAB_* flags (not all are supported).
* @mem_flags: SLAB_* flags.
*
* Returns a pci allocation pool with the requested characteristics, or
* null if one can't be created. Given one of these pools, pci_pool_alloc()
......@@ -76,7 +86,7 @@ struct pci_page { /* cacheable header for 'allocation' bytes */
*/
struct pci_pool *
pci_pool_create (const char *name, struct pci_dev *pdev,
size_t size, size_t align, size_t allocation, int flags)
size_t size, size_t align, size_t allocation, int mem_flags)
{
struct pci_pool *retval;
......@@ -100,13 +110,9 @@ pci_pool_create (const char *name, struct pci_dev *pdev,
} else if (allocation < size)
return 0;
if (!(retval = kmalloc (sizeof *retval, flags)))
if (!(retval = kmalloc (sizeof *retval, mem_flags)))
return retval;
#ifdef CONFIG_PCIPOOL_DEBUG
flags |= SLAB_POISON;
#endif
strncpy (retval->name, name, sizeof retval->name);
retval->name [sizeof retval->name - 1] = 0;
......@@ -114,14 +120,13 @@ pci_pool_create (const char *name, struct pci_dev *pdev,
INIT_LIST_HEAD (&retval->page_list);
spin_lock_init (&retval->lock);
retval->size = size;
retval->flags = flags;
retval->allocation = allocation;
retval->blocks_per_page = allocation / size;
init_waitqueue_head (&retval->waitq);
#ifdef CONFIG_PCIPOOL_DEBUG
printk (KERN_DEBUG "pcipool create %s/%s size %d, %d/page (%d alloc)\n",
pdev ? pdev->slot_name : NULL, retval->name, size,
slot_name(retval), retval->name, size,
retval->blocks_per_page, allocation);
#endif
......@@ -143,11 +148,13 @@ pool_alloc_page (struct pci_pool *pool, int mem_flags)
if (!page)
return 0;
page->vaddr = pci_alloc_consistent (pool->dev,
pool->allocation, &page->dma);
pool->allocation,
&page->dma);
if (page->vaddr) {
memset (page->bitmap, 0xff, mapsize); // bit set == free
if (pool->flags & SLAB_POISON)
memset (page->vaddr, POOL_POISON_BYTE, pool->allocation);
#ifdef CONFIG_DEBUG_SLAB
memset (page->vaddr, POOL_POISON_BYTE, pool->allocation);
#endif
list_add (&page->page_list, &pool->page_list);
} else {
kfree (page);
......@@ -173,8 +180,9 @@ pool_free_page (struct pci_pool *pool, struct pci_page *page)
{
dma_addr_t dma = page->dma;
if (pool->flags & SLAB_POISON)
memset (page->vaddr, POOL_POISON_BYTE, pool->allocation);
#ifdef CONFIG_DEBUG_SLAB
memset (page->vaddr, POOL_POISON_BYTE, pool->allocation);
#endif
pci_free_consistent (pool->dev, pool->allocation, page->vaddr, dma);
list_del (&page->page_list);
kfree (page);
......@@ -195,8 +203,7 @@ pci_pool_destroy (struct pci_pool *pool)
#ifdef CONFIG_PCIPOOL_DEBUG
printk (KERN_DEBUG "pcipool destroy %s/%s\n",
pool->dev ? pool->dev->slot_name : NULL,
pool->name);
slot_name(pool), pool->name);
#endif
spin_lock_irqsave (&pool->lock, flags);
......@@ -206,8 +213,7 @@ pci_pool_destroy (struct pci_pool *pool)
struct pci_page, page_list);
if (is_page_busy (pool->blocks_per_page, page->bitmap)) {
printk (KERN_ERR "pci_pool_destroy %s/%s, %p busy\n",
pool->dev ? pool->dev->slot_name : NULL,
pool->name, page->vaddr);
slot_name(pool), pool->name, page->vaddr);
/* leak the still-in-use consistent memory */
list_del (&page->page_list);
kfree (page);
......@@ -327,35 +333,32 @@ pci_pool_free (struct pci_pool *pool, void *vaddr, dma_addr_t dma)
int map, block;
if ((page = pool_find_page (pool, dma)) == 0) {
printk (KERN_ERR "pci_pool_free %s/%s, %p/%x (bad dma)\n",
pool->dev ? pool->dev->slot_name : NULL,
pool->name, vaddr, dma);
return;
}
#ifdef CONFIG_PCIPOOL_DEBUG
if (((dma - page->dma) + (void *)page->vaddr) != vaddr) {
printk (KERN_ERR "pci_pool_free %s/%s, %p (bad vaddr)/%x\n",
printk (KERN_ERR "pci_pool_free %s/%s, %p/%lx (bad dma)\n",
pool->dev ? pool->dev->slot_name : NULL,
pool->name, vaddr, dma);
pool->name, vaddr, (unsigned long) dma);
return;
}
#endif
block = dma - page->dma;
block /= pool->size;
map = block / BITS_PER_LONG;
block %= BITS_PER_LONG;
#ifdef CONFIG_PCIPOOL_DEBUG
#ifdef CONFIG_DEBUG_SLAB
if (((dma - page->dma) + (void *)page->vaddr) != vaddr) {
printk (KERN_ERR "pci_pool_free %s/%s, %p (bad vaddr)/%lx\n",
pool->dev ? pool->dev->slot_name : NULL,
pool->name, vaddr, (unsigned long) dma);
return;
}
if (page->bitmap [map] & (1UL << block)) {
printk (KERN_ERR "pci_pool_free %s/%s, dma %x already free\n",
pool->dev ? pool->dev->slot_name : NULL,
pool->name, dma);
return;
}
memset (vaddr, POOL_POISON_BYTE, pool->size);
#endif
if (pool->flags & SLAB_POISON)
memset (vaddr, POOL_POISON_BYTE, pool->size);
spin_lock_irqsave (&pool->lock, flags);
set_bit (block, &page->bitmap [map]);
......@@ -369,9 +372,19 @@ pci_pool_free (struct pci_pool *pool, void *vaddr, dma_addr_t dma)
spin_unlock_irqrestore (&pool->lock, flags);
}
EXPORT_SYMBOL (pci_pool_create);
EXPORT_SYMBOL (pci_pool_destroy);
EXPORT_SYMBOL (pci_pool_alloc);
EXPORT_SYMBOL (pci_pool_free);
/* **************************************** */
static int __init pcipool_init(void)
{
MOD_INC_USE_COUNT; /* never unload */
return 0;
}
module_init(pcipool_init);
MODULE_LICENSE("GPL");
arch/arm/mach-sa1100/pcipool.h deleted 100644 → 0
View file @ 1673f3b4
struct pci_pool *pci_pool_create (const char *name, struct pci_dev *dev,
size_t size, size_t align, size_t allocation, int flags);
void pci_pool_destroy (struct pci_pool *pool);
void *pci_pool_alloc (struct pci_pool *pool, int flags, dma_addr_t *handle);
void pci_pool_free (struct pci_pool *pool, void *vaddr, dma_addr_t addr);
arch/arm/mach-sa1100/pfs168.c
View file @ c5ac1f1c
......@@ -39,7 +39,7 @@ static int __init pfs168_init(void)
return sa1111_init(NULL, 0x40000000, IRQ_GPIO25);
}
__initcall(pfs168_init);
arch_initcall(pfs168_init);
static void __init pfs168_init_irq(void)
......
arch/arm/mach-sa1100/pm.c
View file @ c5ac1f1c
......@@ -225,7 +225,7 @@ static int __init pm_init(void)
return 0;
}
__initcall(pm_init);
fs_initcall(pm_init);
#endif
......
arch/arm/mach-sa1100/sa1111-pcibuf.c
View file @ c5ac1f1c
This diff is collapsed.
arch/arm/mach-sa1100/simpad.c
View file @ c5ac1f1c
......@@ -131,7 +131,7 @@ static int __init cs3_init(void)
return 0;
}
__initcall(cs3_init);
arch_initcall(cs3_init);
#endif // CONFIG_PROC_FS
......
arch/arm/mach-sa1100/stork.c
View file @ c5ac1f1c
......@@ -284,25 +284,6 @@ storkInitTSandDtoA(void)
storkClockShortToDtoA(0x0A00); /* turn on the brightness */
}
/* see asm-arm/keyboard.h - there are a bunch of basically virtual functions required */
/* we have to fill in for them or else we can't call handle_scancode when we see a button pressed */
static int
stork_kbd_translate(unsigned char scancode, unsigned char *keycode, char rawmode)
{
if (keycode)
*keycode = scancode;
return 1;
}
static char
stork_kbd_unexpected_up(unsigned char code)
{
return 0;
}
struct map_desc stork_io_desc[] __initdata = {
/* virtual physical length type */
{ STORK_VM_BASE_CS1, STORK_VM_OFF_CS1, 0x01000000, MT_DEVICE }, /* EGPIO 0 */
......@@ -331,9 +312,6 @@ stork_map_io(void)
storkInitTSandDtoA();
k_translate = stork_kbd_translate;
k_unexpected_up = stork_kbd_unexpected_up;
return 0;
}
......
arch/arm/mach-sa1100/system3.c
View file @ c5ac1f1c
......@@ -429,7 +429,7 @@ static int __init system3_init(void)
/**********************************************************************
* kernel magic macros
*/
__initcall(system3_init);
arch_initcall(system3_init);
MACHINE_START(PT_SYSTEM3, "PT System 3")
BOOT_MEM(0xc0000000, 0x80000000, 0xf8000000)
......
arch/arm/mach-sa1100/xp860.c
View file @ c5ac1f1c
......@@ -54,7 +54,7 @@ static int __init xp860_init(void)
return 0;
}
__initcall(xp860_init);
arch_initcall(xp860_init);
static struct map_desc xp860_io_desc[] __initdata = {
/* virtual physical length type */
......
arch/arm/mach-sa1100/yopy.c
View file @ c5ac1f1c
......@@ -65,7 +65,7 @@ static int __init yopy_hw_init(void)
return 0;
}
__initcall(yopy_hw_init);
arch_initcall(yopy_hw_init);
static struct map_desc yopy_io_desc[] __initdata = {
......
arch/arm/mm/abort-lv4t.S
View file @ c5ac1f1c
......@@ -21,9 +21,9 @@ ENTRY(v4t_late_abort)
tst r3, #PSR_T_BIT @ check for thumb mode
mrc p15, 0, r1, c5, c0, 0 @ get FSR
mrc p15, 0, r0, c6, c0, 0 @ get FAR
bic r1, r1, #1 << 11 | 1 << 10 @ clear bits 11 and 10 of FSR
ldreq r8, [r2] @ read arm instruction
bne .data_thumb_abort
ldr r8, [r2] @ read arm instruction
bic r1, r1, #1 << 11 | 1 << 10 @ clear bits 11 and 10 of FSR
tst r8, #1 << 20 @ L = 1 -> write?
orreq r1, r1, #1 << 11 @ yes.
and r7, r8, #15 << 24
......@@ -203,7 +203,7 @@ ENTRY(v4t_late_abort)
ldr r7, [sp, #13 << 2]
tst r8, #1 << 11
addne r7, r7, r6, lsl #2 @ increment SP if PUSH
subeq r7, r7, r6, lsr #2 @ decrement SP if POP
subeq r7, r7, r6, lsl #2 @ decrement SP if POP
str r7, [sp, #13 << 2]
mov pc, lr
......
arch/arm/mm/alignment.c
View file @ c5ac1f1c
......@@ -611,4 +611,4 @@ static int __init alignment_init(void)
return 0;
}
__initcall(alignment_init);
fs_initcall(alignment_init);
arch/arm/mm/consistent.c
View file @ c5ac1f1c
......@@ -98,7 +98,8 @@ void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *handl
{
int gfp = GFP_KERNEL;
if (hwdev == NULL || hwdev->dma_mask != 0xffffffff)
if (hwdev == NULL || dev_is_sa1111(hwdev) ||
hwdev->dma_mask != 0xffffffff)
gfp |= GFP_DMA;
return consistent_alloc(gfp, size, handle);
......
arch/arm/mm/init.c
View file @ c5ac1f1c
......@@ -52,6 +52,8 @@ mmu_gather_t mmu_gathers[NR_CPUS];
extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
extern char _stext, _text, _etext, _end, __init_begin, __init_end;
extern unsigned long phys_initrd_start;
extern unsigned long phys_initrd_size;
/*
* The sole use of this is to pass memory configuration
......@@ -254,18 +256,17 @@ find_memend_and_nodes(struct meminfo *mi, struct node_info *np)
static int __init check_initrd(struct meminfo *mi)
{
int initrd_node = -2;
#ifdef CONFIG_BLK_DEV_INITRD
unsigned long end = phys_initrd_start + phys_initrd_size;
/*
* Make sure that the initrd is within a valid area of
* memory.
*/
if (initrd_start) {
unsigned long phys_initrd_start, phys_initrd_end;
if (phys_initrd_size) {
unsigned int i;
phys_initrd_start = __pa(initrd_start);
phys_initrd_end = __pa(initrd_end);
initrd_node = -1;
for (i = 0; i < mi->nr_banks; i++) {
unsigned long bank_end;
......@@ -273,7 +274,7 @@ static int __init check_initrd(struct meminfo *mi)
bank_end = mi->bank[i].start + mi->bank[i].size;
if (mi->bank[i].start <= phys_initrd_start &&
phys_initrd_end <= bank_end)
end <= bank_end)
initrd_node = mi->bank[i].node;
}
}
......@@ -281,8 +282,8 @@ static int __init check_initrd(struct meminfo *mi)
if (initrd_node == -1) {
printk(KERN_ERR "initrd (0x%08lx - 0x%08lx) extends beyond "
"physical memory - disabling initrd\n",
initrd_start, initrd_end);
initrd_start = initrd_end = 0;
phys_initrd_start, end);
phys_initrd_start = phys_initrd_size = 0;
}
#endif
......@@ -423,9 +424,12 @@ void __init bootmem_init(struct meminfo *mi)
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_node >= 0)
reserve_bootmem_node(NODE_DATA(initrd_node), __pa(initrd_start),
initrd_end - initrd_start);
if (phys_initrd_size && initrd_node >= 0) {
reserve_bootmem_node(NODE_DATA(initrd_node), phys_initrd_start,
phys_initrd_size);
initrd_start = __phys_to_virt(phys_initrd_start);
initrd_end = initrd_start + phys_initrd_size;
}
#endif
if (map_pg != bootmap_pfn + bootmap_pages)
......
arch/arm/mm/minicache.c
View file @ c5ac1f1c
......@@ -65,4 +65,4 @@ static int __init minicache_init(void)
return 0;
}
__initcall(minicache_init);
core_initcall(minicache_init);
arch/arm/nwfpe/entry.S
View file @ c5ac1f1c
......@@ -23,6 +23,8 @@
/* This is the kernel's entry point into the floating point emulator.
It is called from the kernel with code similar to this:
sub r4, r5, #4
ldrt r0, [r4] @ r0 = instruction
adrsvc al, r9, ret_from_exception @ r9 = normal FP return
adrsvc al, lr, fpundefinstr @ lr = undefined instr return
......@@ -73,11 +75,7 @@ nwfpe_enter:
mov r4, lr @ save the failure-return addresses
mov sl, sp
bl FPA11_CheckInit @ check to see if we are initialised
ldr r5, [sp, #60] @ get contents of PC;
sub r8, r5, #4
.Lx2: ldrt r0, [r8] @ get actual instruction into r0
emulate:
bl EmulateAll @ emulate the instruction
cmp r0, #0 @ was emulation successful
......@@ -118,5 +116,4 @@ next:
.section __ex_table,"a"
.align 3
.long .Lx1, .Lfix
.long .Lx2, .Lfix
.previous
arch/arm/nwfpe/entry26.S
View file @ c5ac1f1c
......@@ -66,7 +66,6 @@ several floating point instructions. */
.globl nwfpe_enter
nwfpe_enter:
mov sl, sp
bl FPA11_CheckInit @ check to see if we are initialised
ldr r5, [sp, #60] @ get contents of PC
bic r5, r5, #0xfc000003
......
arch/arm/nwfpe/fpa11.c
View file @ c5ac1f1c
......@@ -34,7 +34,7 @@ unsigned int EmulateCPDT(const unsigned int);
unsigned int EmulateCPRT(const unsigned int);
/* Reset the FPA11 chip. Called to initialize and reset the emulator. */
void resetFPA11(void)
static void resetFPA11(void)
{
int i;
FPA11 *fpa11 = GET_FPA11();
......@@ -126,16 +126,14 @@ void SetRoundingPrecision(const unsigned int opcode)
}
}
void FPA11_CheckInit(void)
void nwfpe_init(union fp_state *fp)
{
FPA11 *fpa11 = GET_FPA11();
if (unlikely(fpa11->initflag == 0))
{
resetFPA11();
SetRoundingMode(ROUND_TO_NEAREST);
SetRoundingPrecision(ROUND_EXTENDED);
fpa11->initflag = 1;
}
FPA11 *fpa11 = (FPA11 *)fp;
memset(fpa11, 0, sizeof(FPA11));
resetFPA11();
SetRoundingMode(ROUND_TO_NEAREST);
SetRoundingPrecision(ROUND_EXTENDED);
fpa11->initflag = 1;
}
/* Emulate the instruction in the opcode. */
......
arch/arm/nwfpe/fpa11.h
View file @ c5ac1f1c
......@@ -80,8 +80,8 @@ typedef struct tagFPA11 {
initialised. */
} FPA11;
extern void resetFPA11(void);
extern void SetRoundingMode(const unsigned int);
extern void SetRoundingPrecision(const unsigned int);
extern void nwfpe_init(union fp_state *fp);
#endif
arch/arm/nwfpe/fpmodule.c
View file @ c5ac1f1c
......@@ -42,10 +42,8 @@
#include "fpa11.inl"
/* kernel symbols required for signal handling */
typedef struct task_struct* PTASK;
#ifdef MODULE
void fp_send_sig(unsigned long sig, PTASK p, int priv);
void fp_send_sig(unsigned long sig, struct task_struct *p, int priv);
#if LINUX_VERSION_CODE > 0x20115
MODULE_AUTHOR("Scott Bambrough <scottb@rebel.com>");
MODULE_DESCRIPTION("NWFPE floating point emulator");
......@@ -63,9 +61,11 @@ void fp_setup(void);
/* external declarations for saved kernel symbols */
extern void (*kern_fp_enter)(void);
extern void (*fp_init)(union fp_state *);
/* Original value of fp_enter from kernel before patched by fpe_init. */
static void (*orig_fp_enter)(void);
static void (*orig_fp_init)(union fp_state *);
/* forward declarations */
extern void nwfpe_enter(void);
......@@ -108,7 +108,9 @@ static int __init fpe_init(void)
/* Save pointer to the old FP handler and then patch ourselves in */
orig_fp_enter = kern_fp_enter;
orig_fp_init = fp_init;
kern_fp_enter = nwfpe_enter;
fp_init = nwfpe_init;
return 0;
}
......@@ -117,6 +119,7 @@ static void __exit fpe_exit(void)
{
/* Restore the values we saved earlier. */
kern_fp_enter = orig_fp_enter;
fp_init = orig_fp_init;
}
/*
......
arch/arm/nwfpe/fpopcode.h
View file @ c5ac1f1c
......@@ -26,7 +26,7 @@
ARM Floating Point Instruction Classes
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
|c o n d|1 1 0 P|U|u|W|L| Rn |v| Fd |0|0|0|1| o f f s e t | CPDT
|c o n d|1 1 0 P|U|w|W|L| Rn |x| Fd |0|0|0|1| o f f s e t | CPDT
|c o n d|1 1 0 P|U|w|W|L| Rn |x| Fd |0|0|1|0| o f f s e t | CPDT (copro 2)
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
|c o n d|1 1 1 0|a|b|c|d|e| Fn |j| Fd |0|0|0|1|f|g|h|0|i| Fm | CPDO
|c o n d|1 1 1 0|a|b|c|L|e| Fn | Rd |0|0|0|1|f|g|h|1|i| Fm | CPRT
......@@ -34,7 +34,7 @@ ARM Floating Point Instruction Classes
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |
CPDT data transfer instructions
LDF, STF, LFM, SFM
LDF, STF, LFM (copro 2), SFM (copro 2)
CPDO dyadic arithmetic instructions
ADF, MUF, SUF, RSF, DVF, RDF,
......
include/asm-arm/arch-adifcc/memory.h
View file @ c5ac1f1c
......@@ -52,6 +52,4 @@
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
#define PHYS_TO_NID(x) 0
#endif
include/asm-arm/arch-anakin/keyboard.h deleted 100644 → 0
View file @ 1673f3b4
/*
* linux/include/asm-arm/arch-anakin/keyboard.h
*
* Copyright (C) 2001 Aleph One Ltd. for Acunia N.V.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Changelog:
* 11-Apr-2001 TTC Created
*/
#define kbd_init_hw() do { } while (0)
#define kbd_enable_irq() do { } while (0)
#define kbd_disable_irq() do { } while (0)
include/asm-arm/arch-anakin/memory.h
View file @ c5ac1f1c
......@@ -31,6 +31,4 @@
#define __virt_to_bus__is_a_macro
#define __bus_to_virt__is_a_macro
#define PHYS_TO_NID(addr) (0)
#endif
include/asm-arm/arch-arc/memory.h
View file @ c5ac1f1c
......@@ -50,6 +50,4 @@
#define __bus_to_virt__is_a_macro
#define __bus_to_virt(x) (x)
#define PHYS_TO_NID(addr) (0)
#endif
include/asm-arm/arch-cl7500/memory.h
View file @ c5ac1f1c
......@@ -46,6 +46,4 @@
#define __bus_to_virt__is_a_macro
#define __bus_to_virt(x) __phys_to_virt(x)
#define PHYS_TO_NID(addr) (0)
#endif
include/asm-arm/arch-clps711x/hardware.h
View file @ c5ac1f1c
......@@ -65,7 +65,6 @@
#define EP7212_BASE CLPS7111_VIRT_BASE
#include <asm/hardware/ep7212.h>
#endif
#define SYSPLD_VIRT_BASE 0xfe000000
......@@ -175,5 +174,65 @@
#define EDB_PD3_LCDBL (1<<3)
#endif
#if defined (CONFIG_ARCH_CEIVA)
#define CEIVA_VIRT_BASE CLPS7111_VIRT_BASE
#define CEIVA_BASE CLPS7111_VIRT_BASE
#include <asm/hardware/clps7111.h>
#include <asm/hardware/ep7212.h>
/*
* The two flash banks are wired to chip selects 0 and 1. This is the mapping
* for them.
*
* nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running
* in jumpered boot mode.
*/
#define CEIVA_PHYS_FLASH1 CS0_PHYS_BASE /* physical */
#define CEIVA_PHYS_FLASH2 CS1_PHYS_BASE /* physical */
#define CEIVA_VIRT_FLASH1 (0xfa000000) /* virtual */
#define CEIVA_VIRT_FLASH2 (0xfb000000) /* virtual */
#define CEIVA_FLASH_SIZE 0x100000
#define CEIVA_FLASH_WIDTH 2
#define SRAM_START 0x60000000
#define SRAM_SIZE 0xc000
#define SRAM_WIDTH 4
#define BOOTROM_START 0x70000000
#define BOOTROM_SIZE 0x80
#define BOOTROM_WIDTH 4
/*
* SED1355 LCD controller
*/
#define CEIVA_PHYS_SED1355 CS2_PHYS_BASE
#define CEIVA_VIRT_SED1355 (0xfc000000)
/*
* Relevant bits in port D, which controls power to the various parts of
* the LCD on the Ceiva Photo Max, and reset to the LCD controller.
*/
// Reset line to SED1355 (must be high to operate)
#define CEIVA_PD1_LCDRST (1<<1)
// LCD panel enable (set to one, to enable LCD)
#define CEIVA_PD4_LCDEN (1<<4)
// Backlight (set to one, to turn on backlight
#define CEIVA_PD5_LCDBL (1<<5)
/*
* Relevant bits in port B, which report the status of the buttons.
*/
// White button
#define CEIVA_PB4_WHT_BTN (1<<4)
// Black button
#define CEIVA_PB0_BLK_BTN (1<<0)
#endif // #if defined (CONFIG_ARCH_CEIVA)
#endif
include/asm-arm/arch-clps711x/memory.h
View file @ c5ac1f1c
......@@ -90,8 +90,6 @@
* memory bank. For those systems, simply undefine CONFIG_DISCONTIGMEM.
*/
#ifdef CONFIG_ARCH_EDB7211
#ifdef CONFIG_DISCONTIGMEM
/*
* Because of the wide memory address space between physical RAM banks on the
......@@ -155,11 +153,5 @@
#endif /* CONFIG_DISCONTIGMEM */
#endif /* CONFIG_ARCH_EDB7211 */
#ifndef PFN_TO_NID
#define PFN_TO_NID(pfn) (0)
#endif
#endif
include/asm-arm/arch-ebsa110/memory.h
View file @ c5ac1f1c
......@@ -48,6 +48,4 @@
#define __bus_to_virt__is_a_macro
#define __bus_to_virt(x) (x)
#define PHYS_TO_NID(addr) (0)
#endif
include/asm-arm/arch-ebsa285/keyboard.h deleted 100644 → 0
View file @ 1673f3b4
/*
* linux/include/asm-arm/arch-ebsa285/keyboard.h
*
* Keyboard driver definitions for EBSA285 architecture
*
* Copyright (C) 1998-2001 Russell King
* (C) 1998 Phil Blundell
*/
#define kbd_init_hw() do { } while (0)
include/asm-arm/arch-ebsa285/memory.h
View file @ c5ac1f1c
......@@ -80,6 +80,4 @@ extern unsigned long __bus_to_virt(unsigned long);
#define __phys_to_virt__is_a_macro
#define __phys_to_virt(ppage) ((unsigned long)(ppage) + PAGE_OFFSET)
#define PHYS_TO_NID(addr) (0)
#endif
include/asm-arm/arch-epxa10db/memory.h
View file @ c5ac1f1c
......@@ -38,8 +38,6 @@
#define PAGE_OFFSET (0xc0000000UL)
#define PHYS_OFFSET (0x00000000UL)
#define PHYS_TO_NID(addr) (0)
/*
* On epxa10, the dram is contiguous
*/
......
include/asm-arm/arch-integrator/keyboard.h deleted 100644 → 0
View file @ 1673f3b4
/*
* linux/include/asm-arm/arch-integrator/keyboard.h
*
* Copyright (C) 2000-2001 Deep Blue Solutions Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* Keyboard driver definitions for the Integrator architecture
* Now using the input subsystem...
*/
#define kbd_init_hw() do { } while (0)
include/asm-arm/arch-integrator/memory.h
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