Commit c60f9e29 authored by Vignesh R's avatar Vignesh R Committed by Tony Lindgren

ARM: dts: DRA7: Add TBCLK for PWMSS

tbclk is used by ehrpwm to generate PWM waveform on DRA7 SoC. Add Linux
clock to control ehrpwm tbclk.
The TRM says, tbclk is derived from SYSCLKOUT. SYSCLKOUT is nothing but
ehrpwm functional clock derived from the gateable interface and
functional clock of PWMSS(l4_root_clk_div).
Refer AM57x TRM SPRUHZ6[1], October 2014, Table 29-4 and Section 29.2.2.1,
Table 29-19 and the NOTE at the end of the table.

[1] www.ti.com/lit/ug/spruhz6/spruhz6.pdf
Signed-off-by: default avatarVignesh R <vigneshr@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent dae320ec
...@@ -2146,4 +2146,28 @@ dss_deshdcp_clk: dss_deshdcp_clk { ...@@ -2146,4 +2146,28 @@ dss_deshdcp_clk: dss_deshdcp_clk {
ti,bit-shift = <0>; ti,bit-shift = <0>;
reg = <0x558>; reg = <0x558>;
}; };
ehrpwm0_tbclk: ehrpwm0_tbclk {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clocks = <&l4_root_clk_div>;
ti,bit-shift = <20>;
reg = <0x0558>;
};
ehrpwm1_tbclk: ehrpwm1_tbclk {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clocks = <&l4_root_clk_div>;
ti,bit-shift = <21>;
reg = <0x0558>;
};
ehrpwm2_tbclk: ehrpwm2_tbclk {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clocks = <&l4_root_clk_div>;
ti,bit-shift = <22>;
reg = <0x0558>;
};
}; };
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