Commit c67d9ce1 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'boards-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next

Pull ARM SoC board support updates from Olof Johansson:
 "The bulk of this branch is updates for Renesas Shmobile.  They are
  still doing some enablement for classic boards first, and then come up
  with DT bindings when they've had a chance to learn more about the
  hardware.  Not necessarily a bad way to go about it, and they're
  looking at moving some of the temporary board code resulting from it
  to drivers/staging instead to avoid the churn here.

  As a result of the shmobile clock cleanups, we end up merging quite a
  bit of SH code here as well.  We ended up merging it here instead of
  in the cleanup branch due to the other board changes depending on it"

* tag 'boards-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (130 commits)
  ARM: davinci: remove checks for CONFIG_USB_MUSB_PERIPHERAL
  ARM: add drivers for Colibri T30 to multi_v7_defconfig
  ARM: shmobile: Remove Genmai reference DTS
  ARM: shmobile: Let Genmai multiplatform boot with Genmai DTB
  ARM: shmobile: Sync Genmai DTS with Genmai reference DTS
  ARM: shmobile: genmai-reference: Remove legacy clock support
  ARM: shmobile: Remove non-multiplatform Genmai reference support
  ARM: configs: enable XHCI mvebu support in multi_v7_defconfig
  ARM: OMAP: replace checks for CONFIG_USB_GADGET_OMAP
  ARM: OMAP: AM3517EVM: remove check for CONFIG_PANEL_SHARP_LQ043T1DG01
  ARM: OMAP: SX1: remove check for CONFIG_SX1_OLD_FLASH
  ARM: OMAP: remove some dead code
  ARM: OMAP: omap3stalker: remove two Kconfig macros
  ARM: tegra: tegra_defconfig updates
  ARM: shmobile: r7s72100: use workaround for non DT-clocks
  ARM: shmobile: Add forward declaration of struct clk to silence warning
  ARM: shmobile: r7s72100: remove SPI DT clocks from legacy clock support
  ARM: shmobile: r7s72100: add spi clocks to dtsi
  ARM: shmobile: r7s72100: remove I2C DT clocks from legacy clock support
  ARM: shmobile: r7s72100: add i2c clocks to dtsi
  ...
parents 825f4e02 03a2ec64
......@@ -10,6 +10,7 @@ index in the group, from 0 to 31.
Required Properties:
- compatible: Must be one of the following
- "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks
- "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
- "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
- "renesas,cpg-mstp-clock" for generic MSTP gate clocks
......
......@@ -303,7 +303,6 @@ dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \
s3c6410-smdk6410.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += r7s72100-genmai.dtb \
r7s72100-genmai-reference.dtb \
r8a7740-armadillo800eva.dtb \
r8a7778-bockw.dtb \
r8a7778-bockw-reference.dtb \
......@@ -318,7 +317,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += r7s72100-genmai.dtb \
r8a73a4-ape6evm-reference.dtb \
sh7372-mackerel.dtb
dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
r7s72100-genmai-reference.dtb \
r7s72100-genmai.dtb \
r8a7791-koelsch.dtb \
r8a7790-lager.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \
......
/*
* Device Tree Source for the Genmai board
*
* Copyright (C) 2013 Renesas Solutions Corp.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
#include "r7s72100.dtsi"
/ {
model = "Genmai";
compatible = "renesas,genmai-reference", "renesas,r7s72100";
chosen {
bootargs = "console=ttySC2,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
};
memory {
device_type = "memory";
reg = <0x08000000 0x08000000>;
};
lbsc {
#address-cells = <1>;
#size-cells = <1>;
};
};
&i2c2 {
status = "okay";
clock-frequency = <400000>;
eeprom@50 {
compatible = "renesas,24c128";
reg = <0x50>;
pagesize = <64>;
};
};
/*
* Device Tree Source for the Genmai board
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013-14 Renesas Solutions Corp.
* Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
......@@ -15,6 +16,10 @@ / {
model = "Genmai";
compatible = "renesas,genmai", "renesas,r7s72100";
aliases {
serial2 = &scif2;
};
chosen {
bootargs = "console=ttySC2,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
};
......@@ -29,3 +34,26 @@ lbsc {
#size-cells = <1>;
};
};
&extal_clk {
clock-frequency = <13330000>;
};
&usb_x1_clk {
clock-frequency = <48000000>;
};
&i2c2 {
status = "okay";
clock-frequency = <400000>;
eeprom@50 {
compatible = "renesas,24c128";
reg = <0x50>;
pagesize = <64>;
};
};
&scif2 {
status = "okay";
};
/*
* Device Tree Source for the r7s72100 SoC
*
* Copyright (C) 2013 Renesas Solutions Corp.
* Copyright (C) 2013-14 Renesas Solutions Corp.
* Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#include <dt-bindings/clock/r7s72100-clock.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
......@@ -28,6 +30,112 @@ aliases {
spi4 = &spi4;
};
clocks {
ranges;
#address-cells = <1>;
#size-cells = <1>;
/* External clocks */
extal_clk: extal_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board */
clock-frequency = <0>;
clock-output-names = "extal";
};
usb_x1_clk: usb_x1_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
/* If clk present, value must be set by board */
clock-frequency = <0>;
clock-output-names = "usb_x1";
};
/* Special CPG clocks */
cpg_clocks: cpg_clocks@fcfe0000 {
#clock-cells = <1>;
compatible = "renesas,r7s72100-cpg-clocks",
"renesas,rz-cpg-clocks";
reg = <0xfcfe0000 0x18>;
clocks = <&extal_clk>, <&usb_x1_clk>;
clock-output-names = "pll", "i", "g";
};
/* Fixed factor clocks */
b_clk: b_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R7S72100_CLK_PLL>;
clock-mult = <1>;
clock-div = <3>;
clock-output-names = "b";
};
p1_clk: p1_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R7S72100_CLK_PLL>;
clock-mult = <1>;
clock-div = <6>;
clock-output-names = "p1";
};
p0_clk: p0_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R7S72100_CLK_PLL>;
clock-mult = <1>;
clock-div = <12>;
clock-output-names = "p0";
};
/* MSTP clocks */
mstp3_clks: mstp3_clks@fcfe0420 {
#clock-cells = <1>;
compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0xfcfe0420 4>;
clocks = <&p0_clk>;
clock-indices = <R7S72100_CLK_MTU2>;
clock-output-names = "mtu2";
};
mstp4_clks: mstp4_clks@fcfe0424 {
#clock-cells = <1>;
compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0xfcfe0424 4>;
clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
<&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>;
clock-indices = <
R7S72100_CLK_SCIF0 R7S72100_CLK_SCIF1 R7S72100_CLK_SCIF2 R7S72100_CLK_SCIF3
R7S72100_CLK_SCIF4 R7S72100_CLK_SCIF5 R7S72100_CLK_SCIF6 R7S72100_CLK_SCIF7
>;
clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
};
mstp9_clks: mstp9_clks@fcfe0438 {
#clock-cells = <1>;
compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0xfcfe0438 4>;
clocks = <&p0_clk>, <&p0_clk>, <&p0_clk>, <&p0_clk>;
clock-indices = <
R7S72100_CLK_I2C0 R7S72100_CLK_I2C1 R7S72100_CLK_I2C2 R7S72100_CLK_I2C3
>;
clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3";
};
mstp10_clks: mstp10_clks@fcfe043c {
#clock-cells = <1>;
compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0xfcfe043c 4>;
clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
<&p1_clk>;
clock-indices = <
R7S72100_CLK_SPI0 R7S72100_CLK_SPI1 R7S72100_CLK_SPI2 R7S72100_CLK_SPI3
R7S72100_CLK_SPI4
>;
clock-output-names = "spi0", "spi1", "spi2", "spi3", "spi4";
};
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
......@@ -61,6 +169,7 @@ i2c0: i2c@fcfee000 {
<0 162 IRQ_TYPE_LEVEL_HIGH>,
<0 163 IRQ_TYPE_LEVEL_HIGH>,
<0 164 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
clock-frequency = <100000>;
status = "disabled";
};
......@@ -78,6 +187,7 @@ i2c1: i2c@fcfee400 {
<0 170 IRQ_TYPE_LEVEL_HIGH>,
<0 171 IRQ_TYPE_LEVEL_HIGH>,
<0 172 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R7S72100_CLK_I2C1>;
clock-frequency = <100000>;
status = "disabled";
};
......@@ -95,6 +205,7 @@ i2c2: i2c@fcfee800 {
<0 178 IRQ_TYPE_LEVEL_HIGH>,
<0 179 IRQ_TYPE_LEVEL_HIGH>,
<0 180 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R7S72100_CLK_I2C2>;
clock-frequency = <100000>;
status = "disabled";
};
......@@ -112,10 +223,107 @@ i2c3: i2c@fcfeec00 {
<0 186 IRQ_TYPE_LEVEL_HIGH>,
<0 187 IRQ_TYPE_LEVEL_HIGH>,
<0 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp9_clks R7S72100_CLK_I2C3>;
clock-frequency = <100000>;
status = "disabled";
};
scif0: serial@e8007000 {
compatible = "renesas,scif-r7s72100", "renesas,scif";
reg = <0xe8007000 64>;
interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>,
<0 191 IRQ_TYPE_LEVEL_HIGH>,
<0 192 IRQ_TYPE_LEVEL_HIGH>,
<0 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
clock-names = "sci_ick";
status = "disabled";
};
scif1: serial@e8007800 {
compatible = "renesas,scif-r7s72100", "renesas,scif";
reg = <0xe8007800 64>;
interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>,
<0 195 IRQ_TYPE_LEVEL_HIGH>,
<0 196 IRQ_TYPE_LEVEL_HIGH>,
<0 193 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
clock-names = "sci_ick";
status = "disabled";
};
scif2: serial@e8008000 {
compatible = "renesas,scif-r7s72100", "renesas,scif";
reg = <0xe8008000 64>;
interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
<0 199 IRQ_TYPE_LEVEL_HIGH>,
<0 200 IRQ_TYPE_LEVEL_HIGH>,
<0 197 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
clock-names = "sci_ick";
status = "disabled";
};
scif3: serial@e8008800 {
compatible = "renesas,scif-r7s72100", "renesas,scif";
reg = <0xe8008800 64>;
interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>,
<0 203 IRQ_TYPE_LEVEL_HIGH>,
<0 204 IRQ_TYPE_LEVEL_HIGH>,
<0 201 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
clock-names = "sci_ick";
status = "disabled";
};
scif4: serial@e8009000 {
compatible = "renesas,scif-r7s72100", "renesas,scif";
reg = <0xe8009000 64>;
interrupts = <0 206 IRQ_TYPE_LEVEL_HIGH>,
<0 207 IRQ_TYPE_LEVEL_HIGH>,
<0 208 IRQ_TYPE_LEVEL_HIGH>,
<0 205 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
clock-names = "sci_ick";
status = "disabled";
};
scif5: serial@e8009800 {
compatible = "renesas,scif-r7s72100", "renesas,scif";
reg = <0xe8009800 64>;
interrupts = <0 210 IRQ_TYPE_LEVEL_HIGH>,
<0 211 IRQ_TYPE_LEVEL_HIGH>,
<0 212 IRQ_TYPE_LEVEL_HIGH>,
<0 209 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
clock-names = "sci_ick";
status = "disabled";
};
scif6: serial@e800a000 {
compatible = "renesas,scif-r7s72100", "renesas,scif";
reg = <0xe800a000 64>;
interrupts = <0 214 IRQ_TYPE_LEVEL_HIGH>,
<0 215 IRQ_TYPE_LEVEL_HIGH>,
<0 216 IRQ_TYPE_LEVEL_HIGH>,
<0 213 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
clock-names = "sci_ick";
status = "disabled";
};
scif7: serial@e800a800 {
compatible = "renesas,scif-r7s72100", "renesas,scif";
reg = <0xe800a800 64>;
interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>,
<0 219 IRQ_TYPE_LEVEL_HIGH>,
<0 220 IRQ_TYPE_LEVEL_HIGH>,
<0 217 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
clock-names = "sci_ick";
status = "disabled";
};
spi0: spi@e800c800 {
compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
reg = <0xe800c800 0x24>;
......@@ -123,6 +331,7 @@ spi0: spi@e800c800 {
<0 239 IRQ_TYPE_LEVEL_HIGH>,
<0 240 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error", "rx", "tx";
clocks = <&mstp10_clks R7S72100_CLK_SPI0>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -136,6 +345,7 @@ spi1: spi@e800d000 {
<0 242 IRQ_TYPE_LEVEL_HIGH>,
<0 243 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error", "rx", "tx";
clocks = <&mstp10_clks R7S72100_CLK_SPI1>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -149,6 +359,7 @@ spi2: spi@e800d800 {
<0 245 IRQ_TYPE_LEVEL_HIGH>,
<0 246 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error", "rx", "tx";
clocks = <&mstp10_clks R7S72100_CLK_SPI2>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -162,6 +373,7 @@ spi3: spi@e800e000 {
<0 248 IRQ_TYPE_LEVEL_HIGH>,
<0 249 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error", "rx", "tx";
clocks = <&mstp10_clks R7S72100_CLK_SPI3>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
......@@ -175,6 +387,7 @@ spi4: spi@e800e800 {
<0 251 IRQ_TYPE_LEVEL_HIGH>,
<0 252 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error", "rx", "tx";
clocks = <&mstp10_clks R7S72100_CLK_SPI4>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
......
......@@ -17,6 +17,11 @@ / {
model = "Lager";
compatible = "renesas,lager", "renesas,r8a7790";
aliases {
serial6 = &scif0;
serial7 = &scif1;
};
chosen {
bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
};
......@@ -112,7 +117,7 @@ &extal_clk {
};
&pfc {
pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
du_pins: du {
......@@ -221,6 +226,20 @@ partition@440000 {
};
};
&scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
status = "okay";
};
&scif1 {
pinctrl-0 = <&scif1_pins>;
pinctrl-names = "default";
status = "okay";
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
......
......@@ -18,6 +18,11 @@ / {
model = "Koelsch";
compatible = "renesas,koelsch", "renesas,r8a7791";
aliases {
serial6 = &scif0;
serial7 = &scif1;
};
chosen {
bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
};
......@@ -196,7 +201,7 @@ eeprom@50 {
};
&pfc {
pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
i2c2_pins: i2c {
......@@ -269,6 +274,20 @@ &sata0 {
status = "okay";
};
&scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
status = "okay";
};
&scif1 {
pinctrl-0 = <&scif1_pins>;
pinctrl-names = "default";
status = "okay";
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
......
......@@ -160,7 +160,6 @@ CONFIG_USB=m
CONFIG_USB_DEVICEFS=y
CONFIG_USB_MON=m
CONFIG_USB_MUSB_HDRC=m
CONFIG_USB_MUSB_PERIPHERAL=y
CONFIG_USB_GADGET_MUSB_HDRC=y
CONFIG_MUSB_PIO_ONLY=y
CONFIG_USB_STORAGE=m
......
......@@ -37,7 +37,6 @@ CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_JEDECPROBE=y
......@@ -48,6 +47,7 @@ CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_SPI_NOR=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=1
......
......@@ -61,6 +61,7 @@ CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ORION=y
CONFIG_MTD_SPI_NOR=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_EEPROM_AT24=y
# CONFIG_SCSI_PROC_FS is not set
......
......@@ -11,7 +11,6 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_MVEBU=y
CONFIG_MACH_KIRKWOOD=y
CONFIG_MACH_T5325=y
CONFIG_ARCH_MXC=y
CONFIG_MACH_IMX25_DT=y
CONFIG_MACH_IMX27_DT=y
......@@ -108,6 +107,8 @@ CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_KIRKWOOD_SOC=y
CONFIG_SND_KIRKWOOD_SOC_T5325=y
CONFIG_SND_SOC_ALC5623=y
CONFIG_SND_SIMPLE_CARD=y
# CONFIG_ABX500_CORE is not set
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
......
......@@ -20,6 +20,7 @@ CONFIG_ARCH_BCM_MOBILE=y
CONFIG_ARCH_BERLIN=y
CONFIG_MACH_BERLIN_BG2=y
CONFIG_MACH_BERLIN_BG2CD=y
CONFIG_MACH_BERLIN_BG2Q=y
CONFIG_GPIO_PCA953X=y
CONFIG_ARCH_HIGHBANK=y
CONFIG_ARCH_HI3xxx=y
......@@ -96,6 +97,11 @@ CONFIG_INET6_IPCOMP=m
CONFIG_IPV6_MIP6=m
CONFIG_IPV6_TUNNEL=m
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_CAN=y
CONFIG_CAN_RAW=y
CONFIG_CAN_BCM=y
CONFIG_CAN_DEV=y
CONFIG_CAN_MCP251X=y
CONFIG_CFG80211=m
CONFIG_MAC80211=m
CONFIG_RFKILL=y
......@@ -112,6 +118,7 @@ CONFIG_BLK_DEV_LOOP=y
CONFIG_ICS932S401=y
CONFIG_APDS9802ALS=y
CONFIG_ISL29003=y
CONFIG_EEPROM_AT24=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=y
CONFIG_SCSI_MULTI_LUN=y
......@@ -191,6 +198,7 @@ CONFIG_PINCTRL_AS3722=y
CONFIG_PINCTRL_PALMAS=y
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GPIO_DWAPB=y
CONFIG_GPIO_PCA953X_IRQ=y
CONFIG_GPIO_TWL4030=y
CONFIG_GPIO_PALMAS=y
......@@ -254,6 +262,7 @@ CONFIG_SND_SOC_TEGRA_ALC5632=y
CONFIG_SND_SOC_TEGRA_MAX98090=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_MVEBU=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_TEGRA=y
CONFIG_USB_EHCI_HCD_PLATFORM=y
......@@ -273,6 +282,7 @@ CONFIG_MMC_BLOCK_MINORS=16
CONFIG_MMC_ARMMMCI=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ESDHC_IMX=y
CONFIG_MMC_SDHCI_PXAV3=y
CONFIG_MMC_SDHCI_TEGRA=y
CONFIG_MMC_SDHCI_DOVE=y
CONFIG_MMC_SDHCI_SPEAR=y
......@@ -286,6 +296,7 @@ CONFIG_EDAC_HIGHBANK_MC=y
CONFIG_EDAC_HIGHBANK_L2=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AS3722=y
CONFIG_RTC_DRV_DS1307=y
CONFIG_RTC_DRV_MAX8907=y
CONFIG_RTC_DRV_PALMAS=y
CONFIG_RTC_DRV_TWL4030=y
......
CONFIG_SYSVIPC=y
CONFIG_FHANDLE=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=19
......@@ -11,7 +12,6 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_MVEBU=y
CONFIG_MACH_KIRKWOOD=y
CONFIG_MACH_T5325=y
# CONFIG_CPU_FEROCEON_OLD_ID is not set
CONFIG_PCI_MVEBU=y
CONFIG_PREEMPT=y
......@@ -50,6 +50,7 @@ CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ORION=y
CONFIG_MTD_SPI_NOR=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_EEPROM_AT24=y
# CONFIG_SCSI_PROC_FS is not set
......@@ -100,6 +101,8 @@ CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_KIRKWOOD_SOC=y
CONFIG_SND_KIRKWOOD_SOC_T5325=y
CONFIG_SND_SOC_ALC5623=y
CONFIG_SND_SIMPLE_CARD=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_HID_DRAGONRISE=y
......
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_FHANDLE=y
CONFIG_IRQ_DOMAIN_DEBUG=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=14
......@@ -29,6 +30,9 @@ CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_VFP=y
CONFIG_NET=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_BT=y
CONFIG_BT_MRVL=y
CONFIG_BT_MRVL_SDIO=y
......@@ -36,6 +40,7 @@ CONFIG_CFG80211=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y
CONFIG_AHCI_MVEBU=y
CONFIG_SATA_MV=y
CONFIG_NETDEVICES=y
CONFIG_MVNETA=y
......@@ -53,6 +58,7 @@ CONFIG_I2C_MV64XXX=y
CONFIG_MTD=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_AMDSTD=y
......@@ -79,6 +85,7 @@ CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_STORAGE=y
CONFIG_USB_XHCI_HCD=y
CONFIG_MMC=y
CONFIG_MMC_SDHCI_PXAV3=y
CONFIG_MMC_MVSDIO=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_GPIO=y
......@@ -103,6 +110,8 @@ CONFIG_UDF_FS=m
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
......
......@@ -25,6 +25,7 @@ CONFIG_SCHED_MC=y
CONFIG_HAVE_ARM_ARCH_TIMER=y
CONFIG_NR_CPUS=8
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
......@@ -43,6 +44,7 @@ CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_M25P80=y
CONFIG_EEPROM_AT24=y
CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y
CONFIG_SATA_RCAR=y
......@@ -75,9 +77,11 @@ CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=20
CONFIG_SERIAL_SH_SCI_CONSOLE=y
CONFIG_I2C_GPIO=y
CONFIG_I2C_SH_MOBILE=y
CONFIG_I2C_RCAR=y
CONFIG_SPI=y
CONFIG_SPI_RSPI=y
CONFIG_SPI_SH_MSIOF=y
CONFIG_GPIO_EM=y
CONFIG_GPIO_RCAR=y
# CONFIG_HWMON is not set
......@@ -88,10 +92,14 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_V4L2_SUBDEV_API=y
CONFIG_V4L_PLATFORM_DRIVERS=y
CONFIG_SOC_CAMERA=y
CONFIG_SOC_CAMERA_PLATFORM=y
CONFIG_VIDEO_RCAR_VIN=y
CONFIG_V4L_MEM2MEM_DRIVERS=y
CONFIG_VIDEO_RENESAS_VSP1=y
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
CONFIG_VIDEO_ADV7180=y
CONFIG_DRM=y
......@@ -100,7 +108,13 @@ CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SOC=y
CONFIG_SND_SOC_RCAR=y
CONFIG_USB=y
CONFIG_USB_RCAR_GEN2_PHY=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_RENESAS_USBHS=y
CONFIG_USB_GADGET=y
CONFIG_USB_RENESAS_USBHS_UDC=y
CONFIG_MMC=y
CONFIG_MMC_SDHI=y
CONFIG_MMC_SH_MMCIF=y
......
......@@ -62,7 +62,6 @@ CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_COMMON_CLK_DEBUG=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_TMPFS=y
CONFIG_NFS_FS=y
......
......@@ -73,6 +73,11 @@ CONFIG_INET6_IPCOMP=y
CONFIG_IPV6_MIP6=y
CONFIG_IPV6_TUNNEL=y
CONFIG_IPV6_MULTIPLE_TABLES=y
CONFIG_CAN=y
CONFIG_CAN_RAW=y
CONFIG_CAN_BCM=y
CONFIG_CAN_DEV=y
CONFIG_CAN_MCP251X=y
CONFIG_BT=y
CONFIG_BT_RFCOMM=y
CONFIG_BT_BNEP=y
......@@ -90,6 +95,7 @@ CONFIG_DMA_CMA=y
CONFIG_CMA_SIZE_MBYTES=64
CONFIG_MTD=y
CONFIG_MTD_M25P80=y
CONFIG_MTD_SPI_NOR=y
CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_AD525X_DPOT=y
......@@ -97,6 +103,7 @@ CONFIG_AD525X_DPOT_I2C=y
CONFIG_ICS932S401=y
CONFIG_APDS9802ALS=y
CONFIG_ISL29003=y
CONFIG_EEPROM_AT24=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=y
......@@ -112,6 +119,7 @@ CONFIG_USB_NET_SMSC95XX=y
CONFIG_BRCMFMAC=m
CONFIG_RT2X00=y
CONFIG_RT2800USB=m
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
CONFIG_KEYBOARD_TEGRA=y
......@@ -181,6 +189,7 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_BACKLIGHT_GENERIC is not set
CONFIG_BACKLIGHT_PWM=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
CONFIG_LOGO=y
CONFIG_SOUND=y
CONFIG_SND=y
......@@ -222,6 +231,7 @@ CONFIG_LEDS_TRIGGER_TRANSIENT=y
CONFIG_LEDS_TRIGGER_CAMERA=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AS3722=y
CONFIG_RTC_DRV_DS1307=y
CONFIG_RTC_DRV_MAX8907=y
CONFIG_RTC_DRV_PALMAS=y
CONFIG_RTC_DRV_TPS6586X=y
......
......@@ -350,11 +350,7 @@ static struct davinci_mmc_config dm355evm_mmc_config = {
* you have proper Mini-B or Mini-A cables (or Mini-A adapters)
* the ID pin won't need any help.
*/
#ifdef CONFIG_USB_MUSB_PERIPHERAL
#define USB_ID_VALUE 0 /* ID pulled high; *should* float */
#else
#define USB_ID_VALUE 1 /* ID pulled low */
#endif
static struct spi_eeprom at25640a = {
.byte_len = SZ_64K / 8,
......
......@@ -208,11 +208,7 @@ static struct davinci_mmc_config dm355leopard_mmc_config = {
* you have proper Mini-B or Mini-A cables (or Mini-A adapters)
* the ID pin won't need any help.
*/
#ifdef CONFIG_USB_MUSB_PERIPHERAL
#define USB_ID_VALUE 0 /* ID pulled high; *should* float */
#else
#define USB_ID_VALUE 1 /* ID pulled low */
#endif
static struct spi_eeprom at25640a = {
.byte_len = SZ_64K / 8,
......
......@@ -346,7 +346,7 @@ static struct omap_usb_config h2_usb_config __initdata = {
/* usb1 has a Mini-AB port and external isp1301 transceiver */
.otg = 2,
#ifdef CONFIG_USB_GADGET_OMAP
#if IS_ENABLED(CONFIG_USB_OMAP)
.hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
/* .hmc_mode = 21,*/ /* 0:host(off) 1:dev(loopback) 2:host(loopback) */
#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
......
......@@ -366,7 +366,7 @@ static struct omap_usb_config h3_usb_config __initdata = {
/* usb1 has a Mini-AB port and external isp1301 transceiver */
.otg = 2,
#ifdef CONFIG_USB_GADGET_OMAP
#if IS_ENABLED(CONFIG_USB_OMAP)
.hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
/* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
......
......@@ -312,7 +312,7 @@ static struct omap_usb_config h2_usb_config __initdata = {
/* usb1 has a Mini-AB port and external isp1301 transceiver */
.otg = 2,
#ifdef CONFIG_USB_GADGET_OMAP
#if IS_ENABLED(CONFIG_USB_OMAP)
.hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
/* .hmc_mode = 21,*/ /* 0:host(off) 1:dev(loopback) 2:host(loopback) */
#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
......
......@@ -283,7 +283,7 @@ static struct omap_usb_config osk_usb_config __initdata = {
* be used, with a NONSTANDARD gender-bending cable/dongle, as
* a peripheral.
*/
#ifdef CONFIG_USB_GADGET_OMAP
#if IS_ENABLED(CONFIG_USB_OMAP)
.register_dev = 1,
.hmc_mode = 0,
#else
......
......@@ -266,31 +266,6 @@ static struct physmap_flash_data sx1_flash_data = {
.nr_parts = ARRAY_SIZE(sx1_partitions),
};
#ifdef CONFIG_SX1_OLD_FLASH
/* MTD Intel StrataFlash - old flashes */
static struct resource sx1_old_flash_resource[] = {
[0] = {
.start = OMAP_CS0_PHYS, /* Physical */
.end = OMAP_CS0_PHYS + SZ_16M - 1,,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = OMAP_CS1_PHYS,
.end = OMAP_CS1_PHYS + SZ_8M - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device sx1_flash_device = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &sx1_flash_data,
},
.num_resources = 2,
.resource = &sx1_old_flash_resource,
};
#else
/* MTD Intel 4000 flash - new flashes */
static struct resource sx1_new_flash_resource = {
.start = OMAP_CS0_PHYS,
......@@ -307,7 +282,6 @@ static struct platform_device sx1_flash_device = {
.num_resources = 1,
.resource = &sx1_new_flash_resource,
};
#endif
/*----------- USB -------------------------*/
......
......@@ -123,19 +123,8 @@ void omap1_pm_idle(void)
#warning Enable 32kHz OS timer in order to allow sleep states in idle
use_idlect1 = use_idlect1 & ~(1 << 9);
#else
while (enable_dyn_sleep) {
#ifdef CONFIG_CBUS_TAHVO_USB
extern int vbus_active;
/* Clock requirements? */
if (vbus_active)
break;
#endif
if (enable_dyn_sleep)
do_sleep = 1;
break;
}
#endif
#ifdef CONFIG_OMAP_DM_TIMER
......
......@@ -262,12 +262,7 @@ static struct usbhs_phy_data phy_data[] __initdata = {
static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
#if defined(CONFIG_PANEL_SHARP_LQ043T1DG01) || \
defined(CONFIG_PANEL_SHARP_LQ043T1DG01_MODULE)
.port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
#else
.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
#endif
};
#ifdef CONFIG_OMAP_MUX
......
......@@ -121,11 +121,7 @@ static struct platform_device omap3stalker_tfp410_device = {
static struct connector_atv_platform_data omap3stalker_tv_pdata = {
.name = "tv",
.source = "venc.0",
#if defined(CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO)
.connector_type = OMAP_DSS_VENC_TYPE_SVIDEO,
#elif defined(CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE)
.connector_type = OMAP_DSS_VENC_TYPE_COMPOSITE,
#endif
.invert_polarity = false,
};
......
......@@ -226,6 +226,14 @@ static void __init am3517_evm_legacy_init(void)
am35xx_emac_reset();
}
static struct platform_device omap3_rom_rng_device = {
.name = "omap3-rom-rng",
.id = -1,
.dev = {
.platform_data = rx51_secure_rng_call,
},
};
static void __init nokia_n900_legacy_init(void)
{
hsmmc2_internal_input_clk();
......@@ -239,6 +247,10 @@ static void __init nokia_n900_legacy_init(void)
pr_warning("RX-51: Not enabling ARM errata 430973 workaround\n");
pr_warning("Thumb binaries may crash randomly without this workaround\n");
}
pr_info("RX-51: Registring OMAP3 HWRNG device\n");
platform_device_register(&omap3_rom_rng_device);
}
}
#endif /* CONFIG_ARCH_OMAP3 */
......
......@@ -228,17 +228,6 @@ config MACH_GENMAI
depends on ARCH_R7S72100
select USE_OF
config MACH_GENMAI_REFERENCE
bool "Genmai board - Reference Device Tree Implementation"
depends on ARCH_R7S72100
select USE_OF
---help---
Use reference implementation of Genmai board support
which makes use of device tree at the expense
of not supporting a number of devices.
This is intended to aid developers
config MACH_MARZEN
bool "MARZEN board"
depends on ARCH_R8A7779
......
......@@ -66,7 +66,6 @@ obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o
obj-$(CONFIG_MACH_GENMAI) += board-genmai.o
obj-$(CONFIG_MACH_GENMAI_REFERENCE) += board-genmai-reference.o
obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o
obj-$(CONFIG_MACH_LAGER) += board-lager.o
......
......@@ -7,7 +7,6 @@ loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000
loadaddr-$(CONFIG_MACH_GENMAI) += 0x08008000
loadaddr-$(CONFIG_MACH_GENMAI_REFERENCE) += 0x08008000
loadaddr-$(CONFIG_MACH_KOELSCH) += 0x40008000
loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000
......
......@@ -1300,11 +1300,6 @@ static void __init eva_earlytimer_init(void)
eva_clock_init();
}
static void __init eva_add_early_devices(void)
{
r8a7740_add_early_devices();
}
#define RESCNT2 IOMEM(0xe6188020)
static void eva_restart(enum reboot_mode mode, const char *cmd)
{
......@@ -1319,7 +1314,7 @@ static const char *eva_boards_compat_dt[] __initdata = {
DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
.map_io = r8a7740_map_io,
.init_early = eva_add_early_devices,
.init_early = r8a7740_add_early_devices,
.init_irq = r8a7740_init_irq_of,
.init_machine = eva_init,
.init_late = shmobile_init_late,
......
......@@ -345,24 +345,39 @@ static struct rsnd_ssi_platform_info rsnd_ssi[] = {
RSND_SSI_UNUSED, /* SSI 0 */
RSND_SSI_UNUSED, /* SSI 1 */
RSND_SSI_UNUSED, /* SSI 2 */
RSND_SSI_SET(1, HPBDMA_SLAVE_HPBIF3_TX, gic_iid(0x85), RSND_SSI_PLAY),
RSND_SSI_SET(2, HPBDMA_SLAVE_HPBIF4_RX, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE),
RSND_SSI_SET(0, HPBDMA_SLAVE_HPBIF5_TX, gic_iid(0x86), RSND_SSI_PLAY),
RSND_SSI_SET(0, HPBDMA_SLAVE_HPBIF6_RX, gic_iid(0x86), 0),
RSND_SSI_SET(3, HPBDMA_SLAVE_HPBIF7_TX, gic_iid(0x86), RSND_SSI_PLAY),
RSND_SSI_SET(4, HPBDMA_SLAVE_HPBIF8_RX, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE),
RSND_SSI(HPBDMA_SLAVE_HPBIF3_TX, gic_iid(0x85), 0),
RSND_SSI(HPBDMA_SLAVE_HPBIF4_RX, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE),
RSND_SSI(HPBDMA_SLAVE_HPBIF5_TX, gic_iid(0x86), 0),
RSND_SSI(HPBDMA_SLAVE_HPBIF6_RX, gic_iid(0x86), 0),
RSND_SSI(HPBDMA_SLAVE_HPBIF7_TX, gic_iid(0x86), 0),
RSND_SSI(HPBDMA_SLAVE_HPBIF8_RX, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE),
};
static struct rsnd_scu_platform_info rsnd_scu[9] = {
{ .flags = 0, }, /* SRU 0 */
{ .flags = 0, }, /* SRU 1 */
{ .flags = 0, }, /* SRU 2 */
{ .flags = RSND_SCU_USE_HPBIF, },
{ .flags = RSND_SCU_USE_HPBIF, },
{ .flags = RSND_SCU_USE_HPBIF, },
{ .flags = RSND_SCU_USE_HPBIF, },
{ .flags = RSND_SCU_USE_HPBIF, },
{ .flags = RSND_SCU_USE_HPBIF, },
static struct rsnd_src_platform_info rsnd_src[9] = {
RSND_SRC_UNUSED, /* SRU 0 */
RSND_SRC_UNUSED, /* SRU 1 */
RSND_SRC_UNUSED, /* SRU 2 */
RSND_SRC(0, 0),
RSND_SRC(0, 0),
RSND_SRC(0, 0),
RSND_SRC(0, 0),
RSND_SRC(0, 0),
RSND_SRC(0, 0),
};
static struct rsnd_dai_platform_info rsnd_dai[] = {
{
.playback = { .ssi = &rsnd_ssi[5], .src = &rsnd_src[5] },
.capture = { .ssi = &rsnd_ssi[6], .src = &rsnd_src[6] },
}, {
.playback = { .ssi = &rsnd_ssi[3], .src = &rsnd_src[3] },
}, {
.capture = { .ssi = &rsnd_ssi[4], .src = &rsnd_src[4] },
}, {
.playback = { .ssi = &rsnd_ssi[7], .src = &rsnd_src[7] },
}, {
.capture = { .ssi = &rsnd_ssi[8], .src = &rsnd_src[8] },
},
};
enum {
......@@ -437,8 +452,10 @@ static struct rcar_snd_info rsnd_info = {
.flags = RSND_GEN1,
.ssi_info = rsnd_ssi,
.ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
.scu_info = rsnd_scu,
.scu_info_nr = ARRAY_SIZE(rsnd_scu),
.src_info = rsnd_src,
.src_info_nr = ARRAY_SIZE(rsnd_src),
.dai_info = rsnd_dai,
.dai_info_nr = ARRAY_SIZE(rsnd_dai),
.start = rsnd_start,
.stop = rsnd_stop,
};
......@@ -591,6 +608,7 @@ static void __init bockw_init(void)
{
void __iomem *base;
struct clk *clk;
struct platform_device *pdev;
int i;
r8a7778_clock_init();
......@@ -673,9 +691,6 @@ static void __init bockw_init(void)
}
/* for Audio */
clk = clk_get(NULL, "audio_clk_b");
clk_set_rate(clk, 24576000);
clk_put(clk);
rsnd_codec_power(5, 1); /* enable ak4642 */
platform_device_register_simple(
......@@ -684,11 +699,15 @@ static void __init bockw_init(void)
platform_device_register_simple(
"ak4554-adc-dac", 1, NULL, 0);
platform_device_register_resndata(
pdev = platform_device_register_resndata(
&platform_bus, "rcar_sound", -1,
rsnd_resources, ARRAY_SIZE(rsnd_resources),
&rsnd_info, sizeof(rsnd_info));
clk = clk_get(&pdev->dev, "clk_b");
clk_set_rate(clk, 24576000);
clk_put(clk);
for (i = 0; i < ARRAY_SIZE(rsnd_card_info); i++) {
struct platform_device_info cardinfo = {
.parent = &platform_bus,
......
......@@ -18,27 +18,31 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/clk-provider.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <mach/clock.h>
#include <mach/common.h>
#include <mach/r7s72100.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
/*
* This is a really crude hack to provide clkdev support to platform
* devices until they get moved to DT.
*/
static const struct clk_name clk_names[] = {
{ "mtu2", "fck", "sh-mtu2" },
};
static void __init genmai_add_standard_devices(void)
{
#ifdef CONFIG_COMMON_CLK
of_clk_init(NULL);
#else
r7s72100_clock_init();
#endif
shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), true);
r7s72100_add_dt_devices();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char * const genmai_boards_compat_dt[] __initconst = {
"renesas,genmai-reference",
"renesas,genmai",
NULL,
};
......
......@@ -21,6 +21,7 @@
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/serial_sci.h>
#include <linux/sh_eth.h>
#include <linux/spi/rspi.h>
#include <linux/spi/spi.h>
......@@ -89,6 +90,40 @@ static const struct spi_board_info spi_info[] __initconst = {
},
};
/* SCIF */
#define R7S72100_SCIF(index, baseaddr, irq) \
static const struct plat_sci_port scif##index##_platform_data = { \
.type = PORT_SCIF, \
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \
.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \
SCSCR_REIE, \
}; \
\
static struct resource scif##index##_resources[] = { \
DEFINE_RES_MEM(baseaddr, 0x100), \
DEFINE_RES_IRQ(irq + 1), \
DEFINE_RES_IRQ(irq + 2), \
DEFINE_RES_IRQ(irq + 3), \
DEFINE_RES_IRQ(irq), \
} \
R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
#define r7s72100_register_scif(index) \
platform_device_register_resndata(&platform_bus, "sh-sci", index, \
scif##index##_resources, \
ARRAY_SIZE(scif##index##_resources), \
&scif##index##_platform_data, \
sizeof(scif##index##_platform_data))
static void __init genmai_add_standard_devices(void)
{
r7s72100_clock_init();
......@@ -102,6 +137,15 @@ static void __init genmai_add_standard_devices(void)
r7s72100_register_rspi(3);
r7s72100_register_rspi(4);
spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
r7s72100_register_scif(0);
r7s72100_register_scif(1);
r7s72100_register_scif(2);
r7s72100_register_scif(3);
r7s72100_register_scif(4);
r7s72100_register_scif(5);
r7s72100_register_scif(6);
r7s72100_register_scif(7);
}
static const char * const genmai_boards_compat_dt[] __initconst = {
......
......@@ -19,12 +19,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/dma-mapping.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <linux/platform_data/rcar-du.h>
#include <mach/clock.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/rcar-gen2.h>
......@@ -82,49 +81,35 @@ static void __init koelsch_add_du_device(void)
platform_device_register_full(&info);
}
static void __init koelsch_add_standard_devices(void)
{
/*
* This is a really crude hack to provide clkdev support to the CMT and
* DU devices until they get moved to DT.
*/
static const struct clk_name {
const char *clk;
const char *con_id;
const char *dev_id;
} clk_names[] = {
{ "cmt0", NULL, "sh_cmt.0" },
{ "scifa0", NULL, "sh-sci.0" },
{ "scifa1", NULL, "sh-sci.1" },
{ "scifb0", NULL, "sh-sci.2" },
{ "scifb1", NULL, "sh-sci.3" },
{ "scifb2", NULL, "sh-sci.4" },
{ "scifa2", NULL, "sh-sci.5" },
{ "scif0", NULL, "sh-sci.6" },
{ "scif1", NULL, "sh-sci.7" },
{ "scif2", NULL, "sh-sci.8" },
{ "scif3", NULL, "sh-sci.9" },
{ "scif4", NULL, "sh-sci.10" },
{ "scif5", NULL, "sh-sci.11" },
{ "scifa3", NULL, "sh-sci.12" },
{ "scifa4", NULL, "sh-sci.13" },
{ "scifa5", NULL, "sh-sci.14" },
{ "du0", "du.0", "rcar-du-r8a7791" },
{ "du1", "du.1", "rcar-du-r8a7791" },
{ "lvds0", "lvds.0", "rcar-du-r8a7791" },
};
struct clk *clk;
unsigned int i;
/*
* This is a really crude hack to provide clkdev support to platform
* devices until they get moved to DT.
*/
static const struct clk_name clk_names[] __initconst = {
{ "cmt0", "fck", "sh-cmt-48-gen2.0" },
{ "du0", "du.0", "rcar-du-r8a7791" },
{ "du1", "du.1", "rcar-du-r8a7791" },
{ "lvds0", "lvds.0", "rcar-du-r8a7791" },
};
for (i = 0; i < ARRAY_SIZE(clk_names); ++i) {
clk = clk_get(NULL, clk_names[i].clk);
if (!IS_ERR(clk)) {
clk_register_clkdev(clk, clk_names[i].con_id,
clk_names[i].dev_id);
clk_put(clk);
}
}
/*
* This is a really crude hack to work around core platform clock issues
*/
static const struct clk_name clk_enables[] __initconst = {
{ "ether", NULL, "ee700000.ethernet" },
{ "i2c2", NULL, "e6530000.i2c" },
{ "msiof0", NULL, "e6e20000.spi" },
{ "qspi_mod", NULL, "e6b10000.spi" },
{ "sdhi0", NULL, "ee100000.sd" },
{ "sdhi1", NULL, "ee140000.sd" },
{ "sdhi2", NULL, "ee160000.sd" },
{ "thermal", NULL, "e61f0000.thermal" },
};
static void __init koelsch_add_standard_devices(void)
{
shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
shmobile_clk_workaround(clk_enables, ARRAY_SIZE(clk_enables), true);
r8a7791_add_dt_devices();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
......
......@@ -216,7 +216,7 @@ static const struct spi_board_info spi_info[] __initconst = {
{
.modalias = "m25p80",
.platform_data = &spi_flash_data,
.mode = SPI_MODE_0,
.mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
.max_speed_hz = 30000000,
.bus_num = 0,
.chip_select = 0,
......
......@@ -18,12 +18,11 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/of_platform.h>
#include <linux/platform_data/rcar-du.h>
#include <mach/clock.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/rcar-gen2.h>
......@@ -86,46 +85,36 @@ static void __init lager_add_du_device(void)
platform_device_register_full(&info);
}
static void __init lager_add_standard_devices(void)
{
/*
* This is a really crude hack to provide clkdev support to platform
* devices until they get moved to DT.
*/
static const struct clk_name {
const char *clk;
const char *con_id;
const char *dev_id;
} clk_names[] = {
{ "cmt0", NULL, "sh_cmt.0" },
{ "scifa0", NULL, "sh-sci.0" },
{ "scifa1", NULL, "sh-sci.1" },
{ "scifb0", NULL, "sh-sci.2" },
{ "scifb1", NULL, "sh-sci.3" },
{ "scifb2", NULL, "sh-sci.4" },
{ "scifa2", NULL, "sh-sci.5" },
{ "scif0", NULL, "sh-sci.6" },
{ "scif1", NULL, "sh-sci.7" },
{ "hscif0", NULL, "sh-sci.8" },
{ "hscif1", NULL, "sh-sci.9" },
{ "du0", "du.0", "rcar-du-r8a7790" },
{ "du1", "du.1", "rcar-du-r8a7790" },
{ "du2", "du.2", "rcar-du-r8a7790" },
{ "lvds0", "lvds.0", "rcar-du-r8a7790" },
{ "lvds1", "lvds.1", "rcar-du-r8a7790" },
};
struct clk *clk;
unsigned int i;
/*
* This is a really crude hack to provide clkdev support to platform
* devices until they get moved to DT.
*/
static const struct clk_name clk_names[] __initconst = {
{ "cmt0", "fck", "sh-cmt-48-gen2.0" },
{ "du0", "du.0", "rcar-du-r8a7790" },
{ "du1", "du.1", "rcar-du-r8a7790" },
{ "du2", "du.2", "rcar-du-r8a7790" },
{ "lvds0", "lvds.0", "rcar-du-r8a7790" },
{ "lvds1", "lvds.1", "rcar-du-r8a7790" },
};
for (i = 0; i < ARRAY_SIZE(clk_names); ++i) {
clk = clk_get(NULL, clk_names[i].clk);
if (!IS_ERR(clk)) {
clk_register_clkdev(clk, clk_names[i].con_id,
clk_names[i].dev_id);
clk_put(clk);
}
}
/*
* This is a really crude hack to work around core platform clock issues
*/
static const struct clk_name clk_enables[] __initconst = {
{ "ether", NULL, "ee700000.ethernet" },
{ "msiof1", NULL, "e6e10000.spi" },
{ "mmcif1", NULL, "ee220000.mmc" },
{ "qspi_mod", NULL, "e6b10000.spi" },
{ "sdhi0", NULL, "ee100000.sd" },
{ "sdhi2", NULL, "ee140000.sd" },
{ "thermal", NULL, "e61f0000.thermal" },
};
static void __init lager_add_standard_devices(void)
{
shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), false);
shmobile_clk_workaround(clk_enables, ARRAY_SIZE(clk_enables), true);
r8a7790_add_dt_devices();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
......
......@@ -325,12 +325,12 @@ static const struct rspi_plat_data qspi_pdata __initconst = {
static const struct spi_board_info spi_info[] __initconst = {
{
.modalias = "m25p80",
.platform_data = &spi_flash_data,
.mode = SPI_MODE_0,
.max_speed_hz = 30000000,
.bus_num = 0,
.chip_select = 0,
.modalias = "m25p80",
.platform_data = &spi_flash_data,
.mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
.max_speed_hz = 30000000,
.bus_num = 0,
.chip_select = 0,
},
};
......@@ -567,20 +567,27 @@ static struct resource rsnd_resources[] __initdata = {
};
static struct rsnd_ssi_platform_info rsnd_ssi[] = {
RSND_SSI_SET(0, 0, gic_spi(370), RSND_SSI_PLAY),
RSND_SSI_SET(0, 0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
RSND_SSI(0, gic_spi(370), 0),
RSND_SSI(0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
};
static struct rsnd_scu_platform_info rsnd_scu[2] = {
static struct rsnd_src_platform_info rsnd_src[2] = {
/* no member at this point */
};
static struct rsnd_dai_platform_info rsnd_dai = {
.playback = { .ssi = &rsnd_ssi[0], },
.capture = { .ssi = &rsnd_ssi[1], },
};
static struct rcar_snd_info rsnd_info = {
.flags = RSND_GEN2,
.ssi_info = rsnd_ssi,
.ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
.scu_info = rsnd_scu,
.scu_info_nr = ARRAY_SIZE(rsnd_scu),
.src_info = rsnd_src,
.src_info_nr = ARRAY_SIZE(rsnd_src),
.dai_info = &rsnd_dai,
.dai_info_nr = 1,
};
static struct asoc_simple_card_info rsnd_card_info = {
......
......@@ -194,17 +194,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
CLKDEV_DEV_ID("e800c800.spi", &mstp_clks[MSTP107]),
CLKDEV_DEV_ID("e800d000.spi", &mstp_clks[MSTP106]),
CLKDEV_DEV_ID("e800d800.spi", &mstp_clks[MSTP105]),
CLKDEV_DEV_ID("e800e000.spi", &mstp_clks[MSTP104]),
CLKDEV_DEV_ID("e800e800.spi", &mstp_clks[MSTP103]),
CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]),
CLKDEV_DEV_ID("r7s72100-ether", &mstp_clks[MSTP74]),
CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP33]),
/* ICK */
CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP47]),
......@@ -215,6 +205,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),
CLKDEV_ICK_ID("fck", "sh-mtu2", &mstp_clks[MSTP33]),
};
void __init r7s72100_clock_init(void)
......
......@@ -597,7 +597,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("e6560000.i2c", &mstp_clks[MSTP317]),
CLKDEV_DEV_ID("e6500000.i2c", &mstp_clks[MSTP318]),
CLKDEV_DEV_ID("e6510000.i2c", &mstp_clks[MSTP323]),
CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]),
CLKDEV_ICK_ID("fck", "sh-cmt-48-gen2.1", &mstp_clks[MSTP329]),
CLKDEV_DEV_ID("e60b0000.i2c", &mstp_clks[MSTP409]),
CLKDEV_DEV_ID("e6540000.i2c", &mstp_clks[MSTP410]),
CLKDEV_DEV_ID("e6530000.i2c", &mstp_clks[MSTP411]),
......
......@@ -548,15 +548,9 @@ static struct clk_lookup lookups[] = {
/* MSTP32 clocks */
CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]),
CLKDEV_DEV_ID("sh_tmu.3", &mstp_clks[MSTP111]),
CLKDEV_DEV_ID("sh_tmu.4", &mstp_clks[MSTP111]),
CLKDEV_DEV_ID("sh_tmu.5", &mstp_clks[MSTP111]),
CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]),
CLKDEV_DEV_ID("fff20000.i2c", &mstp_clks[MSTP116]),
CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]),
CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]),
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]),
CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP125]),
CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]),
CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP128]),
......@@ -583,7 +577,6 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP230]),
CLKDEV_DEV_ID("e6cc0000.sci", &mstp_clks[MSTP230]),
CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]),
CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]),
CLKDEV_DEV_ID("fe1f0000.sound", &mstp_clks[MSTP328]),
CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]),
......@@ -604,6 +597,9 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("e6870000.sd", &mstp_clks[MSTP415]),
/* ICK */
CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP111]),
CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP125]),
CLKDEV_ICK_ID("fck", "sh-cmt-48.1", &mstp_clks[MSTP329]),
CLKDEV_ICK_ID("host", "renesas_usbhs", &mstp_clks[MSTP416]),
CLKDEV_ICK_ID("func", "renesas_usbhs", &mstp_clks[MSTP407]),
CLKDEV_ICK_ID("phy", "renesas_usbhs", &mstp_clks[MSTP406]),
......
......@@ -207,8 +207,6 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */
CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP015]), /* TMU01 */
CLKDEV_DEV_ID("sh-hspi.0", &mstp_clks[MSTP007]), /* HSPI0 */
CLKDEV_DEV_ID("fffc7000.spi", &mstp_clks[MSTP007]), /* HSPI0 */
CLKDEV_DEV_ID("sh-hspi.1", &mstp_clks[MSTP007]), /* HSPI1 */
......@@ -239,6 +237,8 @@ static struct clk_lookup lookups[] = {
CLKDEV_ICK_ID("src.6", "rcar_sound", &mstp_clks[MSTP525]),
CLKDEV_ICK_ID("src.7", "rcar_sound", &mstp_clks[MSTP524]),
CLKDEV_ICK_ID("src.8", "rcar_sound", &mstp_clks[MSTP523]),
CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP016]),
CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP015]),
};
void __init r8a7778_clock_init(void)
......
......@@ -173,9 +173,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("ohci-platform.1", &mstp_clks[MSTP101]), /* USB OHCI port2 */
CLKDEV_DEV_ID("ehci-platform.0", &mstp_clks[MSTP100]), /* USB EHCI port0/1 */
CLKDEV_DEV_ID("ohci-platform.0", &mstp_clks[MSTP100]), /* USB OHCI port0/1 */
CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */
CLKDEV_DEV_ID("sh_tmu.2", &mstp_clks[MSTP016]), /* TMU02 */
CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP016]), /* TMU0 */
CLKDEV_DEV_ID("i2c-rcar.0", &mstp_clks[MSTP030]), /* I2C0 */
CLKDEV_DEV_ID("ffc70000.i2c", &mstp_clks[MSTP030]), /* I2C0 */
CLKDEV_DEV_ID("i2c-rcar.1", &mstp_clks[MSTP029]), /* I2C1 */
......
......@@ -357,7 +357,6 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]),
CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]),
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]),
CLKDEV_DEV_ID("pci-rcar-gen2.0", &mstp_clks[MSTP703]),
......@@ -367,6 +366,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sata-r8a7790.1", &mstp_clks[MSTP814]),
/* ICK */
CLKDEV_ICK_ID("fck", "sh-cmt-48-gen2.0", &mstp_clks[MSTP124]),
CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]),
CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]),
CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]),
......
......@@ -264,7 +264,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]),
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]),
CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]),
CLKDEV_ICK_ID("fck", "sh-cmt-48-gen2.0", &mstp_clks[MSTP124]),
CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]),
CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]),
CLKDEV_DEV_ID("i2c-rcar_gen2.0", &mstp_clks[MSTP931]),
......
......@@ -515,8 +515,6 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */
CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU */
CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2 */
CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX0 */
CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */
CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
......@@ -565,10 +563,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */
CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */
CLKDEV_DEV_ID("renesas_usbhs.1", &mstp_clks[MSTP406]), /* USB1 */
CLKDEV_DEV_ID("sh_cmt.4", &mstp_clks[MSTP405]), /* CMT4 */
CLKDEV_DEV_ID("sh_cmt.3", &mstp_clks[MSTP404]), /* CMT3 */
CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
CLKDEV_DEV_ID("sh_cmt.2", &mstp_clks[MSTP400]), /* CMT2 */
/* ICK */
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
......@@ -580,7 +575,11 @@ static struct clk_lookup lookups[] = {
CLKDEV_ICK_ID("ick", "sh-mobile-hdmi", &div6_reparent_clks[DIV6_HDMI]),
CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]),
CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]),
CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP125]), /* TMU0 */
CLKDEV_ICK_ID("spu2", "sh_fsi2", &mstp_clks[MSTP223]),
CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.4", &mstp_clks[MSTP405]), /* CMT4 */
CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.3", &mstp_clks[MSTP404]), /* CMT3 */
CLKDEV_ICK_ID("fck", "sh-cmt-32-fast.2", &mstp_clks[MSTP400]), /* CMT2 */
CLKDEV_ICK_ID("diva", "sh_fsi2", &fsidivs[FSIDIV_A]),
CLKDEV_ICK_ID("divb", "sh_fsi2", &fsidivs[FSIDIV_B]),
CLKDEV_ICK_ID("xcka", "sh_fsi2", &fsiack_clk),
......
......@@ -633,8 +633,6 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-mobile-csi2.1", &mstp_clks[MSTP128]), /* CSI2-RX1 */
CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU0 */
CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2-RX0 */
CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
CLKDEV_DEV_ID("e6820000.i2c", &mstp_clks[MSTP116]), /* I2C0 */
......@@ -650,7 +648,6 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */
CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */
CLKDEV_DEV_ID("ec230000.sound", &mstp_clks[MSTP328]), /* FSI */
CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
......@@ -683,6 +680,8 @@ static struct clk_lookup lookups[] = {
CLKDEV_ICK_ID("dsip_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.0", &dsi0phy_clk),
CLKDEV_ICK_ID("dsiphy_clk", "sh-mipi-dsi.1", &dsi1phy_clk),
CLKDEV_ICK_ID("fck", "sh-cmt-48.1", &mstp_clks[MSTP329]), /* CMT1 */
CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP125]), /* TMU0 */
};
void __init sh73a0_clock_init(void)
......
......@@ -16,6 +16,7 @@ void shmobile_clk_workaround(const struct clk_name *clks, int nr_clks,
#else /* CONFIG_COMMON_CLK */
/* legacy clock implementation */
struct clk;
unsigned long shmobile_fixed_ratio_clk_recalc(struct clk *clk);
extern struct sh_clk_ops shmobile_fixed_ratio_clk_ops;
......
......@@ -21,77 +21,26 @@
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/of_platform.h>
#include <linux/serial_sci.h>
#include <linux/sh_timer.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r7s72100.h>
#include <asm/mach/arch.h>
#define R7S72100_SCIF(index, baseaddr, irq) \
static const struct plat_sci_port scif##index##_platform_data = { \
.type = PORT_SCIF, \
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \
.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \
SCSCR_REIE, \
}; \
\
static struct resource scif##index##_resources[] = { \
DEFINE_RES_MEM(baseaddr, 0x100), \
DEFINE_RES_IRQ(irq + 1), \
DEFINE_RES_IRQ(irq + 2), \
DEFINE_RES_IRQ(irq + 3), \
DEFINE_RES_IRQ(irq), \
} \
R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
#define r7s72100_register_scif(index) \
platform_device_register_resndata(&platform_bus, "sh-sci", index, \
scif##index##_resources, \
ARRAY_SIZE(scif##index##_resources), \
&scif##index##_platform_data, \
sizeof(scif##index##_platform_data))
static struct sh_timer_config mtu2_0_platform_data __initdata = {
.name = "MTU2_0",
.timer_bit = 0,
.channel_offset = -0x80,
.clockevent_rating = 200,
};
static struct resource mtu2_0_resources[] __initdata = {
DEFINE_RES_MEM(0xfcff0300, 0x27),
DEFINE_RES_IRQ(gic_iid(139)), /* MTU2 TGI0A */
static struct resource mtu2_resources[] __initdata = {
DEFINE_RES_MEM(0xfcff0000, 0x400),
DEFINE_RES_IRQ_NAMED(gic_iid(139), "tgi0a"),
};
#define r7s72100_register_mtu2(idx) \
platform_device_register_resndata(&platform_bus, "sh_mtu2", \
idx, mtu2_##idx##_resources, \
ARRAY_SIZE(mtu2_##idx##_resources), \
&mtu2_##idx##_platform_data, \
sizeof(struct sh_timer_config))
#define r7s72100_register_mtu2() \
platform_device_register_resndata(&platform_bus, "sh-mtu2", \
-1, mtu2_resources, \
ARRAY_SIZE(mtu2_resources), \
NULL, 0)
void __init r7s72100_add_dt_devices(void)
{
r7s72100_register_scif(0);
r7s72100_register_scif(1);
r7s72100_register_scif(2);
r7s72100_register_scif(3);
r7s72100_register_scif(4);
r7s72100_register_scif(5);
r7s72100_register_scif(6);
r7s72100_register_scif(7);
r7s72100_register_mtu2(0);
r7s72100_register_mtu2();
}
void __init r7s72100_init_early(void)
......
......@@ -169,20 +169,17 @@ static const struct resource thermal0_resources[] = {
thermal0_resources, \
ARRAY_SIZE(thermal0_resources))
static struct sh_timer_config cmt10_platform_data = {
.name = "CMT10",
.timer_bit = 0,
.clockevent_rating = 80,
static struct sh_timer_config cmt1_platform_data = {
.channels_mask = 0xff,
};
static struct resource cmt10_resources[] = {
DEFINE_RES_MEM(0xe6130010, 0x0c),
DEFINE_RES_MEM(0xe6130000, 0x04),
DEFINE_RES_IRQ(gic_spi(120)), /* CMT1_0 */
static struct resource cmt1_resources[] = {
DEFINE_RES_MEM(0xe6130000, 0x1004),
DEFINE_RES_IRQ(gic_spi(120)),
};
#define r8a7790_register_cmt(idx) \
platform_device_register_resndata(&platform_bus, "sh_cmt", \
platform_device_register_resndata(&platform_bus, "sh-cmt-48-gen2", \
idx, cmt##idx##_resources, \
ARRAY_SIZE(cmt##idx##_resources), \
&cmt##idx##_platform_data, \
......@@ -196,7 +193,7 @@ void __init r8a73a4_add_dt_devices(void)
r8a73a4_register_scif(3);
r8a73a4_register_scif(4);
r8a73a4_register_scif(5);
r8a7790_register_cmt(10);
r8a7790_register_cmt(1);
}
/* DMA */
......
......@@ -237,126 +237,45 @@ R8A7740_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(107));
R8A7740_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(108));
/* CMT */
static struct sh_timer_config cmt10_platform_data = {
.name = "CMT10",
.channel_offset = 0x10,
.timer_bit = 0,
.clockevent_rating = 125,
.clocksource_rating = 125,
static struct sh_timer_config cmt1_platform_data = {
.channels_mask = 0x3f,
};
static struct resource cmt10_resources[] = {
[0] = {
.name = "CMT10",
.start = 0xe6138010,
.end = 0xe613801b,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_spi(58),
.flags = IORESOURCE_IRQ,
},
static struct resource cmt1_resources[] = {
DEFINE_RES_MEM(0xe6138000, 0x170),
DEFINE_RES_IRQ(gic_spi(58)),
};
static struct platform_device cmt10_device = {
.name = "sh_cmt",
.id = 10,
static struct platform_device cmt1_device = {
.name = "sh-cmt-48",
.id = 1,
.dev = {
.platform_data = &cmt10_platform_data,
.platform_data = &cmt1_platform_data,
},
.resource = cmt10_resources,
.num_resources = ARRAY_SIZE(cmt10_resources),
.resource = cmt1_resources,
.num_resources = ARRAY_SIZE(cmt1_resources),
};
/* TMU */
static struct sh_timer_config tmu00_platform_data = {
.name = "TMU00",
.channel_offset = 0x4,
.timer_bit = 0,
.clockevent_rating = 200,
static struct sh_timer_config tmu0_platform_data = {
.channels_mask = 7,
};
static struct resource tmu00_resources[] = {
[0] = {
.name = "TMU00",
.start = 0xfff80008,
.end = 0xfff80014 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_spi(198),
.flags = IORESOURCE_IRQ,
},
static struct resource tmu0_resources[] = {
DEFINE_RES_MEM(0xfff80000, 0x2c),
DEFINE_RES_IRQ(gic_spi(198)),
DEFINE_RES_IRQ(gic_spi(199)),
DEFINE_RES_IRQ(gic_spi(200)),
};
static struct platform_device tmu00_device = {
.name = "sh_tmu",
static struct platform_device tmu0_device = {
.name = "sh-tmu",
.id = 0,
.dev = {
.platform_data = &tmu00_platform_data,
},
.resource = tmu00_resources,
.num_resources = ARRAY_SIZE(tmu00_resources),
};
static struct sh_timer_config tmu01_platform_data = {
.name = "TMU01",
.channel_offset = 0x10,
.timer_bit = 1,
.clocksource_rating = 200,
};
static struct resource tmu01_resources[] = {
[0] = {
.name = "TMU01",
.start = 0xfff80014,
.end = 0xfff80020 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_spi(199),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu01_device = {
.name = "sh_tmu",
.id = 1,
.dev = {
.platform_data = &tmu01_platform_data,
},
.resource = tmu01_resources,
.num_resources = ARRAY_SIZE(tmu01_resources),
};
static struct sh_timer_config tmu02_platform_data = {
.name = "TMU02",
.channel_offset = 0x1C,
.timer_bit = 2,
.clocksource_rating = 200,
};
static struct resource tmu02_resources[] = {
[0] = {
.name = "TMU02",
.start = 0xfff80020,
.end = 0xfff8002C - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_spi(200),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu02_device = {
.name = "sh_tmu",
.id = 2,
.dev = {
.platform_data = &tmu02_platform_data,
.platform_data = &tmu0_platform_data,
},
.resource = tmu02_resources,
.num_resources = ARRAY_SIZE(tmu02_resources),
.resource = tmu0_resources,
.num_resources = ARRAY_SIZE(tmu0_resources),
};
/* IPMMUI (an IPMMU module for ICB/LMB) */
......@@ -400,7 +319,7 @@ static struct platform_device *r8a7740_devices_dt[] __initdata = {
&scif6_device,
&scif7_device,
&scif8_device,
&cmt10_device,
&cmt1_device,
};
static struct platform_device *r8a7740_early_devices[] __initdata = {
......@@ -408,9 +327,7 @@ static struct platform_device *r8a7740_early_devices[] __initdata = {
&irqpin1_device,
&irqpin2_device,
&irqpin3_device,
&tmu00_device,
&tmu01_device,
&tmu02_device,
&tmu0_device,
&ipmmu_device,
};
......
......@@ -71,33 +71,20 @@ R8A7778_SCIF(5, 0xffe45000, gic_iid(0x6b));
sizeof(scif##index##_platform_data))
/* TMU */
static struct resource sh_tmu0_resources[] __initdata = {
DEFINE_RES_MEM(0xffd80008, 12),
DEFINE_RES_IRQ(gic_iid(0x40)),
};
static struct sh_timer_config sh_tmu0_platform_data __initdata = {
.name = "TMU00",
.channel_offset = 0x4,
.timer_bit = 0,
.clockevent_rating = 200,
static struct sh_timer_config sh_tmu0_platform_data = {
.channels_mask = 7,
};
static struct resource sh_tmu1_resources[] __initdata = {
DEFINE_RES_MEM(0xffd80014, 12),
static struct resource sh_tmu0_resources[] = {
DEFINE_RES_MEM(0xffd80000, 0x30),
DEFINE_RES_IRQ(gic_iid(0x40)),
DEFINE_RES_IRQ(gic_iid(0x41)),
};
static struct sh_timer_config sh_tmu1_platform_data __initdata = {
.name = "TMU01",
.channel_offset = 0x10,
.timer_bit = 1,
.clocksource_rating = 200,
DEFINE_RES_IRQ(gic_iid(0x42)),
};
#define r8a7778_register_tmu(idx) \
platform_device_register_resndata( \
&platform_bus, "sh_tmu", idx, \
&platform_bus, "sh-tmu", idx, \
sh_tmu##idx##_resources, \
ARRAY_SIZE(sh_tmu##idx##_resources), \
&sh_tmu##idx##_platform_data, \
......@@ -312,7 +299,6 @@ void __init r8a7778_add_dt_devices(void)
r8a7778_register_scif(4);
r8a7778_register_scif(5);
r8a7778_register_tmu(0);
r8a7778_register_tmu(1);
}
/* HPB-DMA */
......
......@@ -219,64 +219,25 @@ R8A7779_SCIF(4, 0xffe44000, gic_iid(0x7c));
R8A7779_SCIF(5, 0xffe45000, gic_iid(0x7d));
/* TMU */
static struct sh_timer_config tmu00_platform_data = {
.name = "TMU00",
.channel_offset = 0x4,
.timer_bit = 0,
.clockevent_rating = 200,
static struct sh_timer_config tmu0_platform_data = {
.channels_mask = 7,
};
static struct resource tmu00_resources[] = {
[0] = {
.name = "TMU00",
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_iid(0x40),
.flags = IORESOURCE_IRQ,
},
static struct resource tmu0_resources[] = {
DEFINE_RES_MEM(0xffd80000, 0x30),
DEFINE_RES_IRQ(gic_iid(0x40)),
DEFINE_RES_IRQ(gic_iid(0x41)),
DEFINE_RES_IRQ(gic_iid(0x42)),
};
static struct platform_device tmu00_device = {
.name = "sh_tmu",
static struct platform_device tmu0_device = {
.name = "sh-tmu",
.id = 0,
.dev = {
.platform_data = &tmu00_platform_data,
},
.resource = tmu00_resources,
.num_resources = ARRAY_SIZE(tmu00_resources),
};
static struct sh_timer_config tmu01_platform_data = {
.name = "TMU01",
.channel_offset = 0x10,
.timer_bit = 1,
.clocksource_rating = 200,
};
static struct resource tmu01_resources[] = {
[0] = {
.name = "TMU01",
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_iid(0x41),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu01_device = {
.name = "sh_tmu",
.id = 1,
.dev = {
.platform_data = &tmu01_platform_data,
.platform_data = &tmu0_platform_data,
},
.resource = tmu01_resources,
.num_resources = ARRAY_SIZE(tmu01_resources),
.resource = tmu0_resources,
.num_resources = ARRAY_SIZE(tmu0_resources),
};
/* I2C */
......@@ -685,8 +646,7 @@ static struct platform_device *r8a7779_devices_dt[] __initdata = {
&scif3_device,
&scif4_device,
&scif5_device,
&tmu00_device,
&tmu01_device,
&tmu0_device,
};
static struct platform_device *r8a7779_standard_devices[] __initdata = {
......
......@@ -263,26 +263,28 @@ static const struct resource thermal_resources[] __initconst = {
thermal_resources, \
ARRAY_SIZE(thermal_resources))
static const struct sh_timer_config cmt00_platform_data __initconst = {
.name = "CMT00",
.timer_bit = 0,
.clockevent_rating = 80,
static struct sh_timer_config cmt0_platform_data = {
.channels_mask = 0x60,
};
static const struct resource cmt00_resources[] __initconst = {
DEFINE_RES_MEM(0xffca0510, 0x0c),
DEFINE_RES_MEM(0xffca0500, 0x04),
DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
static struct resource cmt0_resources[] = {
DEFINE_RES_MEM(0xffca0000, 0x1004),
DEFINE_RES_IRQ(gic_spi(142)),
};
#define r8a7790_register_cmt(idx) \
platform_device_register_resndata(&platform_bus, "sh_cmt", \
platform_device_register_resndata(&platform_bus, "sh-cmt-48-gen2", \
idx, cmt##idx##_resources, \
ARRAY_SIZE(cmt##idx##_resources), \
&cmt##idx##_platform_data, \
sizeof(struct sh_timer_config))
void __init r8a7790_add_dt_devices(void)
{
r8a7790_register_cmt(0);
}
void __init r8a7790_add_standard_devices(void)
{
r8a7790_register_scif(0);
r8a7790_register_scif(1);
......@@ -294,11 +296,6 @@ void __init r8a7790_add_dt_devices(void)
r8a7790_register_scif(7);
r8a7790_register_scif(8);
r8a7790_register_scif(9);
r8a7790_register_cmt(00);
}
void __init r8a7790_add_standard_devices(void)
{
r8a7790_add_dt_devices();
r8a7790_register_irqc(0);
r8a7790_register_thermal();
......
......@@ -128,20 +128,17 @@ R8A7791_SCIFA(14, 0xe6c80000, gic_spi(31)); /* SCIFA5 */
&scif##index##_platform_data, \
sizeof(scif##index##_platform_data))
static const struct sh_timer_config cmt00_platform_data __initconst = {
.name = "CMT00",
.timer_bit = 0,
.clockevent_rating = 80,
static struct sh_timer_config cmt0_platform_data = {
.channels_mask = 0x60,
};
static const struct resource cmt00_resources[] __initconst = {
DEFINE_RES_MEM(0xffca0510, 0x0c),
DEFINE_RES_MEM(0xffca0500, 0x04),
DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
static struct resource cmt0_resources[] = {
DEFINE_RES_MEM(0xffca0000, 0x1004),
DEFINE_RES_IRQ(gic_spi(142)),
};
#define r8a7791_register_cmt(idx) \
platform_device_register_resndata(&platform_bus, "sh_cmt", \
platform_device_register_resndata(&platform_bus, "sh-cmt-48-gen2", \
idx, cmt##idx##_resources, \
ARRAY_SIZE(cmt##idx##_resources), \
&cmt##idx##_platform_data, \
......@@ -184,6 +181,11 @@ static const struct resource thermal_resources[] __initconst = {
ARRAY_SIZE(thermal_resources))
void __init r8a7791_add_dt_devices(void)
{
r8a7791_register_cmt(0);
}
void __init r8a7791_add_standard_devices(void)
{
r8a7791_register_scif(0);
r8a7791_register_scif(1);
......@@ -200,11 +202,6 @@ void __init r8a7791_add_dt_devices(void)
r8a7791_register_scif(12);
r8a7791_register_scif(13);
r8a7791_register_scif(14);
r8a7791_register_cmt(00);
}
void __init r8a7791_add_standard_devices(void)
{
r8a7791_add_dt_devices();
r8a7791_register_irqc(0);
r8a7791_register_thermal();
......
......@@ -119,28 +119,16 @@ SH7372_SCIF(PORT_SCIFB, 6, 0xe6c30000, evt2irq(0x0d60));
/* CMT */
static struct sh_timer_config cmt2_platform_data = {
.name = "CMT2",
.channel_offset = 0x40,
.timer_bit = 5,
.clockevent_rating = 125,
.clocksource_rating = 125,
.channels_mask = 0x20,
};
static struct resource cmt2_resources[] = {
[0] = {
.name = "CMT2",
.start = 0xe6130040,
.end = 0xe613004b,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x0b80), /* CMT2 */
.flags = IORESOURCE_IRQ,
},
DEFINE_RES_MEM(0xe6130000, 0x50),
DEFINE_RES_IRQ(evt2irq(0x0b80)),
};
static struct platform_device cmt2_device = {
.name = "sh_cmt",
.name = "sh-cmt-32-fast",
.id = 2,
.dev = {
.platform_data = &cmt2_platform_data,
......@@ -150,64 +138,25 @@ static struct platform_device cmt2_device = {
};
/* TMU */
static struct sh_timer_config tmu00_platform_data = {
.name = "TMU00",
.channel_offset = 0x4,
.timer_bit = 0,
.clockevent_rating = 200,
static struct sh_timer_config tmu0_platform_data = {
.channels_mask = 7,
};
static struct resource tmu00_resources[] = {
[0] = {
.name = "TMU00",
.start = 0xfff60008,
.end = 0xfff60013,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = intcs_evt2irq(0xe80), /* TMU_TUNI0 */
.flags = IORESOURCE_IRQ,
},
static struct resource tmu0_resources[] = {
DEFINE_RES_MEM(0xfff60000, 0x2c),
DEFINE_RES_IRQ(intcs_evt2irq(0xe80)),
DEFINE_RES_IRQ(intcs_evt2irq(0xea0)),
DEFINE_RES_IRQ(intcs_evt2irq(0xec0)),
};
static struct platform_device tmu00_device = {
.name = "sh_tmu",
static struct platform_device tmu0_device = {
.name = "sh-tmu",
.id = 0,
.dev = {
.platform_data = &tmu00_platform_data,
},
.resource = tmu00_resources,
.num_resources = ARRAY_SIZE(tmu00_resources),
};
static struct sh_timer_config tmu01_platform_data = {
.name = "TMU01",
.channel_offset = 0x10,
.timer_bit = 1,
.clocksource_rating = 200,
};
static struct resource tmu01_resources[] = {
[0] = {
.name = "TMU01",
.start = 0xfff60014,
.end = 0xfff6001f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = intcs_evt2irq(0xea0), /* TMU_TUNI1 */
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu01_device = {
.name = "sh_tmu",
.id = 1,
.dev = {
.platform_data = &tmu01_platform_data,
.platform_data = &tmu0_platform_data,
},
.resource = tmu01_resources,
.num_resources = ARRAY_SIZE(tmu01_resources),
.resource = tmu0_resources,
.num_resources = ARRAY_SIZE(tmu0_resources),
};
/* I2C */
......@@ -952,8 +901,7 @@ static struct platform_device *sh7372_early_devices[] __initdata = {
&scif5_device,
&scif6_device,
&cmt2_device,
&tmu00_device,
&tmu01_device,
&tmu0_device,
&ipmmu_device,
};
......@@ -1000,8 +948,7 @@ void __init sh7372_add_standard_devices(void)
{ "A4R", &veu2_device, },
{ "A4R", &veu3_device, },
{ "A4R", &jpu_device, },
{ "A4R", &tmu00_device, },
{ "A4R", &tmu01_device, },
{ "A4R", &tmu0_device, },
};
sh7372_init_pm_domains();
......
......@@ -104,86 +104,45 @@ SH73A0_SCIF(PORT_SCIFA, 6, 0xe6cc0000, gic_spi(156));
SH73A0_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(143));
SH73A0_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(80));
static struct sh_timer_config cmt10_platform_data = {
.name = "CMT10",
.channel_offset = 0x10,
.timer_bit = 0,
.clockevent_rating = 80,
.clocksource_rating = 125,
static struct sh_timer_config cmt1_platform_data = {
.channels_mask = 0x3f,
};
static struct resource cmt10_resources[] = {
[0] = {
.name = "CMT10",
.start = 0xe6138010,
.end = 0xe613801b,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = gic_spi(65),
.flags = IORESOURCE_IRQ,
},
static struct resource cmt1_resources[] = {
DEFINE_RES_MEM(0xe6138000, 0x200),
DEFINE_RES_IRQ(gic_spi(65)),
};
static struct platform_device cmt10_device = {
.name = "sh_cmt",
.id = 10,
static struct platform_device cmt1_device = {
.name = "sh-cmt-48",
.id = 1,
.dev = {
.platform_data = &cmt10_platform_data,
.platform_data = &cmt1_platform_data,
},
.resource = cmt10_resources,
.num_resources = ARRAY_SIZE(cmt10_resources),
.resource = cmt1_resources,
.num_resources = ARRAY_SIZE(cmt1_resources),
};
/* TMU */
static struct sh_timer_config tmu00_platform_data = {
.name = "TMU00",
.channel_offset = 0x4,
.timer_bit = 0,
.clockevent_rating = 200,
static struct sh_timer_config tmu0_platform_data = {
.channels_mask = 7,
};
static struct resource tmu00_resources[] = {
[0] = DEFINE_RES_MEM(0xfff60008, 0xc),
[1] = {
.start = intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */
.flags = IORESOURCE_IRQ,
},
static struct resource tmu0_resources[] = {
DEFINE_RES_MEM(0xfff60000, 0x2c),
DEFINE_RES_IRQ(intcs_evt2irq(0xe80)),
DEFINE_RES_IRQ(intcs_evt2irq(0xea0)),
DEFINE_RES_IRQ(intcs_evt2irq(0xec0)),
};
static struct platform_device tmu00_device = {
.name = "sh_tmu",
static struct platform_device tmu0_device = {
.name = "sh-tmu",
.id = 0,
.dev = {
.platform_data = &tmu00_platform_data,
},
.resource = tmu00_resources,
.num_resources = ARRAY_SIZE(tmu00_resources),
};
static struct sh_timer_config tmu01_platform_data = {
.name = "TMU01",
.channel_offset = 0x10,
.timer_bit = 1,
.clocksource_rating = 200,
};
static struct resource tmu01_resources[] = {
[0] = DEFINE_RES_MEM(0xfff60014, 0xc),
[1] = {
.start = intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu01_device = {
.name = "sh_tmu",
.id = 1,
.dev = {
.platform_data = &tmu01_platform_data,
.platform_data = &tmu0_platform_data,
},
.resource = tmu01_resources,
.num_resources = ARRAY_SIZE(tmu01_resources),
.resource = tmu0_resources,
.num_resources = ARRAY_SIZE(tmu0_resources),
};
static struct resource i2c0_resources[] = {
......@@ -746,12 +705,11 @@ static struct platform_device *sh73a0_devices_dt[] __initdata = {
&scif6_device,
&scif7_device,
&scif8_device,
&cmt10_device,
&cmt1_device,
};
static struct platform_device *sh73a0_early_devices[] __initdata = {
&tmu00_device,
&tmu01_device,
&tmu0_device,
&ipmmu_device,
};
......
......@@ -56,9 +56,13 @@ int __init __deprecated cpg_clk_init(void)
clkdev_add_table(lookups, ARRAY_SIZE(lookups));
clk_add_alias("tmu_fck", NULL, "peripheral_clk", NULL);
clk_add_alias("mtu2_fck", NULL, "peripheral_clk", NULL);
clk_add_alias("cmt_fck", NULL, "peripheral_clk", NULL);
clk_add_alias("fck", "sh-tmu-sh3.0", "peripheral_clk", NULL);
clk_add_alias("fck", "sh-tmu.0", "peripheral_clk", NULL);
clk_add_alias("fck", "sh-tmu.1", "peripheral_clk", NULL);
clk_add_alias("fck", "sh-tmu.2", "peripheral_clk", NULL);
clk_add_alias("fck", "sh-mtu2", "peripheral_clk", NULL);
clk_add_alias("fck", "sh-cmt-16.0", "peripheral_clk", NULL);
clk_add_alias("fck", "sh-cmt-32.0", "peripheral_clk", NULL);
clk_add_alias("sci_ick", NULL, "peripheral_clk", NULL);
return ret;
......
......@@ -152,62 +152,24 @@ static struct platform_device eth_device = {
.resource = eth_resources,
};
static struct sh_timer_config cmt0_platform_data = {
.channel_offset = 0x02,
.timer_bit = 0,
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
static struct sh_timer_config cmt_platform_data = {
.channels_mask = 3,
};
static struct resource cmt0_resources[] = {
[0] = {
.start = 0xf84a0072,
.end = 0xf84a0077,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 86,
.flags = IORESOURCE_IRQ,
},
static struct resource cmt_resources[] = {
DEFINE_RES_MEM(0xf84a0070, 0x10),
DEFINE_RES_IRQ(86),
DEFINE_RES_IRQ(87),
};
static struct platform_device cmt0_device = {
.name = "sh_cmt",
static struct platform_device cmt_device = {
.name = "sh-cmt-16",
.id = 0,
.dev = {
.platform_data = &cmt0_platform_data,
},
.resource = cmt0_resources,
.num_resources = ARRAY_SIZE(cmt0_resources),
};
static struct sh_timer_config cmt1_platform_data = {
.channel_offset = 0x08,
.timer_bit = 1,
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
};
static struct resource cmt1_resources[] = {
[0] = {
.start = 0xf84a0078,
.end = 0xf84a007d,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 87,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cmt1_device = {
.name = "sh_cmt",
.id = 1,
.dev = {
.platform_data = &cmt1_platform_data,
.platform_data = &cmt_platform_data,
},
.resource = cmt1_resources,
.num_resources = ARRAY_SIZE(cmt1_resources),
.resource = cmt_resources,
.num_resources = ARRAY_SIZE(cmt_resources),
};
static struct platform_device *sh7619_devices[] __initdata = {
......@@ -215,8 +177,7 @@ static struct platform_device *sh7619_devices[] __initdata = {
&scif1_device,
&scif2_device,
&eth_device,
&cmt0_device,
&cmt1_device,
&cmt_device,
};
static int __init sh7619_devices_setup(void)
......@@ -235,8 +196,7 @@ static struct platform_device *sh7619_early_devices[] __initdata = {
&scif0_device,
&scif1_device,
&scif2_device,
&cmt0_device,
&cmt1_device,
&cmt_device,
};
#define STBCR3 0xf80a0000
......
......@@ -117,9 +117,9 @@ static struct clk_lookup lookups[] = {
/* MSTP clocks */
CLKDEV_CON_ID("sci_ick", &mstp_clks[MSTP77]),
CLKDEV_CON_ID("vdc3", &mstp_clks[MSTP74]),
CLKDEV_CON_ID("cmt_fck", &mstp_clks[MSTP72]),
CLKDEV_ICK_ID("fck", "sh-cmt-16.0", &mstp_clks[MSTP72]),
CLKDEV_CON_ID("usb0", &mstp_clks[MSTP60]),
CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP35]),
CLKDEV_ICK_ID("fck", "sh-mtu2", &mstp_clks[MSTP35]),
CLKDEV_CON_ID("sdhi0", &mstp_clks[MSTP34]),
CLKDEV_CON_ID("sdhi1", &mstp_clks[MSTP33]),
CLKDEV_CON_ID("adc0", &mstp_clks[MSTP32]),
......
......@@ -158,9 +158,9 @@ static struct clk_lookup lookups[] = {
CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),
CLKDEV_CON_ID("cmt_fck", &mstp_clks[MSTP72]),
CLKDEV_ICK_ID("fck", "sh-cmt-16.0", &mstp_clks[MSTP72]),
CLKDEV_CON_ID("usb0", &mstp_clks[MSTP60]),
CLKDEV_CON_ID("mtu2_fck", &mstp_clks[MSTP35]),
CLKDEV_ICK_ID("fck", "sh-mtu2", &mstp_clks[MSTP35]),
CLKDEV_CON_ID("adc0", &mstp_clks[MSTP32]),
CLKDEV_CON_ID("rtc0", &mstp_clks[MSTP30]),
};
......
......@@ -114,88 +114,18 @@ static struct intc_mask_reg mask_registers[] __initdata = {
static DECLARE_INTC_DESC(intc_desc, "mxg", vectors, groups,
mask_registers, prio_registers, NULL);
static struct sh_timer_config mtu2_0_platform_data = {
.channel_offset = -0x80,
.timer_bit = 0,
.clockevent_rating = 200,
static struct resource mtu2_resources[] = {
DEFINE_RES_MEM(0xff801000, 0x400),
DEFINE_RES_IRQ_NAMED(228, "tgi0a"),
DEFINE_RES_IRQ_NAMED(234, "tgi1a"),
DEFINE_RES_IRQ_NAMED(240, "tgi2a"),
};
static struct resource mtu2_0_resources[] = {
[0] = {
.start = 0xff801300,
.end = 0xff801326,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 228,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device mtu2_0_device = {
.name = "sh_mtu2",
.id = 0,
.dev = {
.platform_data = &mtu2_0_platform_data,
},
.resource = mtu2_0_resources,
.num_resources = ARRAY_SIZE(mtu2_0_resources),
};
static struct sh_timer_config mtu2_1_platform_data = {
.channel_offset = -0x100,
.timer_bit = 1,
.clockevent_rating = 200,
};
static struct resource mtu2_1_resources[] = {
[0] = {
.start = 0xff801380,
.end = 0xff801390,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 234,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device mtu2_1_device = {
.name = "sh_mtu2",
.id = 1,
.dev = {
.platform_data = &mtu2_1_platform_data,
},
.resource = mtu2_1_resources,
.num_resources = ARRAY_SIZE(mtu2_1_resources),
};
static struct sh_timer_config mtu2_2_platform_data = {
.channel_offset = 0x80,
.timer_bit = 2,
.clockevent_rating = 200,
};
static struct resource mtu2_2_resources[] = {
[0] = {
.start = 0xff801000,
.end = 0xff80100a,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 240,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device mtu2_2_device = {
.name = "sh_mtu2",
.id = 2,
.dev = {
.platform_data = &mtu2_2_platform_data,
},
.resource = mtu2_2_resources,
.num_resources = ARRAY_SIZE(mtu2_2_resources),
static struct platform_device mtu2_device = {
.name = "sh-mtu2",
.id = -1,
.resource = mtu2_resources,
.num_resources = ARRAY_SIZE(mtu2_resources),
};
static struct plat_sci_port scif0_platform_data = {
......@@ -221,9 +151,7 @@ static struct platform_device scif0_device = {
static struct platform_device *mxg_devices[] __initdata = {
&scif0_device,
&mtu2_0_device,
&mtu2_1_device,
&mtu2_2_device,
&mtu2_device,
};
static int __init mxg_devices_setup(void)
......@@ -240,9 +168,7 @@ void __init plat_irq_setup(void)
static struct platform_device *mxg_early_devices[] __initdata = {
&scif0_device,
&mtu2_0_device,
&mtu2_1_device,
&mtu2_2_device,
&mtu2_device,
};
void __init plat_early_device_setup(void)
......
......@@ -365,88 +365,18 @@ static struct platform_device rtc_device = {
.resource = rtc_resources,
};
static struct sh_timer_config mtu2_0_platform_data = {
.channel_offset = -0x80,
.timer_bit = 0,
.clockevent_rating = 200,
static struct resource mtu2_resources[] = {
DEFINE_RES_MEM(0xfffe4000, 0x400),
DEFINE_RES_IRQ_NAMED(108, "tgi0a"),
DEFINE_RES_IRQ_NAMED(116, "tgi1a"),
DEFINE_RES_IRQ_NAMED(124, "tgi1b"),
};
static struct resource mtu2_0_resources[] = {
[0] = {
.start = 0xfffe4300,
.end = 0xfffe4326,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 108,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device mtu2_0_device = {
.name = "sh_mtu2",
.id = 0,
.dev = {
.platform_data = &mtu2_0_platform_data,
},
.resource = mtu2_0_resources,
.num_resources = ARRAY_SIZE(mtu2_0_resources),
};
static struct sh_timer_config mtu2_1_platform_data = {
.channel_offset = -0x100,
.timer_bit = 1,
.clockevent_rating = 200,
};
static struct resource mtu2_1_resources[] = {
[0] = {
.start = 0xfffe4380,
.end = 0xfffe4390,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 116,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device mtu2_1_device = {
.name = "sh_mtu2",
.id = 1,
.dev = {
.platform_data = &mtu2_1_platform_data,
},
.resource = mtu2_1_resources,
.num_resources = ARRAY_SIZE(mtu2_1_resources),
};
static struct sh_timer_config mtu2_2_platform_data = {
.channel_offset = 0x80,
.timer_bit = 2,
.clockevent_rating = 200,
};
static struct resource mtu2_2_resources[] = {
[0] = {
.start = 0xfffe4000,
.end = 0xfffe400a,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 124,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device mtu2_2_device = {
.name = "sh_mtu2",
.id = 2,
.dev = {
.platform_data = &mtu2_2_platform_data,
},
.resource = mtu2_2_resources,
.num_resources = ARRAY_SIZE(mtu2_2_resources),
static struct platform_device mtu2_device = {
.name = "sh-mtu2",
.id = -1,
.resource = mtu2_resources,
.num_resources = ARRAY_SIZE(mtu2_resources),
};
static struct platform_device *sh7201_devices[] __initdata = {
......@@ -459,9 +389,7 @@ static struct platform_device *sh7201_devices[] __initdata = {
&scif6_device,
&scif7_device,
&rtc_device,
&mtu2_0_device,
&mtu2_1_device,
&mtu2_2_device,
&mtu2_device,
};
static int __init sh7201_devices_setup(void)
......@@ -485,9 +413,7 @@ static struct platform_device *sh7201_early_devices[] __initdata = {
&scif5_device,
&scif6_device,
&scif7_device,
&mtu2_0_device,
&mtu2_1_device,
&mtu2_2_device,
&mtu2_device,
};
#define STBCR3 0xfffe0408
......
......@@ -265,118 +265,37 @@ static struct platform_device scif3_device = {
},
};
static struct sh_timer_config cmt0_platform_data = {
.channel_offset = 0x02,
.timer_bit = 0,
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
static struct sh_timer_config cmt_platform_data = {
.channels_mask = 3,
};
static struct resource cmt0_resources[] = {
[0] = {
.start = 0xfffec002,
.end = 0xfffec007,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 142,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cmt0_device = {
.name = "sh_cmt",
.id = 0,
.dev = {
.platform_data = &cmt0_platform_data,
},
.resource = cmt0_resources,
.num_resources = ARRAY_SIZE(cmt0_resources),
};
static struct sh_timer_config cmt1_platform_data = {
.channel_offset = 0x08,
.timer_bit = 1,
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
};
static struct resource cmt1_resources[] = {
[0] = {
.start = 0xfffec008,
.end = 0xfffec00d,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 143,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cmt1_device = {
.name = "sh_cmt",
.id = 1,
.dev = {
.platform_data = &cmt1_platform_data,
},
.resource = cmt1_resources,
.num_resources = ARRAY_SIZE(cmt1_resources),
};
static struct sh_timer_config mtu2_0_platform_data = {
.channel_offset = -0x80,
.timer_bit = 0,
.clockevent_rating = 200,
};
static struct resource mtu2_0_resources[] = {
[0] = {
.start = 0xfffe4300,
.end = 0xfffe4326,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 146,
.flags = IORESOURCE_IRQ,
},
static struct resource cmt_resources[] = {
DEFINE_RES_MEM(0xfffec000, 0x10),
DEFINE_RES_IRQ(142),
DEFINE_RES_IRQ(143),
};
static struct platform_device mtu2_0_device = {
.name = "sh_mtu2",
static struct platform_device cmt_device = {
.name = "sh-cmt-16",
.id = 0,
.dev = {
.platform_data = &mtu2_0_platform_data,
.platform_data = &cmt_platform_data,
},
.resource = mtu2_0_resources,
.num_resources = ARRAY_SIZE(mtu2_0_resources),
.resource = cmt_resources,
.num_resources = ARRAY_SIZE(cmt_resources),
};
static struct sh_timer_config mtu2_1_platform_data = {
.channel_offset = -0x100,
.timer_bit = 1,
.clockevent_rating = 200,
static struct resource mtu2_resources[] = {
DEFINE_RES_MEM(0xfffe4000, 0x400),
DEFINE_RES_IRQ_NAMED(146, "tgi0a"),
DEFINE_RES_IRQ_NAMED(153, "tgi1a"),
};
static struct resource mtu2_1_resources[] = {
[0] = {
.start = 0xfffe4380,
.end = 0xfffe4390,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 153,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device mtu2_1_device = {
.name = "sh_mtu2",
.id = 1,
.dev = {
.platform_data = &mtu2_1_platform_data,
},
.resource = mtu2_1_resources,
.num_resources = ARRAY_SIZE(mtu2_1_resources),
static struct platform_device mtu2_device = {
.name = "sh-mtu2",
.id = -1,
.resource = mtu2_resources,
.num_resources = ARRAY_SIZE(mtu2_resources),
};
static struct resource rtc_resources[] = {
......@@ -404,10 +323,8 @@ static struct platform_device *sh7203_devices[] __initdata = {
&scif1_device,
&scif2_device,
&scif3_device,
&cmt0_device,
&cmt1_device,
&mtu2_0_device,
&mtu2_1_device,
&cmt_device,
&mtu2_device,
&rtc_device,
};
......@@ -428,10 +345,8 @@ static struct platform_device *sh7203_early_devices[] __initdata = {
&scif1_device,
&scif2_device,
&scif3_device,
&cmt0_device,
&cmt1_device,
&mtu2_0_device,
&mtu2_1_device,
&cmt_device,
&mtu2_device,
};
#define STBCR3 0xfffe0408
......
......@@ -217,146 +217,38 @@ static struct platform_device scif3_device = {
},
};
static struct sh_timer_config cmt0_platform_data = {
.channel_offset = 0x02,
.timer_bit = 0,
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
static struct sh_timer_config cmt_platform_data = {
.channels_mask = 3,
};
static struct resource cmt0_resources[] = {
[0] = {
.start = 0xfffec002,
.end = 0xfffec007,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 140,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cmt0_device = {
.name = "sh_cmt",
.id = 0,
.dev = {
.platform_data = &cmt0_platform_data,
},
.resource = cmt0_resources,
.num_resources = ARRAY_SIZE(cmt0_resources),
};
static struct sh_timer_config cmt1_platform_data = {
.channel_offset = 0x08,
.timer_bit = 1,
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
};
static struct resource cmt1_resources[] = {
[0] = {
.start = 0xfffec008,
.end = 0xfffec00d,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 144,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cmt1_device = {
.name = "sh_cmt",
.id = 1,
.dev = {
.platform_data = &cmt1_platform_data,
},
.resource = cmt1_resources,
.num_resources = ARRAY_SIZE(cmt1_resources),
};
static struct sh_timer_config mtu2_0_platform_data = {
.channel_offset = -0x80,
.timer_bit = 0,
.clockevent_rating = 200,
};
static struct resource mtu2_0_resources[] = {
[0] = {
.start = 0xfffe4300,
.end = 0xfffe4326,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 156,
.flags = IORESOURCE_IRQ,
},
static struct resource cmt_resources[] = {
DEFINE_RES_MEM(0xfffec000, 0x10),
DEFINE_RES_IRQ(140),
DEFINE_RES_IRQ(144),
};
static struct platform_device mtu2_0_device = {
.name = "sh_mtu2",
static struct platform_device cmt_device = {
.name = "sh-cmt-16",
.id = 0,
.dev = {
.platform_data = &mtu2_0_platform_data,
.platform_data = &cmt_platform_data,
},
.resource = mtu2_0_resources,
.num_resources = ARRAY_SIZE(mtu2_0_resources),
.resource = cmt_resources,
.num_resources = ARRAY_SIZE(cmt_resources),
};
static struct sh_timer_config mtu2_1_platform_data = {
.channel_offset = -0x100,
.timer_bit = 1,
.clockevent_rating = 200,
static struct resource mtu2_resources[] = {
DEFINE_RES_MEM(0xfffe4000, 0x400),
DEFINE_RES_IRQ_NAMED(156, "tgi0a"),
DEFINE_RES_IRQ_NAMED(164, "tgi1a"),
DEFINE_RES_IRQ_NAMED(180, "tgi2a"),
};
static struct resource mtu2_1_resources[] = {
[0] = {
.start = 0xfffe4380,
.end = 0xfffe4390,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 164,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device mtu2_1_device = {
.name = "sh_mtu2",
.id = 1,
.dev = {
.platform_data = &mtu2_1_platform_data,
},
.resource = mtu2_1_resources,
.num_resources = ARRAY_SIZE(mtu2_1_resources),
};
static struct sh_timer_config mtu2_2_platform_data = {
.channel_offset = 0x80,
.timer_bit = 2,
.clockevent_rating = 200,
};
static struct resource mtu2_2_resources[] = {
[0] = {
.start = 0xfffe4000,
.end = 0xfffe400a,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 180,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device mtu2_2_device = {
.name = "sh_mtu2",
.id = 2,
.dev = {
.platform_data = &mtu2_2_platform_data,
},
.resource = mtu2_2_resources,
.num_resources = ARRAY_SIZE(mtu2_2_resources),
static struct platform_device mtu2_device = {
.name = "sh-mtu2s",
.id = -1,
.resource = mtu2_resources,
.num_resources = ARRAY_SIZE(mtu2_resources),
};
static struct platform_device *sh7206_devices[] __initdata = {
......@@ -364,11 +256,8 @@ static struct platform_device *sh7206_devices[] __initdata = {
&scif1_device,
&scif2_device,
&scif3_device,
&cmt0_device,
&cmt1_device,
&mtu2_0_device,
&mtu2_1_device,
&mtu2_2_device,
&cmt_device,
&mtu2_device,
};
static int __init sh7206_devices_setup(void)
......@@ -388,11 +277,8 @@ static struct platform_device *sh7206_early_devices[] __initdata = {
&scif1_device,
&scif2_device,
&scif3_device,
&cmt0_device,
&cmt1_device,
&mtu2_0_device,
&mtu2_1_device,
&mtu2_2_device,
&cmt_device,
&mtu2_device,
};
#define STBCR3 0xfffe0408
......
......@@ -433,125 +433,37 @@ static struct platform_device scif7_device = {
},
};
static struct sh_timer_config cmt0_platform_data = {
.channel_offset = 0x02,
.timer_bit = 0,
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
static struct sh_timer_config cmt_platform_data = {
.channels_mask = 3,
};
static struct resource cmt0_resources[] = {
[0] = {
.name = "CMT0",
.start = 0xfffec002,
.end = 0xfffec007,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 175,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cmt0_device = {
.name = "sh_cmt",
.id = 0,
.dev = {
.platform_data = &cmt0_platform_data,
},
.resource = cmt0_resources,
.num_resources = ARRAY_SIZE(cmt0_resources),
};
static struct sh_timer_config cmt1_platform_data = {
.name = "CMT1",
.channel_offset = 0x08,
.timer_bit = 1,
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
};
static struct resource cmt1_resources[] = {
[0] = {
.name = "CMT1",
.start = 0xfffec008,
.end = 0xfffec00d,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 176,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cmt1_device = {
.name = "sh_cmt",
.id = 1,
.dev = {
.platform_data = &cmt1_platform_data,
},
.resource = cmt1_resources,
.num_resources = ARRAY_SIZE(cmt1_resources),
};
static struct sh_timer_config mtu2_0_platform_data = {
.name = "MTU2_0",
.channel_offset = -0x80,
.timer_bit = 0,
.clockevent_rating = 200,
};
static struct resource mtu2_0_resources[] = {
[0] = {
.name = "MTU2_0",
.start = 0xfffe4300,
.end = 0xfffe4326,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 179,
.flags = IORESOURCE_IRQ,
},
static struct resource cmt_resources[] = {
DEFINE_RES_MEM(0xfffec000, 0x10),
DEFINE_RES_IRQ(175),
DEFINE_RES_IRQ(176),
};
static struct platform_device mtu2_0_device = {
.name = "sh_mtu2",
static struct platform_device cmt_device = {
.name = "sh-cmt-16",
.id = 0,
.dev = {
.platform_data = &mtu2_0_platform_data,
.platform_data = &cmt_platform_data,
},
.resource = mtu2_0_resources,
.num_resources = ARRAY_SIZE(mtu2_0_resources),
.resource = cmt_resources,
.num_resources = ARRAY_SIZE(cmt_resources),
};
static struct sh_timer_config mtu2_1_platform_data = {
.name = "MTU2_1",
.channel_offset = -0x100,
.timer_bit = 1,
.clockevent_rating = 200,
static struct resource mtu2_resources[] = {
DEFINE_RES_MEM(0xfffe4000, 0x400),
DEFINE_RES_IRQ_NAMED(179, "tgi0a"),
DEFINE_RES_IRQ_NAMED(186, "tgi1a"),
};
static struct resource mtu2_1_resources[] = {
[0] = {
.name = "MTU2_1",
.start = 0xfffe4380,
.end = 0xfffe4390,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 186,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device mtu2_1_device = {
.name = "sh_mtu2",
.id = 1,
.dev = {
.platform_data = &mtu2_1_platform_data,
},
.resource = mtu2_1_resources,
.num_resources = ARRAY_SIZE(mtu2_1_resources),
static struct platform_device mtu2_device = {
.name = "sh-mtu2",
.id = -1,
.resource = mtu2_resources,
.num_resources = ARRAY_SIZE(mtu2_resources),
};
static struct resource rtc_resources[] = {
......@@ -620,10 +532,8 @@ static struct platform_device *sh7264_devices[] __initdata = {
&scif5_device,
&scif6_device,
&scif7_device,
&cmt0_device,
&cmt1_device,
&mtu2_0_device,
&mtu2_1_device,
&cmt_device,
&mtu2_device,
&rtc_device,
&r8a66597_usb_host_device,
};
......@@ -649,10 +559,8 @@ static struct platform_device *sh7264_early_devices[] __initdata = {
&scif5_device,
&scif6_device,
&scif7_device,
&cmt0_device,
&cmt1_device,
&mtu2_0_device,
&mtu2_1_device,
&cmt_device,
&mtu2_device,
};
void __init plat_early_device_setup(void)
......
......@@ -455,118 +455,37 @@ static struct platform_device scif7_device = {
},
};
static struct sh_timer_config cmt0_platform_data = {
.channel_offset = 0x02,
.timer_bit = 0,
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
static struct sh_timer_config cmt_platform_data = {
.channels_mask = 3,
};
static struct resource cmt0_resources[] = {
[0] = {
.start = 0xfffec002,
.end = 0xfffec007,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 188,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cmt0_device = {
.name = "sh_cmt",
.id = 0,
.dev = {
.platform_data = &cmt0_platform_data,
},
.resource = cmt0_resources,
.num_resources = ARRAY_SIZE(cmt0_resources),
};
static struct sh_timer_config cmt1_platform_data = {
.channel_offset = 0x08,
.timer_bit = 1,
.clockevent_rating = 125,
.clocksource_rating = 0, /* disabled due to code generation issues */
};
static struct resource cmt1_resources[] = {
[0] = {
.start = 0xfffec008,
.end = 0xfffec00d,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 189,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cmt1_device = {
.name = "sh_cmt",
.id = 1,
.dev = {
.platform_data = &cmt1_platform_data,
},
.resource = cmt1_resources,
.num_resources = ARRAY_SIZE(cmt1_resources),
};
static struct sh_timer_config mtu2_0_platform_data = {
.channel_offset = -0x80,
.timer_bit = 0,
.clockevent_rating = 200,
};
static struct resource mtu2_0_resources[] = {
[0] = {
.start = 0xfffe4300,
.end = 0xfffe4326,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 192,
.flags = IORESOURCE_IRQ,
},
static struct resource cmt_resources[] = {
DEFINE_RES_MEM(0xfffec000, 0x10),
DEFINE_RES_IRQ(188),
DEFINE_RES_IRQ(189),
};
static struct platform_device mtu2_0_device = {
.name = "sh_mtu2",
static struct platform_device cmt_device = {
.name = "sh-cmt-16",
.id = 0,
.dev = {
.platform_data = &mtu2_0_platform_data,
.platform_data = &cmt_platform_data,
},
.resource = mtu2_0_resources,
.num_resources = ARRAY_SIZE(mtu2_0_resources),
.resource = cmt_resources,
.num_resources = ARRAY_SIZE(cmt_resources),
};
static struct sh_timer_config mtu2_1_platform_data = {
.channel_offset = -0x100,
.timer_bit = 1,
.clockevent_rating = 200,
static struct resource mtu2_resources[] = {
DEFINE_RES_MEM(0xfffe4000, 0x400),
DEFINE_RES_IRQ_NAMED(192, "tgi0a"),
DEFINE_RES_IRQ_NAMED(203, "tgi1a"),
};
static struct resource mtu2_1_resources[] = {
[0] = {
.start = 0xfffe4380,
.end = 0xfffe4390,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 203,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device mtu2_1_device = {
.name = "sh_mtu2",
.id = 1,
.dev = {
.platform_data = &mtu2_1_platform_data,
},
.resource = mtu2_1_resources,
.num_resources = ARRAY_SIZE(mtu2_1_resources),
static struct platform_device mtu2_device = {
.name = "sh-mtu2",
.id = -1,
.resource = mtu2_resources,
.num_resources = ARRAY_SIZE(mtu2_resources),
};
static struct resource rtc_resources[] = {
......@@ -629,10 +548,8 @@ static struct platform_device *sh7269_devices[] __initdata = {
&scif5_device,
&scif6_device,
&scif7_device,
&cmt0_device,
&cmt1_device,
&mtu2_0_device,
&mtu2_1_device,
&cmt_device,
&mtu2_device,
&rtc_device,
&r8a66597_usb_host_device,
};
......@@ -658,10 +575,8 @@ static struct platform_device *sh7269_early_devices[] __initdata = {
&scif5_device,
&scif6_device,
&scif7_device,
&cmt0_device,
&cmt1_device,
&mtu2_0_device,
&mtu2_1_device,
&cmt_device,
&mtu2_device,
};
void __init plat_early_device_setup(void)
......
......@@ -143,25 +143,18 @@ static struct platform_device rtc_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.channel_offset = 0x02,
.timer_bit = 0,
.clockevent_rating = 200,
.channels_mask = 7,
};
static struct resource tmu0_resources[] = {
[0] = {
.start = 0xfffffe94,
.end = 0xfffffe9f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x400),
.flags = IORESOURCE_IRQ,
},
DEFINE_RES_MEM(0xfffffe90, 0x2c),
DEFINE_RES_IRQ(evt2irq(0x400)),
DEFINE_RES_IRQ(evt2irq(0x420)),
DEFINE_RES_IRQ(evt2irq(0x440)),
};
static struct platform_device tmu0_device = {
.name = "sh_tmu",
.name = "sh-tmu-sh3",
.id = 0,
.dev = {
.platform_data = &tmu0_platform_data,
......@@ -170,67 +163,10 @@ static struct platform_device tmu0_device = {
.num_resources = ARRAY_SIZE(tmu0_resources),
};
static struct sh_timer_config tmu1_platform_data = {
.channel_offset = 0xe,
.timer_bit = 1,
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.start = 0xfffffea0,
.end = 0xfffffeab,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x420),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu1_device = {
.name = "sh_tmu",
.id = 1,
.dev = {
.platform_data = &tmu1_platform_data,
},
.resource = tmu1_resources,
.num_resources = ARRAY_SIZE(tmu1_resources),
};
static struct sh_timer_config tmu2_platform_data = {
.channel_offset = 0x1a,
.timer_bit = 2,
};
static struct resource tmu2_resources[] = {
[0] = {
.start = 0xfffffeac,
.end = 0xfffffebb,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x440),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu2_device = {
.name = "sh_tmu",
.id = 2,
.dev = {
.platform_data = &tmu2_platform_data,
},
.resource = tmu2_resources,
.num_resources = ARRAY_SIZE(tmu2_resources),
};
static struct platform_device *sh7705_devices[] __initdata = {
&scif0_device,
&scif1_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
&rtc_device,
};
......@@ -245,8 +181,6 @@ static struct platform_device *sh7705_early_devices[] __initdata = {
&scif0_device,
&scif1_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
};
void __init plat_early_device_setup(void)
......
......@@ -185,25 +185,18 @@ static struct platform_device scif2_device = {
#endif
static struct sh_timer_config tmu0_platform_data = {
.channel_offset = 0x02,
.timer_bit = 0,
.clockevent_rating = 200,
.channels_mask = 7,
};
static struct resource tmu0_resources[] = {
[0] = {
.start = 0xfffffe94,
.end = 0xfffffe9f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x400),
.flags = IORESOURCE_IRQ,
},
DEFINE_RES_MEM(0xfffffe90, 0x2c),
DEFINE_RES_IRQ(evt2irq(0x400)),
DEFINE_RES_IRQ(evt2irq(0x420)),
DEFINE_RES_IRQ(evt2irq(0x440)),
};
static struct platform_device tmu0_device = {
.name = "sh_tmu",
.name = "sh-tmu-sh3",
.id = 0,
.dev = {
.platform_data = &tmu0_platform_data,
......@@ -212,61 +205,6 @@ static struct platform_device tmu0_device = {
.num_resources = ARRAY_SIZE(tmu0_resources),
};
static struct sh_timer_config tmu1_platform_data = {
.channel_offset = 0xe,
.timer_bit = 1,
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.start = 0xfffffea0,
.end = 0xfffffeab,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x420),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu1_device = {
.name = "sh_tmu",
.id = 1,
.dev = {
.platform_data = &tmu1_platform_data,
},
.resource = tmu1_resources,
.num_resources = ARRAY_SIZE(tmu1_resources),
};
static struct sh_timer_config tmu2_platform_data = {
.channel_offset = 0x1a,
.timer_bit = 2,
};
static struct resource tmu2_resources[] = {
[0] = {
.start = 0xfffffeac,
.end = 0xfffffebb,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x440),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu2_device = {
.name = "sh_tmu",
.id = 2,
.dev = {
.platform_data = &tmu2_platform_data,
},
.resource = tmu2_resources,
.num_resources = ARRAY_SIZE(tmu2_resources),
};
static struct platform_device *sh770x_devices[] __initdata = {
&scif0_device,
#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
......@@ -279,8 +217,6 @@ static struct platform_device *sh770x_devices[] __initdata = {
&scif2_device,
#endif
&tmu0_device,
&tmu1_device,
&tmu2_device,
&rtc_device,
};
......@@ -303,8 +239,6 @@ static struct platform_device *sh770x_early_devices[] __initdata = {
&scif2_device,
#endif
&tmu0_device,
&tmu1_device,
&tmu2_device,
};
void __init plat_early_device_setup(void)
......
......@@ -142,25 +142,18 @@ static struct platform_device scif1_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.channel_offset = 0x02,
.timer_bit = 0,
.clockevent_rating = 200,
.channels_mask = 7,
};
static struct resource tmu0_resources[] = {
[0] = {
.start = 0xa412fe94,
.end = 0xa412fe9f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x400),
.flags = IORESOURCE_IRQ,
},
DEFINE_RES_MEM(0xa412fe90, 0x28),
DEFINE_RES_IRQ(evt2irq(0x400)),
DEFINE_RES_IRQ(evt2irq(0x420)),
DEFINE_RES_IRQ(evt2irq(0x440)),
};
static struct platform_device tmu0_device = {
.name = "sh_tmu",
.name = "sh-tmu-sh3",
.id = 0,
.dev = {
.platform_data = &tmu0_platform_data,
......@@ -169,67 +162,10 @@ static struct platform_device tmu0_device = {
.num_resources = ARRAY_SIZE(tmu0_resources),
};
static struct sh_timer_config tmu1_platform_data = {
.channel_offset = 0xe,
.timer_bit = 1,
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.start = 0xa412fea0,
.end = 0xa412feab,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x420),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu1_device = {
.name = "sh_tmu",
.id = 1,
.dev = {
.platform_data = &tmu1_platform_data,
},
.resource = tmu1_resources,
.num_resources = ARRAY_SIZE(tmu1_resources),
};
static struct sh_timer_config tmu2_platform_data = {
.channel_offset = 0x1a,
.timer_bit = 2,
};
static struct resource tmu2_resources[] = {
[0] = {
.start = 0xa412feac,
.end = 0xa412feb5,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x440),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu2_device = {
.name = "sh_tmu",
.id = 2,
.dev = {
.platform_data = &tmu2_platform_data,
},
.resource = tmu2_resources,
.num_resources = ARRAY_SIZE(tmu2_resources),
};
static struct platform_device *sh7710_devices[] __initdata = {
&scif0_device,
&scif1_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
&rtc_device,
};
......@@ -244,8 +180,6 @@ static struct platform_device *sh7710_early_devices[] __initdata = {
&scif0_device,
&scif1_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
};
void __init plat_early_device_setup(void)
......
......@@ -152,163 +152,38 @@ static struct platform_device usbf_device = {
.resource = usbf_resources,
};
static struct sh_timer_config cmt0_platform_data = {
.channel_offset = 0x10,
.timer_bit = 0,
.clockevent_rating = 125,
.clocksource_rating = 125,
static struct sh_timer_config cmt_platform_data = {
.channels_mask = 0x1f,
};
static struct resource cmt0_resources[] = {
[0] = {
.start = 0x044a0010,
.end = 0x044a001b,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0xf00),
.flags = IORESOURCE_IRQ,
},
static struct resource cmt_resources[] = {
DEFINE_RES_MEM(0x044a0000, 0x60),
DEFINE_RES_IRQ(evt2irq(0xf00)),
};
static struct platform_device cmt0_device = {
.name = "sh_cmt",
static struct platform_device cmt_device = {
.name = "sh-cmt-32",
.id = 0,
.dev = {
.platform_data = &cmt0_platform_data,
},
.resource = cmt0_resources,
.num_resources = ARRAY_SIZE(cmt0_resources),
};
static struct sh_timer_config cmt1_platform_data = {
.channel_offset = 0x20,
.timer_bit = 1,
};
static struct resource cmt1_resources[] = {
[0] = {
.start = 0x044a0020,
.end = 0x044a002b,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0xf00),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cmt1_device = {
.name = "sh_cmt",
.id = 1,
.dev = {
.platform_data = &cmt1_platform_data,
},
.resource = cmt1_resources,
.num_resources = ARRAY_SIZE(cmt1_resources),
};
static struct sh_timer_config cmt2_platform_data = {
.channel_offset = 0x30,
.timer_bit = 2,
};
static struct resource cmt2_resources[] = {
[0] = {
.start = 0x044a0030,
.end = 0x044a003b,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0xf00),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cmt2_device = {
.name = "sh_cmt",
.id = 2,
.dev = {
.platform_data = &cmt2_platform_data,
},
.resource = cmt2_resources,
.num_resources = ARRAY_SIZE(cmt2_resources),
};
static struct sh_timer_config cmt3_platform_data = {
.channel_offset = 0x40,
.timer_bit = 3,
};
static struct resource cmt3_resources[] = {
[0] = {
.start = 0x044a0040,
.end = 0x044a004b,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0xf00),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cmt3_device = {
.name = "sh_cmt",
.id = 3,
.dev = {
.platform_data = &cmt3_platform_data,
.platform_data = &cmt_platform_data,
},
.resource = cmt3_resources,
.num_resources = ARRAY_SIZE(cmt3_resources),
};
static struct sh_timer_config cmt4_platform_data = {
.channel_offset = 0x50,
.timer_bit = 4,
};
static struct resource cmt4_resources[] = {
[0] = {
.start = 0x044a0050,
.end = 0x044a005b,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0xf00),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cmt4_device = {
.name = "sh_cmt",
.id = 4,
.dev = {
.platform_data = &cmt4_platform_data,
},
.resource = cmt4_resources,
.num_resources = ARRAY_SIZE(cmt4_resources),
.resource = cmt_resources,
.num_resources = ARRAY_SIZE(cmt_resources),
};
static struct sh_timer_config tmu0_platform_data = {
.channel_offset = 0x02,
.timer_bit = 0,
.clockevent_rating = 200,
.channels_mask = 7,
};
static struct resource tmu0_resources[] = {
[0] = {
.start = 0xa412fe94,
.end = 0xa412fe9f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x400),
.flags = IORESOURCE_IRQ,
},
DEFINE_RES_MEM(0xa412fe90, 0x28),
DEFINE_RES_IRQ(evt2irq(0x400)),
DEFINE_RES_IRQ(evt2irq(0x420)),
DEFINE_RES_IRQ(evt2irq(0x440)),
};
static struct platform_device tmu0_device = {
.name = "sh_tmu",
.name = "sh-tmu-sh3",
.id = 0,
.dev = {
.platform_data = &tmu0_platform_data,
......@@ -317,72 +192,11 @@ static struct platform_device tmu0_device = {
.num_resources = ARRAY_SIZE(tmu0_resources),
};
static struct sh_timer_config tmu1_platform_data = {
.channel_offset = 0xe,
.timer_bit = 1,
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.start = 0xa412fea0,
.end = 0xa412feab,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x420),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu1_device = {
.name = "sh_tmu",
.id = 1,
.dev = {
.platform_data = &tmu1_platform_data,
},
.resource = tmu1_resources,
.num_resources = ARRAY_SIZE(tmu1_resources),
};
static struct sh_timer_config tmu2_platform_data = {
.channel_offset = 0x1a,
.timer_bit = 2,
};
static struct resource tmu2_resources[] = {
[0] = {
.start = 0xa412feac,
.end = 0xa412feb5,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x440),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu2_device = {
.name = "sh_tmu",
.id = 2,
.dev = {
.platform_data = &tmu2_platform_data,
},
.resource = tmu2_resources,
.num_resources = ARRAY_SIZE(tmu2_resources),
};
static struct platform_device *sh7720_devices[] __initdata = {
&scif0_device,
&scif1_device,
&cmt0_device,
&cmt1_device,
&cmt2_device,
&cmt3_device,
&cmt4_device,
&cmt_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
&rtc_device,
&usb_ohci_device,
&usbf_device,
......@@ -398,14 +212,8 @@ arch_initcall(sh7720_devices_setup);
static struct platform_device *sh7720_early_devices[] __initdata = {
&scif0_device,
&scif1_device,
&cmt0_device,
&cmt1_device,
&cmt2_device,
&cmt3_device,
&cmt4_device,
&cmt_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
};
void __init plat_early_device_setup(void)
......
......@@ -41,25 +41,18 @@ static struct platform_device scif0_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.channel_offset = 0x04,
.timer_bit = 0,
.clockevent_rating = 200,
.channels_mask = 7,
};
static struct resource tmu0_resources[] = {
[0] = {
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x400),
.flags = IORESOURCE_IRQ,
},
DEFINE_RES_MEM(0xffd80000, 0x30),
DEFINE_RES_IRQ(evt2irq(0x400)),
DEFINE_RES_IRQ(evt2irq(0x420)),
DEFINE_RES_IRQ(evt2irq(0x440)),
};
static struct platform_device tmu0_device = {
.name = "sh_tmu",
.name = "sh-tmu",
.id = 0,
.dev = {
.platform_data = &tmu0_platform_data,
......@@ -68,66 +61,9 @@ static struct platform_device tmu0_device = {
.num_resources = ARRAY_SIZE(tmu0_resources),
};
static struct sh_timer_config tmu1_platform_data = {
.channel_offset = 0x10,
.timer_bit = 1,
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x420),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu1_device = {
.name = "sh_tmu",
.id = 1,
.dev = {
.platform_data = &tmu1_platform_data,
},
.resource = tmu1_resources,
.num_resources = ARRAY_SIZE(tmu1_resources),
};
static struct sh_timer_config tmu2_platform_data = {
.channel_offset = 0x1c,
.timer_bit = 2,
};
static struct resource tmu2_resources[] = {
[0] = {
.start = 0xffd80020,
.end = 0xffd8002f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x440),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu2_device = {
.name = "sh_tmu",
.id = 2,
.dev = {
.platform_data = &tmu2_platform_data,
},
.resource = tmu2_resources,
.num_resources = ARRAY_SIZE(tmu2_resources),
};
static struct platform_device *sh4202_devices[] __initdata = {
&scif0_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
};
static int __init sh4202_devices_setup(void)
......@@ -140,8 +76,6 @@ arch_initcall(sh4202_devices_setup);
static struct platform_device *sh4202_early_devices[] __initdata = {
&scif0_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
};
void __init plat_early_device_setup(void)
......
......@@ -82,25 +82,18 @@ static struct platform_device scif_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.channel_offset = 0x04,
.timer_bit = 0,
.clockevent_rating = 200,
.channels_mask = 7,
};
static struct resource tmu0_resources[] = {
[0] = {
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x400),
.flags = IORESOURCE_IRQ,
},
DEFINE_RES_MEM(0xffd80000, 0x30),
DEFINE_RES_IRQ(evt2irq(0x400)),
DEFINE_RES_IRQ(evt2irq(0x420)),
DEFINE_RES_IRQ(evt2irq(0x440)),
};
static struct platform_device tmu0_device = {
.name = "sh_tmu",
.name = "sh-tmu",
.id = 0,
.dev = {
.platform_data = &tmu0_platform_data,
......@@ -109,26 +102,23 @@ static struct platform_device tmu0_device = {
.num_resources = ARRAY_SIZE(tmu0_resources),
};
/* SH7750R, SH7751 and SH7751R all have two extra timer channels */
#if defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
defined(CONFIG_CPU_SUBTYPE_SH7751) || \
defined(CONFIG_CPU_SUBTYPE_SH7751R)
static struct sh_timer_config tmu1_platform_data = {
.channel_offset = 0x10,
.timer_bit = 1,
.clocksource_rating = 200,
.channels_mask = 3,
};
static struct resource tmu1_resources[] = {
[0] = {
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x420),
.flags = IORESOURCE_IRQ,
},
DEFINE_RES_MEM(0xfe100000, 0x20),
DEFINE_RES_IRQ(evt2irq(0xb00)),
DEFINE_RES_IRQ(evt2irq(0xb80)),
};
static struct platform_device tmu1_device = {
.name = "sh_tmu",
.name = "sh-tmu",
.id = 1,
.dev = {
.platform_data = &tmu1_platform_data,
......@@ -137,104 +127,15 @@ static struct platform_device tmu1_device = {
.num_resources = ARRAY_SIZE(tmu1_resources),
};
static struct sh_timer_config tmu2_platform_data = {
.channel_offset = 0x1c,
.timer_bit = 2,
};
static struct resource tmu2_resources[] = {
[0] = {
.start = 0xffd80020,
.end = 0xffd8002f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x440),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu2_device = {
.name = "sh_tmu",
.id = 2,
.dev = {
.platform_data = &tmu2_platform_data,
},
.resource = tmu2_resources,
.num_resources = ARRAY_SIZE(tmu2_resources),
};
/* SH7750R, SH7751 and SH7751R all have two extra timer channels */
#if defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
defined(CONFIG_CPU_SUBTYPE_SH7751) || \
defined(CONFIG_CPU_SUBTYPE_SH7751R)
static struct sh_timer_config tmu3_platform_data = {
.channel_offset = 0x04,
.timer_bit = 0,
};
static struct resource tmu3_resources[] = {
[0] = {
.start = 0xfe100008,
.end = 0xfe100013,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0xb00),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu3_device = {
.name = "sh_tmu",
.id = 3,
.dev = {
.platform_data = &tmu3_platform_data,
},
.resource = tmu3_resources,
.num_resources = ARRAY_SIZE(tmu3_resources),
};
static struct sh_timer_config tmu4_platform_data = {
.channel_offset = 0x10,
.timer_bit = 1,
};
static struct resource tmu4_resources[] = {
[0] = {
.start = 0xfe100014,
.end = 0xfe10001f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0xb80),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu4_device = {
.name = "sh_tmu",
.id = 4,
.dev = {
.platform_data = &tmu4_platform_data,
},
.resource = tmu4_resources,
.num_resources = ARRAY_SIZE(tmu4_resources),
};
#endif
static struct platform_device *sh7750_devices[] __initdata = {
&rtc_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
#if defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
defined(CONFIG_CPU_SUBTYPE_SH7751) || \
defined(CONFIG_CPU_SUBTYPE_SH7751R)
&tmu3_device,
&tmu4_device,
&tmu1_device,
#endif
};
......@@ -254,13 +155,10 @@ arch_initcall(sh7750_devices_setup);
static struct platform_device *sh7750_early_devices[] __initdata = {
&tmu0_device,
&tmu1_device,
&tmu2_device,
#if defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
defined(CONFIG_CPU_SUBTYPE_SH7751) || \
defined(CONFIG_CPU_SUBTYPE_SH7751R)
&tmu3_device,
&tmu4_device,
&tmu1_device,
#endif
};
......
......@@ -227,25 +227,18 @@ static struct platform_device scif3_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.channel_offset = 0x04,
.timer_bit = 0,
.clockevent_rating = 200,
.channels_mask = 7,
};
static struct resource tmu0_resources[] = {
[0] = {
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x400),
.flags = IORESOURCE_IRQ,
},
DEFINE_RES_MEM(0xffd80000, 0x30),
DEFINE_RES_IRQ(evt2irq(0x400)),
DEFINE_RES_IRQ(evt2irq(0x420)),
DEFINE_RES_IRQ(evt2irq(0x440)),
};
static struct platform_device tmu0_device = {
.name = "sh_tmu",
.name = "sh-tmu",
.id = 0,
.dev = {
.platform_data = &tmu0_platform_data,
......@@ -254,61 +247,6 @@ static struct platform_device tmu0_device = {
.num_resources = ARRAY_SIZE(tmu0_resources),
};
static struct sh_timer_config tmu1_platform_data = {
.channel_offset = 0x10,
.timer_bit = 1,
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x420),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu1_device = {
.name = "sh_tmu",
.id = 1,
.dev = {
.platform_data = &tmu1_platform_data,
},
.resource = tmu1_resources,
.num_resources = ARRAY_SIZE(tmu1_resources),
};
static struct sh_timer_config tmu2_platform_data = {
.channel_offset = 0x1c,
.timer_bit = 2,
};
static struct resource tmu2_resources[] = {
[0] = {
.start = 0xffd80020,
.end = 0xffd8002f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x440),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu2_device = {
.name = "sh_tmu",
.id = 2,
.dev = {
.platform_data = &tmu2_platform_data,
},
.resource = tmu2_resources,
.num_resources = ARRAY_SIZE(tmu2_resources),
};
static struct platform_device *sh7760_devices[] __initdata = {
&scif0_device,
......@@ -316,8 +254,6 @@ static struct platform_device *sh7760_devices[] __initdata = {
&scif2_device,
&scif3_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
};
static int __init sh7760_devices_setup(void)
......@@ -333,8 +269,6 @@ static struct platform_device *sh7760_early_devices[] __initdata = {
&scif2_device,
&scif3_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
};
void __init plat_early_device_setup(void)
......
......@@ -227,7 +227,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("hudi0", &mstp_clks[MSTP019]),
CLKDEV_CON_ID("ubc0", &mstp_clks[MSTP017]),
CLKDEV_CON_ID("tmu_fck", &mstp_clks[MSTP015]),
CLKDEV_CON_ID("cmt_fck", &mstp_clks[MSTP014]),
CLKDEV_ICK_ID("fck", "sh-cmt-32.0", &mstp_clks[MSTP014]),
CLKDEV_CON_ID("rwdt0", &mstp_clks[MSTP013]),
CLKDEV_CON_ID("mfi0", &mstp_clks[MSTP011]),
CLKDEV_CON_ID("flctl0", &mstp_clks[MSTP010]),
......
......@@ -225,7 +225,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("hudi0", &mstp_clks[MSTP019]),
CLKDEV_CON_ID("ubc0", &mstp_clks[MSTP017]),
CLKDEV_CON_ID("tmu_fck", &mstp_clks[MSTP015]),
CLKDEV_CON_ID("cmt_fck", &mstp_clks[MSTP014]),
CLKDEV_ICK_ID("fck", "sh-cmt-32.0", &mstp_clks[MSTP014]),
CLKDEV_CON_ID("rwdt0", &mstp_clks[MSTP013]),
CLKDEV_CON_ID("mfi0", &mstp_clks[MSTP011]),
CLKDEV_CON_ID("flctl0", &mstp_clks[MSTP010]),
......
......@@ -203,11 +203,9 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("uram0", &mstp_clks[HWBLK_URAM]),
CLKDEV_CON_ID("xymem0", &mstp_clks[HWBLK_XYMEM]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[HWBLK_TMU]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[HWBLK_TMU]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU]),
CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[HWBLK_TMU]),
CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
CLKDEV_ICK_ID("fck", "sh-cmt-32.0", &mstp_clks[HWBLK_CMT]),
CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]),
CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
......
......@@ -236,7 +236,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWAY]),
CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
CLKDEV_ICK_ID("fck", "sh-cmt-32.0", &mstp_clks[HWBLK_CMT]),
CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]),
CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[HWBLK_DMAC1]),
CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
......@@ -264,12 +264,8 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU2H0]),
CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[HWBLK_TMU0]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[HWBLK_TMU0]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU0]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[HWBLK_TMU1]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[HWBLK_TMU1]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[HWBLK_TMU1]),
CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[HWBLK_TMU0]),
CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[HWBLK_TMU1]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
......
......@@ -304,17 +304,13 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("hudi0", &mstp_clks[HWBLK_HUDI]),
CLKDEV_CON_ID("ubc0", &mstp_clks[HWBLK_UBC]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[HWBLK_TMU0]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[HWBLK_TMU0]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU0]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[HWBLK_TMU1]),
CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[HWBLK_TMU0]),
CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[HWBLK_TMU1]),
CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
CLKDEV_ICK_ID("fck", "sh-cmt-16.0", &mstp_clks[HWBLK_CMT]),
CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]),
CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[HWBLK_DMAC1]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[HWBLK_TMU1]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[HWBLK_TMU1]),
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[HWBLK_SCIF0]),
CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[HWBLK_SCIF1]),
CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[HWBLK_SCIF2]),
......
......@@ -201,15 +201,9 @@ static struct clk_lookup lookups[] = {
CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[MSTP022]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP021]),
CLKDEV_CON_ID("hscif", &mstp_clks[MSTP019]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP016]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP016]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[MSTP016]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP015]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP015]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP015]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.6", &mstp_clks[MSTP014]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.7", &mstp_clks[MSTP014]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.8", &mstp_clks[MSTP014]),
CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP016]),
CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP015]),
CLKDEV_ICK_ID("fck", "sh-tmu.2", &mstp_clks[MSTP014]),
CLKDEV_CON_ID("ssi0", &mstp_clks[MSTP012]),
CLKDEV_CON_ID("ssi1", &mstp_clks[MSTP011]),
CLKDEV_CON_ID("ssi2", &mstp_clks[MSTP010]),
......
......@@ -123,8 +123,8 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("riic6", &mstp_clks[MSTP000]),
CLKDEV_CON_ID("riic7", &mstp_clks[MSTP000]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP113]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP114]),
CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP113]),
CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP114]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP112]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP111]),
CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP110]),
......
......@@ -146,12 +146,8 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("mmcif_fck", &mstp_clks[MSTP013]),
CLKDEV_CON_ID("flctl_fck", &mstp_clks[MSTP012]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP008]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP008]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[MSTP008]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP009]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP009]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP009]),
CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP008]),
CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP009]),
CLKDEV_CON_ID("siof_fck", &mstp_clks[MSTP003]),
CLKDEV_CON_ID("hspi_fck", &mstp_clks[MSTP002]),
......
......@@ -155,18 +155,10 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("i2c1_fck", &mstp_clks[MSTP015]),
CLKDEV_CON_ID("i2c0_fck", &mstp_clks[MSTP014]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP008]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP008]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[MSTP008]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP009]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP009]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP009]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.6", &mstp_clks[MSTP010]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.7", &mstp_clks[MSTP010]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.8", &mstp_clks[MSTP010]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.9", &mstp_clks[MSTP011]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.10", &mstp_clks[MSTP011]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.11", &mstp_clks[MSTP011]),
CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP008]),
CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP009]),
CLKDEV_ICK_ID("fck", "sh-tmu.2", &mstp_clks[MSTP010]),
CLKDEV_ICK_ID("fck", "sh-tmu.3", &mstp_clks[MSTP011]),
CLKDEV_CON_ID("sdif1_fck", &mstp_clks[MSTP005]),
CLKDEV_CON_ID("sdif0_fck", &mstp_clks[MSTP004]),
......
......@@ -124,12 +124,8 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("fe1_fck", &mstp_clks[MSTP001]),
CLKDEV_CON_ID("fe0_fck", &mstp_clks[MSTP000]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.0", &mstp_clks[MSTP008]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.1", &mstp_clks[MSTP008]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[MSTP008]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.3", &mstp_clks[MSTP009]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.4", &mstp_clks[MSTP009]),
CLKDEV_ICK_ID("tmu_fck", "sh_tmu.5", &mstp_clks[MSTP009]),
CLKDEV_ICK_ID("fck", "sh-tmu.0", &mstp_clks[MSTP008]),
CLKDEV_ICK_ID("fck", "sh-tmu.1", &mstp_clks[MSTP009]),
CLKDEV_CON_ID("hudi_fck", &mstp_clks[MSTP119]),
CLKDEV_CON_ID("dmac_11_6_fck", &mstp_clks[MSTP105]),
......
......@@ -228,26 +228,16 @@ static struct platform_device jpu_device = {
};
static struct sh_timer_config cmt_platform_data = {
.channel_offset = 0x60,
.timer_bit = 5,
.clockevent_rating = 125,
.clocksource_rating = 200,
.channels_mask = 0x20,
};
static struct resource cmt_resources[] = {
[0] = {
.start = 0x044a0060,
.end = 0x044a006b,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0xf00),
.flags = IORESOURCE_IRQ,
},
DEFINE_RES_MEM(0x044a0000, 0x70),
DEFINE_RES_IRQ(evt2irq(0xf00)),
};
static struct platform_device cmt_device = {
.name = "sh_cmt",
.name = "sh-cmt-32",
.id = 0,
.dev = {
.platform_data = &cmt_platform_data,
......@@ -257,25 +247,18 @@ static struct platform_device cmt_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.channel_offset = 0x04,
.timer_bit = 0,
.clockevent_rating = 200,
.channels_mask = 7,
};
static struct resource tmu0_resources[] = {
[0] = {
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x400),
.flags = IORESOURCE_IRQ,
},
DEFINE_RES_MEM(0xffd80000, 0x2c),
DEFINE_RES_IRQ(evt2irq(0x400)),
DEFINE_RES_IRQ(evt2irq(0x420)),
DEFINE_RES_IRQ(evt2irq(0x440)),
};
static struct platform_device tmu0_device = {
.name = "sh_tmu",
.name = "sh-tmu",
.id = 0,
.dev = {
.platform_data = &tmu0_platform_data,
......@@ -284,61 +267,6 @@ static struct platform_device tmu0_device = {
.num_resources = ARRAY_SIZE(tmu0_resources),
};
static struct sh_timer_config tmu1_platform_data = {
.channel_offset = 0x10,
.timer_bit = 1,
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x420),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu1_device = {
.name = "sh_tmu",
.id = 1,
.dev = {
.platform_data = &tmu1_platform_data,
},
.resource = tmu1_resources,
.num_resources = ARRAY_SIZE(tmu1_resources),
};
static struct sh_timer_config tmu2_platform_data = {
.channel_offset = 0x1c,
.timer_bit = 2,
};
static struct resource tmu2_resources[] = {
[0] = {
.start = 0xffd80020,
.end = 0xffd8002b,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x440),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu2_device = {
.name = "sh_tmu",
.id = 2,
.dev = {
.platform_data = &tmu2_platform_data,
},
.resource = tmu2_resources,
.num_resources = ARRAY_SIZE(tmu2_resources),
};
static struct platform_device *sh7343_devices[] __initdata = {
&scif0_device,
&scif1_device,
......@@ -346,8 +274,6 @@ static struct platform_device *sh7343_devices[] __initdata = {
&scif3_device,
&cmt_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
&iic0_device,
&iic1_device,
&vpu_device,
......@@ -373,8 +299,6 @@ static struct platform_device *sh7343_early_devices[] __initdata = {
&scif3_device,
&cmt_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
};
void __init plat_early_device_setup(void)
......
......@@ -176,26 +176,16 @@ static struct platform_device veu1_device = {
};
static struct sh_timer_config cmt_platform_data = {
.channel_offset = 0x60,
.timer_bit = 5,
.clockevent_rating = 125,
.clocksource_rating = 200,
.channels_mask = 0x20,
};
static struct resource cmt_resources[] = {
[0] = {
.start = 0x044a0060,
.end = 0x044a006b,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0xf00),
.flags = IORESOURCE_IRQ,
},
DEFINE_RES_MEM(0x044a0000, 0x70),
DEFINE_RES_IRQ(evt2irq(0xf00)),
};
static struct platform_device cmt_device = {
.name = "sh_cmt",
.name = "sh-cmt-32",
.id = 0,
.dev = {
.platform_data = &cmt_platform_data,
......@@ -205,25 +195,18 @@ static struct platform_device cmt_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.channel_offset = 0x04,
.timer_bit = 0,
.clockevent_rating = 200,
.channels_mask = 7,
};
static struct resource tmu0_resources[] = {
[0] = {
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 16,
.flags = IORESOURCE_IRQ,
},
DEFINE_RES_MEM(0xffd80000, 0x2c),
DEFINE_RES_IRQ(evt2irq(0x400)),
DEFINE_RES_IRQ(evt2irq(0x420)),
DEFINE_RES_IRQ(evt2irq(0x440)),
};
static struct platform_device tmu0_device = {
.name = "sh_tmu",
.name = "sh-tmu",
.id = 0,
.dev = {
.platform_data = &tmu0_platform_data,
......@@ -232,67 +215,10 @@ static struct platform_device tmu0_device = {
.num_resources = ARRAY_SIZE(tmu0_resources),
};
static struct sh_timer_config tmu1_platform_data = {
.channel_offset = 0x10,
.timer_bit = 1,
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x420),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu1_device = {
.name = "sh_tmu",
.id = 1,
.dev = {
.platform_data = &tmu1_platform_data,
},
.resource = tmu1_resources,
.num_resources = ARRAY_SIZE(tmu1_resources),
};
static struct sh_timer_config tmu2_platform_data = {
.channel_offset = 0x1c,
.timer_bit = 2,
};
static struct resource tmu2_resources[] = {
[0] = {
.start = 0xffd80020,
.end = 0xffd8002b,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x440),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu2_device = {
.name = "sh_tmu",
.id = 2,
.dev = {
.platform_data = &tmu2_platform_data,
},
.resource = tmu2_resources,
.num_resources = ARRAY_SIZE(tmu2_resources),
};
static struct platform_device *sh7366_devices[] __initdata = {
&scif0_device,
&cmt_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
&iic_device,
&usb_host_device,
&vpu_device,
......@@ -315,8 +241,6 @@ static struct platform_device *sh7366_early_devices[] __initdata = {
&scif0_device,
&cmt_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
};
void __init plat_early_device_setup(void)
......
......@@ -413,26 +413,16 @@ static struct platform_device jpu_device = {
};
static struct sh_timer_config cmt_platform_data = {
.channel_offset = 0x60,
.timer_bit = 5,
.clockevent_rating = 125,
.clocksource_rating = 125,
.channels_mask = 0x20,
};
static struct resource cmt_resources[] = {
[0] = {
.start = 0x044a0060,
.end = 0x044a006b,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0xf00),
.flags = IORESOURCE_IRQ,
},
DEFINE_RES_MEM(0x044a0000, 0x70),
DEFINE_RES_IRQ(evt2irq(0xf00)),
};
static struct platform_device cmt_device = {
.name = "sh_cmt",
.name = "sh-cmt-32",
.id = 0,
.dev = {
.platform_data = &cmt_platform_data,
......@@ -442,25 +432,18 @@ static struct platform_device cmt_device = {
};
static struct sh_timer_config tmu0_platform_data = {
.channel_offset = 0x04,
.timer_bit = 0,
.clockevent_rating = 200,
.channels_mask = 7,
};
static struct resource tmu0_resources[] = {
[0] = {
.start = 0xffd80008,
.end = 0xffd80013,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x400),
.flags = IORESOURCE_IRQ,
},
DEFINE_RES_MEM(0xffd80000, 0x2c),
DEFINE_RES_IRQ(evt2irq(0x400)),
DEFINE_RES_IRQ(evt2irq(0x420)),
DEFINE_RES_IRQ(evt2irq(0x440)),
};
static struct platform_device tmu0_device = {
.name = "sh_tmu",
.name = "sh-tmu",
.id = 0,
.dev = {
.platform_data = &tmu0_platform_data,
......@@ -469,61 +452,6 @@ static struct platform_device tmu0_device = {
.num_resources = ARRAY_SIZE(tmu0_resources),
};
static struct sh_timer_config tmu1_platform_data = {
.channel_offset = 0x10,
.timer_bit = 1,
.clocksource_rating = 200,
};
static struct resource tmu1_resources[] = {
[0] = {
.start = 0xffd80014,
.end = 0xffd8001f,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = evt2irq(0x420),
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu1_device = {
.name = "sh_tmu",
.id = 1,
.dev = {
.platform_data = &tmu1_platform_data,
},
.resource = tmu1_resources,
.num_resources = ARRAY_SIZE(tmu1_resources),
};
static struct sh_timer_config tmu2_platform_data = {
.channel_offset = 0x1c,
.timer_bit = 2,
};
static struct resource tmu2_resources[] = {
[0] = {
.start = 0xffd80020,
.end = 0xffd8002b,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 18,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device tmu2_device = {
.name = "sh_tmu",
.id = 2,
.dev = {
.platform_data = &tmu2_platform_data,
},
.resource = tmu2_resources,
.num_resources = ARRAY_SIZE(tmu2_resources),
};
static struct siu_platform siu_platform_data = {
.dma_slave_tx_a = SHDMA_SLAVE_SIUA_TX,
.dma_slave_rx_a = SHDMA_SLAVE_SIUA_RX,
......@@ -559,8 +487,6 @@ static struct platform_device *sh7722_devices[] __initdata = {
&scif2_device,
&cmt_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
&rtc_device,
&usbf_device,
&iic_device,
......@@ -588,8 +514,6 @@ static struct platform_device *sh7722_early_devices[] __initdata = {
&scif2_device,
&cmt_device,
&tmu0_device,
&tmu1_device,
&tmu2_device,
};
void __init plat_early_device_setup(void)
......
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