Commit c6a3ea22 authored by Matt Porter's avatar Matt Porter Committed by Linus Torvalds

[PATCH] ppc32: Fix PPC440SP SRAM controller DCRs

Fixes the incorrect DCR base value for the 440SP SRAM controller.
Signed-off-by: default avatarMatt Porter <mporter@kernel.crashing.org>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 28cd1d17
...@@ -423,11 +423,7 @@ ...@@ -423,11 +423,7 @@
#define MQ0_CONFIG_SIZE_2G 0x0000c000 #define MQ0_CONFIG_SIZE_2G 0x0000c000
/* Internal SRAM Controller 440GX/440SP */ /* Internal SRAM Controller 440GX/440SP */
#ifdef CONFIG_440SP
#define DCRN_SRAM0_BASE 0x100
#else /* 440GX */
#define DCRN_SRAM0_BASE 0x000 #define DCRN_SRAM0_BASE 0x000
#endif
#define DCRN_SRAM0_SB0CR (DCRN_SRAM0_BASE + 0x020) #define DCRN_SRAM0_SB0CR (DCRN_SRAM0_BASE + 0x020)
#define DCRN_SRAM0_SB1CR (DCRN_SRAM0_BASE + 0x021) #define DCRN_SRAM0_SB1CR (DCRN_SRAM0_BASE + 0x021)
......
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