Commit c8618d16 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-3.x

* 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-3.x:
  sh: use printk_ratelimited instead of printk_ratelimit
  sh: Fix up unmet dependency warnings with USB EHCI/OHCI selects.
  sh: fix the value of sh_dmae_slave_config in setup-sh7757
  sh: fix the INTC vector for IRQ and IRL in setup-sh7757
  sh: add to select the new configuration for USB EHCI/OHCI
  sh: add platform_device of EHCI/OHCI to setup-sh7757
  sh: fix compile error using sh7757lcr_defconfig
parents 427e3df6 9ab3a15d
...@@ -348,6 +348,7 @@ config CPU_SUBTYPE_SH7720 ...@@ -348,6 +348,7 @@ config CPU_SUBTYPE_SH7720
select SYS_SUPPORTS_CMT select SYS_SUPPORTS_CMT
select ARCH_WANT_OPTIONAL_GPIOLIB select ARCH_WANT_OPTIONAL_GPIOLIB
select USB_ARCH_HAS_OHCI select USB_ARCH_HAS_OHCI
select USB_OHCI_SH if USB_OHCI_HCD
help help
Select SH7720 if you have a SH3-DSP SH7720 CPU. Select SH7720 if you have a SH3-DSP SH7720 CPU.
...@@ -357,6 +358,7 @@ config CPU_SUBTYPE_SH7721 ...@@ -357,6 +358,7 @@ config CPU_SUBTYPE_SH7721
select CPU_HAS_DSP select CPU_HAS_DSP
select SYS_SUPPORTS_CMT select SYS_SUPPORTS_CMT
select USB_ARCH_HAS_OHCI select USB_ARCH_HAS_OHCI
select USB_OHCI_SH if USB_OHCI_HCD
help help
Select SH7721 if you have a SH3-DSP SH7721 CPU. Select SH7721 if you have a SH3-DSP SH7721 CPU.
...@@ -440,6 +442,7 @@ config CPU_SUBTYPE_SH7763 ...@@ -440,6 +442,7 @@ config CPU_SUBTYPE_SH7763
bool "Support SH7763 processor" bool "Support SH7763 processor"
select CPU_SH4A select CPU_SH4A
select USB_ARCH_HAS_OHCI select USB_ARCH_HAS_OHCI
select USB_OHCI_SH if USB_OHCI_HCD
help help
Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
...@@ -467,7 +470,9 @@ config CPU_SUBTYPE_SH7786 ...@@ -467,7 +470,9 @@ config CPU_SUBTYPE_SH7786
select GENERIC_CLOCKEVENTS_BROADCAST if SMP select GENERIC_CLOCKEVENTS_BROADCAST if SMP
select ARCH_WANT_OPTIONAL_GPIOLIB select ARCH_WANT_OPTIONAL_GPIOLIB
select USB_ARCH_HAS_OHCI select USB_ARCH_HAS_OHCI
select USB_OHCI_SH if USB_OHCI_HCD
select USB_ARCH_HAS_EHCI select USB_ARCH_HAS_EHCI
select USB_EHCI_SH if USB_EHCI_HCD
config CPU_SUBTYPE_SHX3 config CPU_SUBTYPE_SHX3
bool "Support SH-X3 processor" bool "Support SH-X3 processor"
......
...@@ -9,7 +9,6 @@ CONFIG_TASK_XACCT=y ...@@ -9,7 +9,6 @@ CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_LOG_BUF_SHIFT=14 CONFIG_LOG_BUF_SHIFT=14
CONFIG_BLK_DEV_INITRD=y CONFIG_BLK_DEV_INITRD=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
# CONFIG_SYSCTL_SYSCALL is not set # CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS_ALL=y CONFIG_KALLSYMS_ALL=y
CONFIG_SLAB=y CONFIG_SLAB=y
...@@ -39,8 +38,6 @@ CONFIG_IPV6=y ...@@ -39,8 +38,6 @@ CONFIG_IPV6=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_FW_LOADER is not set # CONFIG_FW_LOADER is not set
CONFIG_MTD=y CONFIG_MTD=y
CONFIG_MTD_CONCAT=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CHAR=y CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y CONFIG_MTD_BLOCK=y
CONFIG_MTD_M25P80=y CONFIG_MTD_M25P80=y
...@@ -56,18 +53,19 @@ CONFIG_SH_ETH=y ...@@ -56,18 +53,19 @@ CONFIG_SH_ETH=y
# CONFIG_KEYBOARD_ATKBD is not set # CONFIG_KEYBOARD_ATKBD is not set
# CONFIG_MOUSE_PS2 is not set # CONFIG_MOUSE_PS2 is not set
# CONFIG_SERIO is not set # CONFIG_SERIO is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_SH_SCI=y CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=3 CONFIG_SERIAL_SH_SCI_NR_UARTS=3
CONFIG_SERIAL_SH_SCI_CONSOLE=y CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_HW_RANDOM is not set # CONFIG_HW_RANDOM is not set
CONFIG_SPI=y CONFIG_SPI=y
CONFIG_SPI_SH=y CONFIG_SPI_SH=y
# CONFIG_HWMON is not set # CONFIG_HWMON is not set
CONFIG_MFD_SH_MOBILE_SDHI=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_SH=y
CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_SH=y
CONFIG_USB_STORAGE=y CONFIG_USB_STORAGE=y
CONFIG_MMC=y CONFIG_MMC=y
CONFIG_MMC_SDHI=y CONFIG_MMC_SDHI=y
......
...@@ -183,7 +183,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = { ...@@ -183,7 +183,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
{ {
.slave_id = SHDMA_SLAVE_SCIF2_RX, .slave_id = SHDMA_SLAVE_SCIF2_RX,
.addr = 0x1f4b0014, .addr = 0x1f4b0014,
.chcr = SM_INC | 0x800 | 0x40000000 | .chcr = DM_INC | 0x800 | 0x40000000 |
TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL(XMIT_SZ_8BIT),
.mid_rid = 0x22, .mid_rid = 0x22,
}, },
...@@ -197,7 +197,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = { ...@@ -197,7 +197,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
{ {
.slave_id = SHDMA_SLAVE_SCIF3_RX, .slave_id = SHDMA_SLAVE_SCIF3_RX,
.addr = 0x1f4c0014, .addr = 0x1f4c0014,
.chcr = SM_INC | 0x800 | 0x40000000 | .chcr = DM_INC | 0x800 | 0x40000000 |
TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL(XMIT_SZ_8BIT),
.mid_rid = 0x2a, .mid_rid = 0x2a,
}, },
...@@ -211,7 +211,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = { ...@@ -211,7 +211,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
{ {
.slave_id = SHDMA_SLAVE_SCIF4_RX, .slave_id = SHDMA_SLAVE_SCIF4_RX,
.addr = 0x1f4d0014, .addr = 0x1f4d0014,
.chcr = SM_INC | 0x800 | 0x40000000 | .chcr = DM_INC | 0x800 | 0x40000000 |
TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL(XMIT_SZ_8BIT),
.mid_rid = 0x42, .mid_rid = 0x42,
}, },
...@@ -228,7 +228,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = { ...@@ -228,7 +228,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
{ {
.slave_id = SHDMA_SLAVE_RIIC0_RX, .slave_id = SHDMA_SLAVE_RIIC0_RX,
.addr = 0x1e500013, .addr = 0x1e500013,
.chcr = SM_INC | 0x800 | 0x40000000 | .chcr = DM_INC | 0x800 | 0x40000000 |
TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL(XMIT_SZ_8BIT),
.mid_rid = 0x22, .mid_rid = 0x22,
}, },
...@@ -242,7 +242,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = { ...@@ -242,7 +242,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
{ {
.slave_id = SHDMA_SLAVE_RIIC1_RX, .slave_id = SHDMA_SLAVE_RIIC1_RX,
.addr = 0x1e510013, .addr = 0x1e510013,
.chcr = SM_INC | 0x800 | 0x40000000 | .chcr = DM_INC | 0x800 | 0x40000000 |
TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL(XMIT_SZ_8BIT),
.mid_rid = 0x2a, .mid_rid = 0x2a,
}, },
...@@ -256,7 +256,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = { ...@@ -256,7 +256,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
{ {
.slave_id = SHDMA_SLAVE_RIIC2_RX, .slave_id = SHDMA_SLAVE_RIIC2_RX,
.addr = 0x1e520013, .addr = 0x1e520013,
.chcr = SM_INC | 0x800 | 0x40000000 | .chcr = DM_INC | 0x800 | 0x40000000 |
TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL(XMIT_SZ_8BIT),
.mid_rid = 0xa2, .mid_rid = 0xa2,
}, },
...@@ -265,12 +265,12 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = { ...@@ -265,12 +265,12 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
.addr = 0x1e530012, .addr = 0x1e530012,
.chcr = SM_INC | 0x800 | 0x40000000 | .chcr = SM_INC | 0x800 | 0x40000000 |
TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL(XMIT_SZ_8BIT),
.mid_rid = 0xab, .mid_rid = 0xa9,
}, },
{ {
.slave_id = SHDMA_SLAVE_RIIC3_RX, .slave_id = SHDMA_SLAVE_RIIC3_RX,
.addr = 0x1e530013, .addr = 0x1e530013,
.chcr = SM_INC | 0x800 | 0x40000000 | .chcr = DM_INC | 0x800 | 0x40000000 |
TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL(XMIT_SZ_8BIT),
.mid_rid = 0xaf, .mid_rid = 0xaf,
}, },
...@@ -279,14 +279,14 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = { ...@@ -279,14 +279,14 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
.addr = 0x1e540012, .addr = 0x1e540012,
.chcr = SM_INC | 0x800 | 0x40000000 | .chcr = SM_INC | 0x800 | 0x40000000 |
TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL(XMIT_SZ_8BIT),
.mid_rid = 0xc1, .mid_rid = 0xc5,
}, },
{ {
.slave_id = SHDMA_SLAVE_RIIC4_RX, .slave_id = SHDMA_SLAVE_RIIC4_RX,
.addr = 0x1e540013, .addr = 0x1e540013,
.chcr = SM_INC | 0x800 | 0x40000000 | .chcr = DM_INC | 0x800 | 0x40000000 |
TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL(XMIT_SZ_8BIT),
.mid_rid = 0xc2, .mid_rid = 0xc6,
}, },
}; };
...@@ -301,7 +301,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = { ...@@ -301,7 +301,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
{ {
.slave_id = SHDMA_SLAVE_RIIC5_RX, .slave_id = SHDMA_SLAVE_RIIC5_RX,
.addr = 0x1e550013, .addr = 0x1e550013,
.chcr = SM_INC | 0x800 | 0x40000000 | .chcr = DM_INC | 0x800 | 0x40000000 |
TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL(XMIT_SZ_8BIT),
.mid_rid = 0x22, .mid_rid = 0x22,
}, },
...@@ -315,7 +315,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = { ...@@ -315,7 +315,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
{ {
.slave_id = SHDMA_SLAVE_RIIC6_RX, .slave_id = SHDMA_SLAVE_RIIC6_RX,
.addr = 0x1e560013, .addr = 0x1e560013,
.chcr = SM_INC | 0x800 | 0x40000000 | .chcr = DM_INC | 0x800 | 0x40000000 |
TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL(XMIT_SZ_8BIT),
.mid_rid = 0x2a, .mid_rid = 0x2a,
}, },
...@@ -329,7 +329,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = { ...@@ -329,7 +329,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
{ {
.slave_id = SHDMA_SLAVE_RIIC7_RX, .slave_id = SHDMA_SLAVE_RIIC7_RX,
.addr = 0x1e570013, .addr = 0x1e570013,
.chcr = SM_INC | 0x800 | 0x40000000 | .chcr = DM_INC | 0x800 | 0x40000000 |
TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL(XMIT_SZ_8BIT),
.mid_rid = 0x42, .mid_rid = 0x42,
}, },
...@@ -343,7 +343,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = { ...@@ -343,7 +343,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
{ {
.slave_id = SHDMA_SLAVE_RIIC8_RX, .slave_id = SHDMA_SLAVE_RIIC8_RX,
.addr = 0x1e580013, .addr = 0x1e580013,
.chcr = SM_INC | 0x800 | 0x40000000 | .chcr = DM_INC | 0x800 | 0x40000000 |
TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL(XMIT_SZ_8BIT),
.mid_rid = 0x46, .mid_rid = 0x46,
}, },
...@@ -357,7 +357,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = { ...@@ -357,7 +357,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
{ {
.slave_id = SHDMA_SLAVE_RIIC9_RX, .slave_id = SHDMA_SLAVE_RIIC9_RX,
.addr = 0x1e590013, .addr = 0x1e590013,
.chcr = SM_INC | 0x800 | 0x40000000 | .chcr = DM_INC | 0x800 | 0x40000000 |
TS_INDEX2VAL(XMIT_SZ_8BIT), TS_INDEX2VAL(XMIT_SZ_8BIT),
.mid_rid = 0x52, .mid_rid = 0x52,
}, },
...@@ -659,6 +659,54 @@ static struct platform_device spi0_device = { ...@@ -659,6 +659,54 @@ static struct platform_device spi0_device = {
.resource = spi0_resources, .resource = spi0_resources,
}; };
static struct resource usb_ehci_resources[] = {
[0] = {
.start = 0xfe4f1000,
.end = 0xfe4f10ff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 57,
.end = 57,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device usb_ehci_device = {
.name = "sh_ehci",
.id = -1,
.dev = {
.dma_mask = &usb_ehci_device.dev.coherent_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(32),
},
.num_resources = ARRAY_SIZE(usb_ehci_resources),
.resource = usb_ehci_resources,
};
static struct resource usb_ohci_resources[] = {
[0] = {
.start = 0xfe4f1800,
.end = 0xfe4f18ff,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = 57,
.end = 57,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device usb_ohci_device = {
.name = "sh_ohci",
.id = -1,
.dev = {
.dma_mask = &usb_ohci_device.dev.coherent_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(32),
},
.num_resources = ARRAY_SIZE(usb_ohci_resources),
.resource = usb_ohci_resources,
};
static struct platform_device *sh7757_devices[] __initdata = { static struct platform_device *sh7757_devices[] __initdata = {
&scif2_device, &scif2_device,
&scif3_device, &scif3_device,
...@@ -670,6 +718,8 @@ static struct platform_device *sh7757_devices[] __initdata = { ...@@ -670,6 +718,8 @@ static struct platform_device *sh7757_devices[] __initdata = {
&dma2_device, &dma2_device,
&dma3_device, &dma3_device,
&spi0_device, &spi0_device,
&usb_ehci_device,
&usb_ohci_device,
}; };
static int __init sh7757_devices_setup(void) static int __init sh7757_devices_setup(void)
...@@ -1039,13 +1089,13 @@ static DECLARE_INTC_DESC(intc_desc, "sh7757", vectors, groups, ...@@ -1039,13 +1089,13 @@ static DECLARE_INTC_DESC(intc_desc, "sh7757", vectors, groups,
/* Support for external interrupt pins in IRQ mode */ /* Support for external interrupt pins in IRQ mode */
static struct intc_vect vectors_irq0123[] __initdata = { static struct intc_vect vectors_irq0123[] __initdata = {
INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280), INTC_VECT(IRQ0, 0x200), INTC_VECT(IRQ1, 0x240),
INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300), INTC_VECT(IRQ2, 0x280), INTC_VECT(IRQ3, 0x2c0),
}; };
static struct intc_vect vectors_irq4567[] __initdata = { static struct intc_vect vectors_irq4567[] __initdata = {
INTC_VECT(IRQ4, 0x340), INTC_VECT(IRQ5, 0x380), INTC_VECT(IRQ4, 0x300), INTC_VECT(IRQ5, 0x340),
INTC_VECT(IRQ6, 0x3c0), INTC_VECT(IRQ7, 0x200), INTC_VECT(IRQ6, 0x380), INTC_VECT(IRQ7, 0x3c0),
}; };
static struct intc_sense_reg sense_registers[] __initdata = { static struct intc_sense_reg sense_registers[] __initdata = {
...@@ -1079,14 +1129,14 @@ static struct intc_vect vectors_irl0123[] __initdata = { ...@@ -1079,14 +1129,14 @@ static struct intc_vect vectors_irl0123[] __initdata = {
}; };
static struct intc_vect vectors_irl4567[] __initdata = { static struct intc_vect vectors_irl4567[] __initdata = {
INTC_VECT(IRL4_LLLL, 0xb00), INTC_VECT(IRL4_LLLH, 0xb20), INTC_VECT(IRL4_LLLL, 0x200), INTC_VECT(IRL4_LLLH, 0x220),
INTC_VECT(IRL4_LLHL, 0xb40), INTC_VECT(IRL4_LLHH, 0xb60), INTC_VECT(IRL4_LLHL, 0x240), INTC_VECT(IRL4_LLHH, 0x260),
INTC_VECT(IRL4_LHLL, 0xb80), INTC_VECT(IRL4_LHLH, 0xba0), INTC_VECT(IRL4_LHLL, 0x280), INTC_VECT(IRL4_LHLH, 0x2a0),
INTC_VECT(IRL4_LHHL, 0xbc0), INTC_VECT(IRL4_LHHH, 0xbe0), INTC_VECT(IRL4_LHHL, 0x2c0), INTC_VECT(IRL4_LHHH, 0x2e0),
INTC_VECT(IRL4_HLLL, 0xc00), INTC_VECT(IRL4_HLLH, 0xc20), INTC_VECT(IRL4_HLLL, 0x300), INTC_VECT(IRL4_HLLH, 0x320),
INTC_VECT(IRL4_HLHL, 0xc40), INTC_VECT(IRL4_HLHH, 0xc60), INTC_VECT(IRL4_HLHL, 0x340), INTC_VECT(IRL4_HLHH, 0x360),
INTC_VECT(IRL4_HHLL, 0xc80), INTC_VECT(IRL4_HHLH, 0xca0), INTC_VECT(IRL4_HHLL, 0x380), INTC_VECT(IRL4_HHLH, 0x3a0),
INTC_VECT(IRL4_HHHL, 0xcc0), INTC_VECT(IRL4_HHHL, 0x3c0),
}; };
static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7757-irl0123", vectors_irl0123, static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7757-irl0123", vectors_irl0123,
......
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
#include <linux/seq_file.h> #include <linux/seq_file.h>
#include <linux/ftrace.h> #include <linux/ftrace.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/ratelimit.h>
#include <asm/processor.h> #include <asm/processor.h>
#include <asm/machvec.h> #include <asm/machvec.h>
#include <asm/uaccess.h> #include <asm/uaccess.h>
...@@ -268,9 +269,8 @@ void migrate_irqs(void) ...@@ -268,9 +269,8 @@ void migrate_irqs(void)
unsigned int newcpu = cpumask_any_and(data->affinity, unsigned int newcpu = cpumask_any_and(data->affinity,
cpu_online_mask); cpu_online_mask);
if (newcpu >= nr_cpu_ids) { if (newcpu >= nr_cpu_ids) {
if (printk_ratelimit()) pr_info_ratelimited("IRQ%u no longer affine to CPU%u\n",
printk(KERN_INFO "IRQ%u no longer affine to CPU%u\n", irq, cpu);
irq, cpu);
cpumask_setall(data->affinity); cpumask_setall(data->affinity);
newcpu = cpumask_any_and(data->affinity, newcpu = cpumask_any_and(data->affinity,
......
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
#include <linux/seq_file.h> #include <linux/seq_file.h>
#include <linux/proc_fs.h> #include <linux/proc_fs.h>
#include <linux/uaccess.h> #include <linux/uaccess.h>
#include <linux/ratelimit.h>
#include <asm/alignment.h> #include <asm/alignment.h>
#include <asm/processor.h> #include <asm/processor.h>
...@@ -95,13 +96,13 @@ int set_unalign_ctl(struct task_struct *tsk, unsigned int val) ...@@ -95,13 +96,13 @@ int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
void unaligned_fixups_notify(struct task_struct *tsk, insn_size_t insn, void unaligned_fixups_notify(struct task_struct *tsk, insn_size_t insn,
struct pt_regs *regs) struct pt_regs *regs)
{ {
if (user_mode(regs) && (se_usermode & UM_WARN) && printk_ratelimit()) if (user_mode(regs) && (se_usermode & UM_WARN))
pr_notice("Fixing up unaligned userspace access " pr_notice_ratelimited("Fixing up unaligned userspace access "
"in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
tsk->comm, task_pid_nr(tsk), tsk->comm, task_pid_nr(tsk),
(void *)instruction_pointer(regs), insn); (void *)instruction_pointer(regs), insn);
else if (se_kernmode_warn && printk_ratelimit()) else if (se_kernmode_warn)
pr_notice("Fixing up unaligned kernel access " pr_notice_ratelimited("Fixing up unaligned kernel access "
"in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
tsk->comm, task_pid_nr(tsk), tsk->comm, task_pid_nr(tsk),
(void *)instruction_pointer(regs), insn); (void *)instruction_pointer(regs), insn);
......
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