Commit c8d15edc authored by Alex Deucher's avatar Alex Deucher

drm/radeon: fix bank tiling parameters on evergreen

Handle the 16 bank case.
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
parent dca571a6
...@@ -1986,10 +1986,18 @@ static void evergreen_gpu_init(struct radeon_device *rdev) ...@@ -1986,10 +1986,18 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
if (rdev->flags & RADEON_IS_IGP) if (rdev->flags & RADEON_IS_IGP)
rdev->config.evergreen.tile_config |= 1 << 4; rdev->config.evergreen.tile_config |= 1 << 4;
else { else {
if ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) switch ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) {
rdev->config.evergreen.tile_config |= 1 << 4; case 0: /* four banks */
else
rdev->config.evergreen.tile_config |= 0 << 4; rdev->config.evergreen.tile_config |= 0 << 4;
break;
case 1: /* eight banks */
rdev->config.evergreen.tile_config |= 1 << 4;
break;
case 2: /* sixteen banks */
default:
rdev->config.evergreen.tile_config |= 2 << 4;
break;
}
} }
rdev->config.evergreen.tile_config |= 0 << 8; rdev->config.evergreen.tile_config |= 0 << 8;
rdev->config.evergreen.tile_config |= rdev->config.evergreen.tile_config |=
......
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