Commit c93f54cf authored by Daniel Vetter's avatar Daniel Vetter

drm/i915: pixel multiplier readout support for pch ports

Now that we painstakingly track the shared pch dplls we can finally
implement pixel mutliplier readout support for pch ports, too.

v2: Undo the temporary hack to disable the sdvo pixel multiplier
cross-checking.

Cc: Imre Deak <imre.deak@intel.com>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 911bdf0a
...@@ -5815,10 +5815,6 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc, ...@@ -5815,10 +5815,6 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
ironlake_get_fdi_m_n_config(crtc, pipe_config); ironlake_get_fdi_m_n_config(crtc, pipe_config);
/* XXX: Can't properly read out the pch dpll pixel multiplier
* since we don't have state tracking for pch clocks yet. */
pipe_config->pixel_multiplier = 1;
if (HAS_PCH_IBX(dev_priv->dev)) { if (HAS_PCH_IBX(dev_priv->dev)) {
pipe_config->shared_dpll = crtc->pipe; pipe_config->shared_dpll = crtc->pipe;
} else { } else {
...@@ -5833,6 +5829,11 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc, ...@@ -5833,6 +5829,11 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
WARN_ON(!pll->get_hw_state(dev_priv, pll, WARN_ON(!pll->get_hw_state(dev_priv, pll,
&pipe_config->dpll_hw_state)); &pipe_config->dpll_hw_state));
tmp = pipe_config->dpll_hw_state.dpll;
pipe_config->pixel_multiplier =
((tmp & PLL_REF_SDVO_HDMI_MULTIPLIER_MASK)
>> PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT) + 1;
} else { } else {
pipe_config->pixel_multiplier = 1; pipe_config->pixel_multiplier = 1;
} }
...@@ -8083,8 +8084,7 @@ intel_pipe_config_compare(struct drm_device *dev, ...@@ -8083,8 +8084,7 @@ intel_pipe_config_compare(struct drm_device *dev,
PIPE_CONF_CHECK_I(adjusted_mode.crtc_vsync_start); PIPE_CONF_CHECK_I(adjusted_mode.crtc_vsync_start);
PIPE_CONF_CHECK_I(adjusted_mode.crtc_vsync_end); PIPE_CONF_CHECK_I(adjusted_mode.crtc_vsync_end);
if (!HAS_PCH_SPLIT(dev)) PIPE_CONF_CHECK_I(pixel_multiplier);
PIPE_CONF_CHECK_I(pixel_multiplier);
PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags, PIPE_CONF_CHECK_FLAGS(adjusted_mode.flags,
DRM_MODE_FLAG_INTERLACE); DRM_MODE_FLAG_INTERLACE);
......
...@@ -1370,9 +1370,6 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder, ...@@ -1370,9 +1370,6 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
break; break;
} }
if(HAS_PCH_SPLIT(dev))
return; /* no pixel multiplier readout support yet */
WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier, WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
"SDVO pixel multiplier mismatch, port: %i, encoder: %i\n", "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
pipe_config->pixel_multiplier, encoder_pixel_multiplier); pipe_config->pixel_multiplier, encoder_pixel_multiplier);
......
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