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Commit c9c50dfd authored by Kunihiko Hayashi's avatar Kunihiko Hayashi Committed by Arnd Bergmann
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ARM: dts: uniphier: Use GIC interrupt definitions 

Use human-readable definitions for GIC interrupt type and flag, instead of
hard-coding the numbers. No functional change.
Signed-off-by: default avatarKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/20220913042249.4708-6-hayashi.kunihiko@socionext.com'
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 888c7017
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Showing with 163 additions and 121 deletions
arch/arm/boot/dts/uniphier-ld4-ref.dts
View file @ c9c50dfd
...@@ -36,11 +36,11 @@ memory@80000000 { ...@@ -36,11 +36,11 @@ memory@80000000 {
}; };
&ethsc { &ethsc {
interrupts = <1 8>; interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
}; };
&serialsc { &serialsc {
interrupts = <1 8>; interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
}; };
&serial0 { &serial0 {
......
arch/arm/boot/dts/uniphier-ld4.dtsi
View file @ c9c50dfd
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
// Author: Masahiro Yamada <yamada.masahiro@socionext.com> // Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/uniphier-gpio.h> #include <dt-bindings/gpio/uniphier-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ { / {
compatible = "socionext,uniphier-ld4"; compatible = "socionext,uniphier-ld4";
...@@ -55,7 +56,8 @@ l2: cache-controller@500c0000 { ...@@ -55,7 +56,8 @@ l2: cache-controller@500c0000 {
compatible = "socionext,uniphier-system-cache"; compatible = "socionext,uniphier-system-cache";
reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
<0x506c0000 0x400>; <0x506c0000 0x400>;
interrupts = <0 174 4>, <0 175 4>; interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
cache-unified; cache-unified;
cache-size = <(512 * 1024)>; cache-size = <(512 * 1024)>;
cache-sets = <256>; cache-sets = <256>;
...@@ -69,7 +71,7 @@ spi: spi@54006000 { ...@@ -69,7 +71,7 @@ spi: spi@54006000 {
reg = <0x54006000 0x100>; reg = <0x54006000 0x100>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 39 4>; interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>; pinctrl-0 = <&pinctrl_spi0>;
clocks = <&peri_clk 11>; clocks = <&peri_clk 11>;
...@@ -80,7 +82,7 @@ serial0: serial@54006800 { ...@@ -80,7 +82,7 @@ serial0: serial@54006800 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006800 0x40>; reg = <0x54006800 0x40>;
interrupts = <0 33 4>; interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>; pinctrl-0 = <&pinctrl_uart0>;
clocks = <&peri_clk 0>; clocks = <&peri_clk 0>;
...@@ -91,7 +93,7 @@ serial1: serial@54006900 { ...@@ -91,7 +93,7 @@ serial1: serial@54006900 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006900 0x40>; reg = <0x54006900 0x40>;
interrupts = <0 35 4>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>; pinctrl-0 = <&pinctrl_uart1>;
clocks = <&peri_clk 1>; clocks = <&peri_clk 1>;
...@@ -102,7 +104,7 @@ serial2: serial@54006a00 { ...@@ -102,7 +104,7 @@ serial2: serial@54006a00 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006a00 0x40>; reg = <0x54006a00 0x40>;
interrupts = <0 37 4>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>; pinctrl-0 = <&pinctrl_uart2>;
clocks = <&peri_clk 2>; clocks = <&peri_clk 2>;
...@@ -113,7 +115,7 @@ serial3: serial@54006b00 { ...@@ -113,7 +115,7 @@ serial3: serial@54006b00 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006b00 0x40>; reg = <0x54006b00 0x40>;
interrupts = <0 29 4>; interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>; pinctrl-0 = <&pinctrl_uart3>;
clocks = <&peri_clk 3>; clocks = <&peri_clk 3>;
...@@ -140,7 +142,7 @@ i2c0: i2c@58400000 { ...@@ -140,7 +142,7 @@ i2c0: i2c@58400000 {
reg = <0x58400000 0x40>; reg = <0x58400000 0x40>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 41 1>; interrupts = <GIC_SPI 41 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0>; pinctrl-0 = <&pinctrl_i2c0>;
clocks = <&peri_clk 4>; clocks = <&peri_clk 4>;
...@@ -154,7 +156,7 @@ i2c1: i2c@58480000 { ...@@ -154,7 +156,7 @@ i2c1: i2c@58480000 {
reg = <0x58480000 0x40>; reg = <0x58480000 0x40>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 42 1>; interrupts = <GIC_SPI 42 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>; pinctrl-0 = <&pinctrl_i2c1>;
clocks = <&peri_clk 5>; clocks = <&peri_clk 5>;
...@@ -168,7 +170,7 @@ i2c2: i2c@58500000 { ...@@ -168,7 +170,7 @@ i2c2: i2c@58500000 {
reg = <0x58500000 0x40>; reg = <0x58500000 0x40>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 43 1>; interrupts = <GIC_SPI 43 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>; pinctrl-0 = <&pinctrl_i2c2>;
clocks = <&peri_clk 6>; clocks = <&peri_clk 6>;
...@@ -182,7 +184,7 @@ i2c3: i2c@58580000 { ...@@ -182,7 +184,7 @@ i2c3: i2c@58580000 {
reg = <0x58580000 0x40>; reg = <0x58580000 0x40>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 44 1>; interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>; pinctrl-0 = <&pinctrl_i2c3>;
clocks = <&peri_clk 7>; clocks = <&peri_clk 7>;
...@@ -240,8 +242,13 @@ peri_rst: reset { ...@@ -240,8 +242,13 @@ peri_rst: reset {
dmac: dma-controller@5a000000 { dmac: dma-controller@5a000000 {
compatible = "socionext,uniphier-mio-dmac"; compatible = "socionext,uniphier-mio-dmac";
reg = <0x5a000000 0x1000>; reg = <0x5a000000 0x1000>;
interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
<0 71 4>, <0 72 4>, <0 73 4>; <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mio_clk 7>; clocks = <&mio_clk 7>;
resets = <&mio_rst 7>; resets = <&mio_rst 7>;
#dma-cells = <1>; #dma-cells = <1>;
...@@ -251,7 +258,7 @@ sd: mmc@5a400000 { ...@@ -251,7 +258,7 @@ sd: mmc@5a400000 {
compatible = "socionext,uniphier-sd-v2.91"; compatible = "socionext,uniphier-sd-v2.91";
status = "disabled"; status = "disabled";
reg = <0x5a400000 0x200>; reg = <0x5a400000 0x200>;
interrupts = <0 76 4>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default", "uhs"; pinctrl-names = "default", "uhs";
pinctrl-0 = <&pinctrl_sd>; pinctrl-0 = <&pinctrl_sd>;
pinctrl-1 = <&pinctrl_sd_uhs>; pinctrl-1 = <&pinctrl_sd_uhs>;
...@@ -271,7 +278,7 @@ emmc: mmc@5a500000 { ...@@ -271,7 +278,7 @@ emmc: mmc@5a500000 {
compatible = "socionext,uniphier-sd-v2.91"; compatible = "socionext,uniphier-sd-v2.91";
status = "disabled"; status = "disabled";
reg = <0x5a500000 0x200>; reg = <0x5a500000 0x200>;
interrupts = <0 78 4>; interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc>; pinctrl-0 = <&pinctrl_emmc>;
clocks = <&mio_clk 1>; clocks = <&mio_clk 1>;
...@@ -289,7 +296,7 @@ usb0: usb@5a800100 { ...@@ -289,7 +296,7 @@ usb0: usb@5a800100 {
compatible = "socionext,uniphier-ehci", "generic-ehci"; compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled"; status = "disabled";
reg = <0x5a800100 0x100>; reg = <0x5a800100 0x100>;
interrupts = <0 80 4>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0>; pinctrl-0 = <&pinctrl_usb0>;
clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
...@@ -303,7 +310,7 @@ usb1: usb@5a810100 { ...@@ -303,7 +310,7 @@ usb1: usb@5a810100 {
compatible = "socionext,uniphier-ehci", "generic-ehci"; compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled"; status = "disabled";
reg = <0x5a810100 0x100>; reg = <0x5a810100 0x100>;
interrupts = <0 81 4>; interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1>; pinctrl-0 = <&pinctrl_usb1>;
clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
...@@ -317,7 +324,7 @@ usb2: usb@5a820100 { ...@@ -317,7 +324,7 @@ usb2: usb@5a820100 {
compatible = "socionext,uniphier-ehci", "generic-ehci"; compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled"; status = "disabled";
reg = <0x5a820100 0x100>; reg = <0x5a820100 0x100>;
interrupts = <0 82 4>; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2>; pinctrl-0 = <&pinctrl_usb2>;
clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>, clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>,
...@@ -358,14 +365,16 @@ efuse@130 { ...@@ -358,14 +365,16 @@ efuse@130 {
timer@60000200 { timer@60000200 {
compatible = "arm,cortex-a9-global-timer"; compatible = "arm,cortex-a9-global-timer";
reg = <0x60000200 0x20>; reg = <0x60000200 0x20>;
interrupts = <1 11 0x104>; interrupts = <GIC_PPI 11
(GIC_CPU_MASK_RAW(1) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&arm_timer_clk>; clocks = <&arm_timer_clk>;
}; };
timer@60000600 { timer@60000600 {
compatible = "arm,cortex-a9-twd-timer"; compatible = "arm,cortex-a9-twd-timer";
reg = <0x60000600 0x20>; reg = <0x60000600 0x20>;
interrupts = <1 13 0x104>; interrupts = <GIC_PPI 13
(GIC_CPU_MASK_RAW(1) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&arm_timer_clk>; clocks = <&arm_timer_clk>;
}; };
...@@ -407,7 +416,7 @@ nand: nand-controller@68000000 { ...@@ -407,7 +416,7 @@ nand: nand-controller@68000000 {
reg = <0x68000000 0x20>, <0x68100000 0x1000>; reg = <0x68000000 0x20>, <0x68100000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 65 4>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>; pinctrl-0 = <&pinctrl_nand>;
clock-names = "nand", "nand_x", "ecc"; clock-names = "nand", "nand_x", "ecc";
......
arch/arm/boot/dts/uniphier-ld6b-ref.dts
View file @ c9c50dfd
...@@ -40,11 +40,11 @@ memory@80000000 { ...@@ -40,11 +40,11 @@ memory@80000000 {
}; };
&ethsc { &ethsc {
interrupts = <4 8>; interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
}; };
&serialsc { &serialsc {
interrupts = <4 8>; interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
}; };
&serial0 { &serial0 {
......
arch/arm/boot/dts/uniphier-pro4-ref.dts
View file @ c9c50dfd
...@@ -39,11 +39,11 @@ memory@80000000 { ...@@ -39,11 +39,11 @@ memory@80000000 {
}; };
&ethsc { &ethsc {
interrupts = <2 8>; interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
}; };
&serialsc { &serialsc {
interrupts = <2 8>; interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
}; };
&serial0 { &serial0 {
......
arch/arm/boot/dts/uniphier-pro4.dtsi
View file @ c9c50dfd
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
// Author: Masahiro Yamada <yamada.masahiro@socionext.com> // Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/uniphier-gpio.h> #include <dt-bindings/gpio/uniphier-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ { / {
compatible = "socionext,uniphier-pro4"; compatible = "socionext,uniphier-pro4";
...@@ -63,7 +64,8 @@ l2: cache-controller@500c0000 { ...@@ -63,7 +64,8 @@ l2: cache-controller@500c0000 {
compatible = "socionext,uniphier-system-cache"; compatible = "socionext,uniphier-system-cache";
reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
<0x506c0000 0x400>; <0x506c0000 0x400>;
interrupts = <0 174 4>, <0 175 4>; interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
cache-unified; cache-unified;
cache-size = <(768 * 1024)>; cache-size = <(768 * 1024)>;
cache-sets = <256>; cache-sets = <256>;
...@@ -77,7 +79,7 @@ spi0: spi@54006000 { ...@@ -77,7 +79,7 @@ spi0: spi@54006000 {
reg = <0x54006000 0x100>; reg = <0x54006000 0x100>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 39 4>; interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>; pinctrl-0 = <&pinctrl_spi0>;
clocks = <&peri_clk 11>; clocks = <&peri_clk 11>;
...@@ -88,7 +90,7 @@ serial0: serial@54006800 { ...@@ -88,7 +90,7 @@ serial0: serial@54006800 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006800 0x40>; reg = <0x54006800 0x40>;
interrupts = <0 33 4>; interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>; pinctrl-0 = <&pinctrl_uart0>;
clocks = <&peri_clk 0>; clocks = <&peri_clk 0>;
...@@ -99,7 +101,7 @@ serial1: serial@54006900 { ...@@ -99,7 +101,7 @@ serial1: serial@54006900 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006900 0x40>; reg = <0x54006900 0x40>;
interrupts = <0 35 4>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>; pinctrl-0 = <&pinctrl_uart1>;
clocks = <&peri_clk 1>; clocks = <&peri_clk 1>;
...@@ -110,7 +112,7 @@ serial2: serial@54006a00 { ...@@ -110,7 +112,7 @@ serial2: serial@54006a00 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006a00 0x40>; reg = <0x54006a00 0x40>;
interrupts = <0 37 4>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>; pinctrl-0 = <&pinctrl_uart2>;
clocks = <&peri_clk 2>; clocks = <&peri_clk 2>;
...@@ -121,7 +123,7 @@ serial3: serial@54006b00 { ...@@ -121,7 +123,7 @@ serial3: serial@54006b00 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006b00 0x40>; reg = <0x54006b00 0x40>;
interrupts = <0 177 4>; interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>; pinctrl-0 = <&pinctrl_uart3>;
clocks = <&peri_clk 3>; clocks = <&peri_clk 3>;
...@@ -148,7 +150,7 @@ i2c0: i2c@58780000 { ...@@ -148,7 +150,7 @@ i2c0: i2c@58780000 {
reg = <0x58780000 0x80>; reg = <0x58780000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 41 4>; interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0>; pinctrl-0 = <&pinctrl_i2c0>;
clocks = <&peri_clk 4>; clocks = <&peri_clk 4>;
...@@ -162,7 +164,7 @@ i2c1: i2c@58781000 { ...@@ -162,7 +164,7 @@ i2c1: i2c@58781000 {
reg = <0x58781000 0x80>; reg = <0x58781000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 42 4>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>; pinctrl-0 = <&pinctrl_i2c1>;
clocks = <&peri_clk 5>; clocks = <&peri_clk 5>;
...@@ -176,7 +178,7 @@ i2c2: i2c@58782000 { ...@@ -176,7 +178,7 @@ i2c2: i2c@58782000 {
reg = <0x58782000 0x80>; reg = <0x58782000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 43 4>; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>; pinctrl-0 = <&pinctrl_i2c2>;
clocks = <&peri_clk 6>; clocks = <&peri_clk 6>;
...@@ -190,7 +192,7 @@ i2c3: i2c@58783000 { ...@@ -190,7 +192,7 @@ i2c3: i2c@58783000 {
reg = <0x58783000 0x80>; reg = <0x58783000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 44 4>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>; pinctrl-0 = <&pinctrl_i2c3>;
clocks = <&peri_clk 7>; clocks = <&peri_clk 7>;
...@@ -206,7 +208,7 @@ i2c5: i2c@58785000 { ...@@ -206,7 +208,7 @@ i2c5: i2c@58785000 {
reg = <0x58785000 0x80>; reg = <0x58785000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 25 4>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&peri_clk 9>; clocks = <&peri_clk 9>;
resets = <&peri_rst 9>; resets = <&peri_rst 9>;
clock-frequency = <400000>; clock-frequency = <400000>;
...@@ -218,7 +220,7 @@ i2c6: i2c@58786000 { ...@@ -218,7 +220,7 @@ i2c6: i2c@58786000 {
reg = <0x58786000 0x80>; reg = <0x58786000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 26 4>; interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&peri_clk 10>; clocks = <&peri_clk 10>;
resets = <&peri_rst 10>; resets = <&peri_rst 10>;
clock-frequency = <400000>; clock-frequency = <400000>;
...@@ -274,8 +276,14 @@ peri_rst: reset { ...@@ -274,8 +276,14 @@ peri_rst: reset {
dmac: dma-controller@5a000000 { dmac: dma-controller@5a000000 {
compatible = "socionext,uniphier-mio-dmac"; compatible = "socionext,uniphier-mio-dmac";
reg = <0x5a000000 0x1000>; reg = <0x5a000000 0x1000>;
interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
<0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>; <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mio_clk 7>; clocks = <&mio_clk 7>;
resets = <&mio_rst 7>; resets = <&mio_rst 7>;
#dma-cells = <1>; #dma-cells = <1>;
...@@ -285,7 +293,7 @@ sd: mmc@5a400000 { ...@@ -285,7 +293,7 @@ sd: mmc@5a400000 {
compatible = "socionext,uniphier-sd-v2.91"; compatible = "socionext,uniphier-sd-v2.91";
status = "disabled"; status = "disabled";
reg = <0x5a400000 0x200>; reg = <0x5a400000 0x200>;
interrupts = <0 76 4>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default", "uhs"; pinctrl-names = "default", "uhs";
pinctrl-0 = <&pinctrl_sd>; pinctrl-0 = <&pinctrl_sd>;
pinctrl-1 = <&pinctrl_sd_uhs>; pinctrl-1 = <&pinctrl_sd_uhs>;
...@@ -305,7 +313,7 @@ emmc: mmc@5a500000 { ...@@ -305,7 +313,7 @@ emmc: mmc@5a500000 {
compatible = "socionext,uniphier-sd-v2.91"; compatible = "socionext,uniphier-sd-v2.91";
status = "disabled"; status = "disabled";
reg = <0x5a500000 0x200>; reg = <0x5a500000 0x200>;
interrupts = <0 78 4>; interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc>; pinctrl-0 = <&pinctrl_emmc>;
clocks = <&mio_clk 1>; clocks = <&mio_clk 1>;
...@@ -323,7 +331,7 @@ sd1: mmc@5a600000 { ...@@ -323,7 +331,7 @@ sd1: mmc@5a600000 {
compatible = "socionext,uniphier-sd-v2.91"; compatible = "socionext,uniphier-sd-v2.91";
status = "disabled"; status = "disabled";
reg = <0x5a600000 0x200>; reg = <0x5a600000 0x200>;
interrupts = <0 85 4>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd1>; pinctrl-0 = <&pinctrl_sd1>;
clocks = <&mio_clk 2>; clocks = <&mio_clk 2>;
...@@ -339,7 +347,7 @@ usb2: usb@5a800100 { ...@@ -339,7 +347,7 @@ usb2: usb@5a800100 {
compatible = "socionext,uniphier-ehci", "generic-ehci"; compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled"; status = "disabled";
reg = <0x5a800100 0x100>; reg = <0x5a800100 0x100>;
interrupts = <0 80 4>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2>; pinctrl-0 = <&pinctrl_usb2>;
clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
...@@ -355,7 +363,7 @@ usb3: usb@5a810100 { ...@@ -355,7 +363,7 @@ usb3: usb@5a810100 {
compatible = "socionext,uniphier-ehci", "generic-ehci"; compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled"; status = "disabled";
reg = <0x5a810100 0x100>; reg = <0x5a810100 0x100>;
interrupts = <0 81 4>; interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb3>; pinctrl-0 = <&pinctrl_usb3>;
clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
...@@ -431,7 +439,7 @@ efuse@200 { ...@@ -431,7 +439,7 @@ efuse@200 {
xdmac: dma-controller@5fc10000 { xdmac: dma-controller@5fc10000 {
compatible = "socionext,uniphier-xdmac"; compatible = "socionext,uniphier-xdmac";
reg = <0x5fc10000 0x5300>; reg = <0x5fc10000 0x5300>;
interrupts = <0 188 4>; interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
dma-channels = <16>; dma-channels = <16>;
#dma-cells = <2>; #dma-cells = <2>;
}; };
...@@ -446,14 +454,16 @@ aidet: interrupt-controller@5fc20000 { ...@@ -446,14 +454,16 @@ aidet: interrupt-controller@5fc20000 {
timer@60000200 { timer@60000200 {
compatible = "arm,cortex-a9-global-timer"; compatible = "arm,cortex-a9-global-timer";
reg = <0x60000200 0x20>; reg = <0x60000200 0x20>;
interrupts = <1 11 0x304>; interrupts = <GIC_PPI 11
(GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&arm_timer_clk>; clocks = <&arm_timer_clk>;
}; };
timer@60000600 { timer@60000600 {
compatible = "arm,cortex-a9-twd-timer"; compatible = "arm,cortex-a9-twd-timer";
reg = <0x60000600 0x20>; reg = <0x60000600 0x20>;
interrupts = <1 13 0x304>; interrupts = <GIC_PPI 13
(GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&arm_timer_clk>; clocks = <&arm_timer_clk>;
}; };
...@@ -485,7 +495,7 @@ eth: ethernet@65000000 { ...@@ -485,7 +495,7 @@ eth: ethernet@65000000 {
compatible = "socionext,uniphier-pro4-ave4"; compatible = "socionext,uniphier-pro4-ave4";
status = "disabled"; status = "disabled";
reg = <0x65000000 0x8500>; reg = <0x65000000 0x8500>;
interrupts = <0 66 4>; interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>; pinctrl-0 = <&pinctrl_ether_rgmii>;
clock-names = "gio", "ether", "ether-gb", "ether-phy"; clock-names = "gio", "ether", "ether-gb", "ether-phy";
...@@ -508,7 +518,8 @@ usb0: usb@65a00000 { ...@@ -508,7 +518,8 @@ usb0: usb@65a00000 {
status = "disabled"; status = "disabled";
reg = <0x65a00000 0xcd00>; reg = <0x65a00000 0xcd00>;
interrupt-names = "host", "peripheral"; interrupt-names = "host", "peripheral";
interrupts = <0 134 4>, <0 135 4>; interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0>; pinctrl-0 = <&pinctrl_usb0>;
clock-names = "ref", "bus_early", "suspend"; clock-names = "ref", "bus_early", "suspend";
...@@ -561,7 +572,8 @@ usb1: usb@65c00000 { ...@@ -561,7 +572,8 @@ usb1: usb@65c00000 {
status = "disabled"; status = "disabled";
reg = <0x65c00000 0xcd00>; reg = <0x65c00000 0xcd00>;
interrupt-names = "host", "peripheral"; interrupt-names = "host", "peripheral";
interrupts = <0 137 4>, <0 138 4>; interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1>; pinctrl-0 = <&pinctrl_usb1>;
clock-names = "ref", "bus_early", "suspend"; clock-names = "ref", "bus_early", "suspend";
...@@ -605,7 +617,7 @@ nand: nand-controller@68000000 { ...@@ -605,7 +617,7 @@ nand: nand-controller@68000000 {
reg = <0x68000000 0x20>, <0x68100000 0x1000>; reg = <0x68000000 0x20>, <0x68100000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 65 4>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>; pinctrl-0 = <&pinctrl_nand>;
clock-names = "nand", "nand_x", "ecc"; clock-names = "nand", "nand_x", "ecc";
......
arch/arm/boot/dts/uniphier-pro5.dtsi
View file @ c9c50dfd
...@@ -5,6 +5,8 @@ ...@@ -5,6 +5,8 @@
// Copyright (C) 2015-2016 Socionext Inc. // Copyright (C) 2015-2016 Socionext Inc.
// Author: Masahiro Yamada <yamada.masahiro@socionext.com> // Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ { / {
compatible = "socionext,uniphier-pro5"; compatible = "socionext,uniphier-pro5";
#address-cells = <1>; #address-cells = <1>;
...@@ -135,7 +137,8 @@ l2: cache-controller@500c0000 { ...@@ -135,7 +137,8 @@ l2: cache-controller@500c0000 {
compatible = "socionext,uniphier-system-cache"; compatible = "socionext,uniphier-system-cache";
reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
<0x506c0000 0x400>; <0x506c0000 0x400>;
interrupts = <0 190 4>, <0 191 4>; interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
cache-unified; cache-unified;
cache-size = <(2 * 1024 * 1024)>; cache-size = <(2 * 1024 * 1024)>;
cache-sets = <512>; cache-sets = <512>;
...@@ -148,7 +151,8 @@ l3: cache-controller@500c8000 { ...@@ -148,7 +151,8 @@ l3: cache-controller@500c8000 {
compatible = "socionext,uniphier-system-cache"; compatible = "socionext,uniphier-system-cache";
reg = <0x500c8000 0x2000>, <0x503c8100 0x8>, reg = <0x500c8000 0x2000>, <0x503c8100 0x8>,
<0x506c8000 0x400>; <0x506c8000 0x400>;
interrupts = <0 174 4>, <0 175 4>; interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
cache-unified; cache-unified;
cache-size = <(2 * 1024 * 1024)>; cache-size = <(2 * 1024 * 1024)>;
cache-sets = <512>; cache-sets = <512>;
...@@ -162,7 +166,7 @@ spi0: spi@54006000 { ...@@ -162,7 +166,7 @@ spi0: spi@54006000 {
reg = <0x54006000 0x100>; reg = <0x54006000 0x100>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 39 4>; interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>; pinctrl-0 = <&pinctrl_spi0>;
clocks = <&peri_clk 11>; clocks = <&peri_clk 11>;
...@@ -175,7 +179,7 @@ spi1: spi@54006100 { ...@@ -175,7 +179,7 @@ spi1: spi@54006100 {
reg = <0x54006100 0x100>; reg = <0x54006100 0x100>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 216 4>; interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>; pinctrl-0 = <&pinctrl_spi1>;
clocks = <&peri_clk 11>; /* common with spi0 */ clocks = <&peri_clk 11>; /* common with spi0 */
...@@ -186,7 +190,7 @@ serial0: serial@54006800 { ...@@ -186,7 +190,7 @@ serial0: serial@54006800 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006800 0x40>; reg = <0x54006800 0x40>;
interrupts = <0 33 4>; interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>; pinctrl-0 = <&pinctrl_uart0>;
clocks = <&peri_clk 0>; clocks = <&peri_clk 0>;
...@@ -197,7 +201,7 @@ serial1: serial@54006900 { ...@@ -197,7 +201,7 @@ serial1: serial@54006900 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006900 0x40>; reg = <0x54006900 0x40>;
interrupts = <0 35 4>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>; pinctrl-0 = <&pinctrl_uart1>;
clocks = <&peri_clk 1>; clocks = <&peri_clk 1>;
...@@ -208,7 +212,7 @@ serial2: serial@54006a00 { ...@@ -208,7 +212,7 @@ serial2: serial@54006a00 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006a00 0x40>; reg = <0x54006a00 0x40>;
interrupts = <0 37 4>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>; pinctrl-0 = <&pinctrl_uart2>;
clocks = <&peri_clk 2>; clocks = <&peri_clk 2>;
...@@ -219,7 +223,7 @@ serial3: serial@54006b00 { ...@@ -219,7 +223,7 @@ serial3: serial@54006b00 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006b00 0x40>; reg = <0x54006b00 0x40>;
interrupts = <0 177 4>; interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>; pinctrl-0 = <&pinctrl_uart3>;
clocks = <&peri_clk 3>; clocks = <&peri_clk 3>;
...@@ -246,7 +250,7 @@ i2c0: i2c@58780000 { ...@@ -246,7 +250,7 @@ i2c0: i2c@58780000 {
reg = <0x58780000 0x80>; reg = <0x58780000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 41 4>; interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0>; pinctrl-0 = <&pinctrl_i2c0>;
clocks = <&peri_clk 4>; clocks = <&peri_clk 4>;
...@@ -260,7 +264,7 @@ i2c1: i2c@58781000 { ...@@ -260,7 +264,7 @@ i2c1: i2c@58781000 {
reg = <0x58781000 0x80>; reg = <0x58781000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 42 4>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>; pinctrl-0 = <&pinctrl_i2c1>;
clocks = <&peri_clk 5>; clocks = <&peri_clk 5>;
...@@ -274,7 +278,7 @@ i2c2: i2c@58782000 { ...@@ -274,7 +278,7 @@ i2c2: i2c@58782000 {
reg = <0x58782000 0x80>; reg = <0x58782000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 43 4>; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>; pinctrl-0 = <&pinctrl_i2c2>;
clocks = <&peri_clk 6>; clocks = <&peri_clk 6>;
...@@ -288,7 +292,7 @@ i2c3: i2c@58783000 { ...@@ -288,7 +292,7 @@ i2c3: i2c@58783000 {
reg = <0x58783000 0x80>; reg = <0x58783000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 44 4>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>; pinctrl-0 = <&pinctrl_i2c3>;
clocks = <&peri_clk 7>; clocks = <&peri_clk 7>;
...@@ -304,7 +308,7 @@ i2c5: i2c@58785000 { ...@@ -304,7 +308,7 @@ i2c5: i2c@58785000 {
reg = <0x58785000 0x80>; reg = <0x58785000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 25 4>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&peri_clk 9>; clocks = <&peri_clk 9>;
resets = <&peri_rst 9>; resets = <&peri_rst 9>;
clock-frequency = <400000>; clock-frequency = <400000>;
...@@ -316,7 +320,7 @@ i2c6: i2c@58786000 { ...@@ -316,7 +320,7 @@ i2c6: i2c@58786000 {
reg = <0x58786000 0x80>; reg = <0x58786000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 26 4>; interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&peri_clk 10>; clocks = <&peri_clk 10>;
resets = <&peri_rst 10>; resets = <&peri_rst 10>;
clock-frequency = <400000>; clock-frequency = <400000>;
...@@ -415,7 +419,7 @@ efuse@400 { ...@@ -415,7 +419,7 @@ efuse@400 {
xdmac: dma-controller@5fc10000 { xdmac: dma-controller@5fc10000 {
compatible = "socionext,uniphier-xdmac"; compatible = "socionext,uniphier-xdmac";
reg = <0x5fc10000 0x5300>; reg = <0x5fc10000 0x5300>;
interrupts = <0 188 4>; interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
dma-channels = <16>; dma-channels = <16>;
#dma-cells = <2>; #dma-cells = <2>;
}; };
...@@ -430,14 +434,16 @@ aidet: interrupt-controller@5fc20000 { ...@@ -430,14 +434,16 @@ aidet: interrupt-controller@5fc20000 {
timer@60000200 { timer@60000200 {
compatible = "arm,cortex-a9-global-timer"; compatible = "arm,cortex-a9-global-timer";
reg = <0x60000200 0x20>; reg = <0x60000200 0x20>;
interrupts = <1 11 0x304>; interrupts = <GIC_PPI 11
(GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&arm_timer_clk>; clocks = <&arm_timer_clk>;
}; };
timer@60000600 { timer@60000600 {
compatible = "arm,cortex-a9-twd-timer"; compatible = "arm,cortex-a9-twd-timer";
reg = <0x60000600 0x20>; reg = <0x60000600 0x20>;
interrupts = <1 13 0x304>; interrupts = <GIC_PPI 13
(GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&arm_timer_clk>; clocks = <&arm_timer_clk>;
}; };
...@@ -470,7 +476,7 @@ usb0: usb@65a00000 { ...@@ -470,7 +476,7 @@ usb0: usb@65a00000 {
status = "disabled"; status = "disabled";
reg = <0x65a00000 0xcd00>; reg = <0x65a00000 0xcd00>;
interrupt-names = "host"; interrupt-names = "host";
interrupts = <0 134 4>; interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0>; pinctrl-0 = <&pinctrl_usb0>;
clock-names = "ref", "bus_early", "suspend"; clock-names = "ref", "bus_early", "suspend";
...@@ -534,7 +540,7 @@ usb1: usb@65c00000 { ...@@ -534,7 +540,7 @@ usb1: usb@65c00000 {
status = "disabled"; status = "disabled";
reg = <0x65c00000 0xcd00>; reg = <0x65c00000 0xcd00>;
interrupt-names = "host"; interrupt-names = "host";
interrupts = <0 137 4>; interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb2>; pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb2>;
clock-names = "ref", "bus_early", "suspend"; clock-names = "ref", "bus_early", "suspend";
...@@ -650,7 +656,7 @@ nand: nand-controller@68000000 { ...@@ -650,7 +656,7 @@ nand: nand-controller@68000000 {
reg = <0x68000000 0x20>, <0x68100000 0x1000>; reg = <0x68000000 0x20>, <0x68100000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 65 4>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>; pinctrl-0 = <&pinctrl_nand>;
clock-names = "nand", "nand_x", "ecc"; clock-names = "nand", "nand_x", "ecc";
...@@ -663,7 +669,7 @@ emmc: mmc@68400000 { ...@@ -663,7 +669,7 @@ emmc: mmc@68400000 {
compatible = "socionext,uniphier-sd-v3.1"; compatible = "socionext,uniphier-sd-v3.1";
status = "disabled"; status = "disabled";
reg = <0x68400000 0x800>; reg = <0x68400000 0x800>;
interrupts = <0 78 4>; interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc>; pinctrl-0 = <&pinctrl_emmc>;
clocks = <&sd_clk 1>; clocks = <&sd_clk 1>;
...@@ -679,7 +685,7 @@ sd: mmc@68800000 { ...@@ -679,7 +685,7 @@ sd: mmc@68800000 {
compatible = "socionext,uniphier-sd-v3.1"; compatible = "socionext,uniphier-sd-v3.1";
status = "disabled"; status = "disabled";
reg = <0x68800000 0x800>; reg = <0x68800000 0x800>;
interrupts = <0 76 4>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default", "uhs"; pinctrl-names = "default", "uhs";
pinctrl-0 = <&pinctrl_sd>; pinctrl-0 = <&pinctrl_sd>;
pinctrl-1 = <&pinctrl_sd_uhs>; pinctrl-1 = <&pinctrl_sd_uhs>;
......
arch/arm/boot/dts/uniphier-pxs2.dtsi
View file @ c9c50dfd
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
// Author: Masahiro Yamada <yamada.masahiro@socionext.com> // Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/uniphier-gpio.h> #include <dt-bindings/gpio/uniphier-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h> #include <dt-bindings/thermal/thermal.h>
/ { / {
...@@ -161,7 +162,10 @@ l2: cache-controller@500c0000 { ...@@ -161,7 +162,10 @@ l2: cache-controller@500c0000 {
compatible = "socionext,uniphier-system-cache"; compatible = "socionext,uniphier-system-cache";
reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
<0x506c0000 0x400>; <0x506c0000 0x400>;
interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>; interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
cache-unified; cache-unified;
cache-size = <(1280 * 1024)>; cache-size = <(1280 * 1024)>;
cache-sets = <512>; cache-sets = <512>;
...@@ -175,7 +179,7 @@ spi0: spi@54006000 { ...@@ -175,7 +179,7 @@ spi0: spi@54006000 {
reg = <0x54006000 0x100>; reg = <0x54006000 0x100>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 39 4>; interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>; pinctrl-0 = <&pinctrl_spi0>;
clocks = <&peri_clk 11>; clocks = <&peri_clk 11>;
...@@ -188,7 +192,7 @@ spi1: spi@54006100 { ...@@ -188,7 +192,7 @@ spi1: spi@54006100 {
reg = <0x54006100 0x100>; reg = <0x54006100 0x100>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 216 4>; interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>; pinctrl-0 = <&pinctrl_spi1>;
clocks = <&peri_clk 12>; clocks = <&peri_clk 12>;
...@@ -199,7 +203,7 @@ serial0: serial@54006800 { ...@@ -199,7 +203,7 @@ serial0: serial@54006800 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006800 0x40>; reg = <0x54006800 0x40>;
interrupts = <0 33 4>; interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>; pinctrl-0 = <&pinctrl_uart0>;
clocks = <&peri_clk 0>; clocks = <&peri_clk 0>;
...@@ -210,7 +214,7 @@ serial1: serial@54006900 { ...@@ -210,7 +214,7 @@ serial1: serial@54006900 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006900 0x40>; reg = <0x54006900 0x40>;
interrupts = <0 35 4>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>; pinctrl-0 = <&pinctrl_uart1>;
clocks = <&peri_clk 1>; clocks = <&peri_clk 1>;
...@@ -221,7 +225,7 @@ serial2: serial@54006a00 { ...@@ -221,7 +225,7 @@ serial2: serial@54006a00 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006a00 0x40>; reg = <0x54006a00 0x40>;
interrupts = <0 37 4>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>; pinctrl-0 = <&pinctrl_uart2>;
clocks = <&peri_clk 2>; clocks = <&peri_clk 2>;
...@@ -232,7 +236,7 @@ serial3: serial@54006b00 { ...@@ -232,7 +236,7 @@ serial3: serial@54006b00 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006b00 0x40>; reg = <0x54006b00 0x40>;
interrupts = <0 177 4>; interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>; pinctrl-0 = <&pinctrl_uart3>;
clocks = <&peri_clk 3>; clocks = <&peri_clk 3>;
...@@ -259,7 +263,7 @@ gpio: gpio@55000000 { ...@@ -259,7 +263,7 @@ gpio: gpio@55000000 {
audio@56000000 { audio@56000000 {
compatible = "socionext,uniphier-pxs2-aio"; compatible = "socionext,uniphier-pxs2-aio";
reg = <0x56000000 0x80000>; reg = <0x56000000 0x80000>;
interrupts = <0 144 4>; interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ain1>, pinctrl-0 = <&pinctrl_ain1>,
<&pinctrl_ain2>, <&pinctrl_ain2>,
...@@ -317,7 +321,7 @@ i2c0: i2c@58780000 { ...@@ -317,7 +321,7 @@ i2c0: i2c@58780000 {
reg = <0x58780000 0x80>; reg = <0x58780000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 41 4>; interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0>; pinctrl-0 = <&pinctrl_i2c0>;
clocks = <&peri_clk 4>; clocks = <&peri_clk 4>;
...@@ -331,7 +335,7 @@ i2c1: i2c@58781000 { ...@@ -331,7 +335,7 @@ i2c1: i2c@58781000 {
reg = <0x58781000 0x80>; reg = <0x58781000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 42 4>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>; pinctrl-0 = <&pinctrl_i2c1>;
clocks = <&peri_clk 5>; clocks = <&peri_clk 5>;
...@@ -345,7 +349,7 @@ i2c2: i2c@58782000 { ...@@ -345,7 +349,7 @@ i2c2: i2c@58782000 {
reg = <0x58782000 0x80>; reg = <0x58782000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 43 4>; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>; pinctrl-0 = <&pinctrl_i2c2>;
clocks = <&peri_clk 6>; clocks = <&peri_clk 6>;
...@@ -359,7 +363,7 @@ i2c3: i2c@58783000 { ...@@ -359,7 +363,7 @@ i2c3: i2c@58783000 {
reg = <0x58783000 0x80>; reg = <0x58783000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 44 4>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>; pinctrl-0 = <&pinctrl_i2c3>;
clocks = <&peri_clk 7>; clocks = <&peri_clk 7>;
...@@ -373,7 +377,7 @@ i2c4: i2c@58784000 { ...@@ -373,7 +377,7 @@ i2c4: i2c@58784000 {
reg = <0x58784000 0x80>; reg = <0x58784000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 45 4>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&peri_clk 8>; clocks = <&peri_clk 8>;
resets = <&peri_rst 8>; resets = <&peri_rst 8>;
clock-frequency = <400000>; clock-frequency = <400000>;
...@@ -385,7 +389,7 @@ i2c5: i2c@58785000 { ...@@ -385,7 +389,7 @@ i2c5: i2c@58785000 {
reg = <0x58785000 0x80>; reg = <0x58785000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 25 4>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&peri_clk 9>; clocks = <&peri_clk 9>;
resets = <&peri_rst 9>; resets = <&peri_rst 9>;
clock-frequency = <400000>; clock-frequency = <400000>;
...@@ -397,7 +401,7 @@ i2c6: i2c@58786000 { ...@@ -397,7 +401,7 @@ i2c6: i2c@58786000 {
reg = <0x58786000 0x80>; reg = <0x58786000 0x80>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 26 4>; interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&peri_clk 10>; clocks = <&peri_clk 10>;
resets = <&peri_rst 10>; resets = <&peri_rst 10>;
clock-frequency = <400000>; clock-frequency = <400000>;
...@@ -454,7 +458,7 @@ emmc: mmc@5a000000 { ...@@ -454,7 +458,7 @@ emmc: mmc@5a000000 {
compatible = "socionext,uniphier-sd-v3.1.1"; compatible = "socionext,uniphier-sd-v3.1.1";
status = "disabled"; status = "disabled";
reg = <0x5a000000 0x800>; reg = <0x5a000000 0x800>;
interrupts = <0 78 4>; interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc>; pinctrl-0 = <&pinctrl_emmc>;
clocks = <&sd_clk 1>; clocks = <&sd_clk 1>;
...@@ -470,7 +474,7 @@ sd: mmc@5a400000 { ...@@ -470,7 +474,7 @@ sd: mmc@5a400000 {
compatible = "socionext,uniphier-sd-v3.1.1"; compatible = "socionext,uniphier-sd-v3.1.1";
status = "disabled"; status = "disabled";
reg = <0x5a400000 0x800>; reg = <0x5a400000 0x800>;
interrupts = <0 76 4>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default", "uhs"; pinctrl-names = "default", "uhs";
pinctrl-0 = <&pinctrl_sd>; pinctrl-0 = <&pinctrl_sd>;
pinctrl-1 = <&pinctrl_sd_uhs>; pinctrl-1 = <&pinctrl_sd_uhs>;
...@@ -515,7 +519,7 @@ efuse@200 { ...@@ -515,7 +519,7 @@ efuse@200 {
xdmac: dma-controller@5fc10000 { xdmac: dma-controller@5fc10000 {
compatible = "socionext,uniphier-xdmac"; compatible = "socionext,uniphier-xdmac";
reg = <0x5fc10000 0x5300>; reg = <0x5fc10000 0x5300>;
interrupts = <0 188 4>; interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
dma-channels = <16>; dma-channels = <16>;
#dma-cells = <2>; #dma-cells = <2>;
}; };
...@@ -530,14 +534,16 @@ aidet: interrupt-controller@5fc20000 { ...@@ -530,14 +534,16 @@ aidet: interrupt-controller@5fc20000 {
timer@60000200 { timer@60000200 {
compatible = "arm,cortex-a9-global-timer"; compatible = "arm,cortex-a9-global-timer";
reg = <0x60000200 0x20>; reg = <0x60000200 0x20>;
interrupts = <1 11 0xf04>; interrupts = <GIC_PPI 11
(GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&arm_timer_clk>; clocks = <&arm_timer_clk>;
}; };
timer@60000600 { timer@60000600 {
compatible = "arm,cortex-a9-twd-timer"; compatible = "arm,cortex-a9-twd-timer";
reg = <0x60000600 0x20>; reg = <0x60000600 0x20>;
interrupts = <1 13 0xf04>; interrupts = <GIC_PPI 13
(GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&arm_timer_clk>; clocks = <&arm_timer_clk>;
}; };
...@@ -566,7 +572,7 @@ sys_rst: reset { ...@@ -566,7 +572,7 @@ sys_rst: reset {
pvtctl: thermal-sensor { pvtctl: thermal-sensor {
compatible = "socionext,uniphier-pxs2-thermal"; compatible = "socionext,uniphier-pxs2-thermal";
interrupts = <0 3 4>; interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
#thermal-sensor-cells = <0>; #thermal-sensor-cells = <0>;
socionext,tmod-calibration = <0x0f86 0x6844>; socionext,tmod-calibration = <0x0f86 0x6844>;
}; };
...@@ -576,7 +582,7 @@ eth: ethernet@65000000 { ...@@ -576,7 +582,7 @@ eth: ethernet@65000000 {
compatible = "socionext,uniphier-pxs2-ave4"; compatible = "socionext,uniphier-pxs2-ave4";
status = "disabled"; status = "disabled";
reg = <0x65000000 0x8500>; reg = <0x65000000 0x8500>;
interrupts = <0 66 4>; interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ether_rgmii>; pinctrl-0 = <&pinctrl_ether_rgmii>;
clock-names = "ether"; clock-names = "ether";
...@@ -598,7 +604,7 @@ usb0: usb@65a00000 { ...@@ -598,7 +604,7 @@ usb0: usb@65a00000 {
status = "disabled"; status = "disabled";
reg = <0x65a00000 0xcd00>; reg = <0x65a00000 0xcd00>;
interrupt-names = "dwc_usb3"; interrupt-names = "dwc_usb3";
interrupts = <0 134 4>; interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>; pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
clock-names = "ref", "bus_early", "suspend"; clock-names = "ref", "bus_early", "suspend";
...@@ -694,7 +700,7 @@ usb1: usb@65c00000 { ...@@ -694,7 +700,7 @@ usb1: usb@65c00000 {
status = "disabled"; status = "disabled";
reg = <0x65c00000 0xcd00>; reg = <0x65c00000 0xcd00>;
interrupt-names = "dwc_usb3"; interrupt-names = "dwc_usb3";
interrupts = <0 137 4>; interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>; pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
clock-names = "ref", "bus_early", "suspend"; clock-names = "ref", "bus_early", "suspend";
...@@ -780,7 +786,7 @@ nand: nand-controller@68000000 { ...@@ -780,7 +786,7 @@ nand: nand-controller@68000000 {
reg = <0x68000000 0x20>, <0x68100000 0x1000>; reg = <0x68000000 0x20>, <0x68100000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 65 4>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>; pinctrl-0 = <&pinctrl_nand>;
clock-names = "nand", "nand_x", "ecc"; clock-names = "nand", "nand_x", "ecc";
......
arch/arm/boot/dts/uniphier-sld8-ref.dts
View file @ c9c50dfd
...@@ -36,11 +36,11 @@ memory@80000000 { ...@@ -36,11 +36,11 @@ memory@80000000 {
}; };
&ethsc { &ethsc {
interrupts = <0 8>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
}; };
&serialsc { &serialsc {
interrupts = <0 8>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
}; };
&serial0 { &serial0 {
......
arch/arm/boot/dts/uniphier-sld8.dtsi
View file @ c9c50dfd
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
// Author: Masahiro Yamada <yamada.masahiro@socionext.com> // Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/uniphier-gpio.h> #include <dt-bindings/gpio/uniphier-gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ { / {
compatible = "socionext,uniphier-sld8"; compatible = "socionext,uniphier-sld8";
...@@ -55,7 +56,8 @@ l2: cache-controller@500c0000 { ...@@ -55,7 +56,8 @@ l2: cache-controller@500c0000 {
compatible = "socionext,uniphier-system-cache"; compatible = "socionext,uniphier-system-cache";
reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
<0x506c0000 0x400>; <0x506c0000 0x400>;
interrupts = <0 174 4>, <0 175 4>; interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
cache-unified; cache-unified;
cache-size = <(256 * 1024)>; cache-size = <(256 * 1024)>;
cache-sets = <256>; cache-sets = <256>;
...@@ -69,7 +71,7 @@ spi: spi@54006000 { ...@@ -69,7 +71,7 @@ spi: spi@54006000 {
reg = <0x54006000 0x100>; reg = <0x54006000 0x100>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 39 4>; interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>; pinctrl-0 = <&pinctrl_spi0>;
clocks = <&peri_clk 11>; clocks = <&peri_clk 11>;
...@@ -80,7 +82,7 @@ serial0: serial@54006800 { ...@@ -80,7 +82,7 @@ serial0: serial@54006800 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006800 0x40>; reg = <0x54006800 0x40>;
interrupts = <0 33 4>; interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>; pinctrl-0 = <&pinctrl_uart0>;
clocks = <&peri_clk 0>; clocks = <&peri_clk 0>;
...@@ -91,7 +93,7 @@ serial1: serial@54006900 { ...@@ -91,7 +93,7 @@ serial1: serial@54006900 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006900 0x40>; reg = <0x54006900 0x40>;
interrupts = <0 35 4>; interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>; pinctrl-0 = <&pinctrl_uart1>;
clocks = <&peri_clk 1>; clocks = <&peri_clk 1>;
...@@ -102,7 +104,7 @@ serial2: serial@54006a00 { ...@@ -102,7 +104,7 @@ serial2: serial@54006a00 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006a00 0x40>; reg = <0x54006a00 0x40>;
interrupts = <0 37 4>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>; pinctrl-0 = <&pinctrl_uart2>;
clocks = <&peri_clk 2>; clocks = <&peri_clk 2>;
...@@ -113,7 +115,7 @@ serial3: serial@54006b00 { ...@@ -113,7 +115,7 @@ serial3: serial@54006b00 {
compatible = "socionext,uniphier-uart"; compatible = "socionext,uniphier-uart";
status = "disabled"; status = "disabled";
reg = <0x54006b00 0x40>; reg = <0x54006b00 0x40>;
interrupts = <0 29 4>; interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>; pinctrl-0 = <&pinctrl_uart3>;
clocks = <&peri_clk 3>; clocks = <&peri_clk 3>;
...@@ -144,7 +146,7 @@ i2c0: i2c@58400000 { ...@@ -144,7 +146,7 @@ i2c0: i2c@58400000 {
reg = <0x58400000 0x40>; reg = <0x58400000 0x40>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 41 1>; interrupts = <GIC_SPI 41 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c0>; pinctrl-0 = <&pinctrl_i2c0>;
clocks = <&peri_clk 4>; clocks = <&peri_clk 4>;
...@@ -158,7 +160,7 @@ i2c1: i2c@58480000 { ...@@ -158,7 +160,7 @@ i2c1: i2c@58480000 {
reg = <0x58480000 0x40>; reg = <0x58480000 0x40>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 42 1>; interrupts = <GIC_SPI 42 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>; pinctrl-0 = <&pinctrl_i2c1>;
clocks = <&peri_clk 5>; clocks = <&peri_clk 5>;
...@@ -172,7 +174,7 @@ i2c2: i2c@58500000 { ...@@ -172,7 +174,7 @@ i2c2: i2c@58500000 {
reg = <0x58500000 0x40>; reg = <0x58500000 0x40>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 43 1>; interrupts = <GIC_SPI 43 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>; pinctrl-0 = <&pinctrl_i2c2>;
clocks = <&peri_clk 6>; clocks = <&peri_clk 6>;
...@@ -186,7 +188,7 @@ i2c3: i2c@58580000 { ...@@ -186,7 +188,7 @@ i2c3: i2c@58580000 {
reg = <0x58580000 0x40>; reg = <0x58580000 0x40>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 44 1>; interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>; pinctrl-0 = <&pinctrl_i2c3>;
clocks = <&peri_clk 7>; clocks = <&peri_clk 7>;
...@@ -244,8 +246,13 @@ peri_rst: reset { ...@@ -244,8 +246,13 @@ peri_rst: reset {
dmac: dma-controller@5a000000 { dmac: dma-controller@5a000000 {
compatible = "socionext,uniphier-mio-dmac"; compatible = "socionext,uniphier-mio-dmac";
reg = <0x5a000000 0x1000>; reg = <0x5a000000 0x1000>;
interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
<0 71 4>, <0 72 4>, <0 73 4>; <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&mio_clk 7>; clocks = <&mio_clk 7>;
resets = <&mio_rst 7>; resets = <&mio_rst 7>;
#dma-cells = <1>; #dma-cells = <1>;
...@@ -255,7 +262,7 @@ sd: mmc@5a400000 { ...@@ -255,7 +262,7 @@ sd: mmc@5a400000 {
compatible = "socionext,uniphier-sd-v2.91"; compatible = "socionext,uniphier-sd-v2.91";
status = "disabled"; status = "disabled";
reg = <0x5a400000 0x200>; reg = <0x5a400000 0x200>;
interrupts = <0 76 4>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default", "uhs"; pinctrl-names = "default", "uhs";
pinctrl-0 = <&pinctrl_sd>; pinctrl-0 = <&pinctrl_sd>;
pinctrl-1 = <&pinctrl_sd_uhs>; pinctrl-1 = <&pinctrl_sd_uhs>;
...@@ -275,7 +282,7 @@ emmc: mmc@5a500000 { ...@@ -275,7 +282,7 @@ emmc: mmc@5a500000 {
compatible = "socionext,uniphier-sd-v2.91"; compatible = "socionext,uniphier-sd-v2.91";
status = "disabled"; status = "disabled";
reg = <0x5a500000 0x200>; reg = <0x5a500000 0x200>;
interrupts = <0 78 4>; interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_emmc>; pinctrl-0 = <&pinctrl_emmc>;
clocks = <&mio_clk 1>; clocks = <&mio_clk 1>;
...@@ -293,7 +300,7 @@ usb0: usb@5a800100 { ...@@ -293,7 +300,7 @@ usb0: usb@5a800100 {
compatible = "socionext,uniphier-ehci", "generic-ehci"; compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled"; status = "disabled";
reg = <0x5a800100 0x100>; reg = <0x5a800100 0x100>;
interrupts = <0 80 4>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0>; pinctrl-0 = <&pinctrl_usb0>;
clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>, clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 8>,
...@@ -307,7 +314,7 @@ usb1: usb@5a810100 { ...@@ -307,7 +314,7 @@ usb1: usb@5a810100 {
compatible = "socionext,uniphier-ehci", "generic-ehci"; compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled"; status = "disabled";
reg = <0x5a810100 0x100>; reg = <0x5a810100 0x100>;
interrupts = <0 81 4>; interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb1>; pinctrl-0 = <&pinctrl_usb1>;
clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>, clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 9>,
...@@ -321,7 +328,7 @@ usb2: usb@5a820100 { ...@@ -321,7 +328,7 @@ usb2: usb@5a820100 {
compatible = "socionext,uniphier-ehci", "generic-ehci"; compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled"; status = "disabled";
reg = <0x5a820100 0x100>; reg = <0x5a820100 0x100>;
interrupts = <0 82 4>; interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb2>; pinctrl-0 = <&pinctrl_usb2>;
clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>, clocks = <&sys_clk 8>, <&mio_clk 7>, <&mio_clk 10>,
...@@ -362,14 +369,16 @@ efuse@200 { ...@@ -362,14 +369,16 @@ efuse@200 {
timer@60000200 { timer@60000200 {
compatible = "arm,cortex-a9-global-timer"; compatible = "arm,cortex-a9-global-timer";
reg = <0x60000200 0x20>; reg = <0x60000200 0x20>;
interrupts = <1 11 0x104>; interrupts = <GIC_PPI 11
(GIC_CPU_MASK_RAW(1) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&arm_timer_clk>; clocks = <&arm_timer_clk>;
}; };
timer@60000600 { timer@60000600 {
compatible = "arm,cortex-a9-twd-timer"; compatible = "arm,cortex-a9-twd-timer";
reg = <0x60000600 0x20>; reg = <0x60000600 0x20>;
interrupts = <1 13 0x104>; interrupts = <GIC_PPI 13
(GIC_CPU_MASK_RAW(1) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&arm_timer_clk>; clocks = <&arm_timer_clk>;
}; };
...@@ -411,7 +420,7 @@ nand: nand-controller@68000000 { ...@@ -411,7 +420,7 @@ nand: nand-controller@68000000 {
reg = <0x68000000 0x20>, <0x68100000 0x1000>; reg = <0x68000000 0x20>, <0x68100000 0x1000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 65 4>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>; pinctrl-0 = <&pinctrl_nand>;
clock-names = "nand", "nand_x", "ecc"; clock-names = "nand", "nand_x", "ecc";
......
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