Commit c9e5ef8c authored by Kuldeep Singh's avatar Kuldeep Singh Committed by Shawn Guo

arm64: dts: ls1028a: Update flexcan properties

LS1028A supports two flexcan controllers similar to LX2160A.

There's already a compatible entry defined i.e "fsl,lx2160ar1-flexcan"
which can be further reused for LS1028A.
Please note, "fsl,ls1028ar1-flexcan" compatible entry doesn't exists and
can be safely removed.

LS1028A has a single peripheral clock (i.e platform clock) source
connected to both "ipg" and "per" and therefore, remove "sysclk" as
clock source from device-tree.
Signed-off-by: default avatarKuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 930a0968
...@@ -418,21 +418,25 @@ esdhc1: mmc@2150000 { ...@@ -418,21 +418,25 @@ esdhc1: mmc@2150000 {
}; };
can0: can@2180000 { can0: can@2180000 {
compatible = "fsl,ls1028ar1-flexcan", "fsl,lx2160ar1-flexcan"; compatible = "fsl,lx2160ar1-flexcan";
reg = <0x0 0x2180000 0x0 0x10000>; reg = <0x0 0x2180000 0x0 0x10000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sysclk>, <&clockgen QORIQ_CLK_PLATFORM_PLL clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(2)>; QORIQ_CLK_PLL_DIV(2)>,
<&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(2)>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
}; };
can1: can@2190000 { can1: can@2190000 {
compatible = "fsl,ls1028ar1-flexcan", "fsl,lx2160ar1-flexcan"; compatible = "fsl,lx2160ar1-flexcan";
reg = <0x0 0x2190000 0x0 0x10000>; reg = <0x0 0x2190000 0x0 0x10000>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sysclk>, <&clockgen QORIQ_CLK_PLATFORM_PLL clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(2)>; QORIQ_CLK_PLL_DIV(2)>,
<&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(2)>;
clock-names = "ipg", "per"; clock-names = "ipg", "per";
status = "disabled"; status = "disabled";
}; };
......
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