Commit ca8cc0fe authored by Dong Aisheng's avatar Dong Aisheng Committed by Ulf Hansson

mmc: sdhci-esdhci-imx: disable DLL delay line settings explicitly

Disable DLL delay line settings explicitly during driver initialization
in case ROM/uBoot had set an invalid delay.
e.g. MX6DL ROM has set the default delay line(DLLCTRL) to 0x1000021,
the uSDHC clock timing will become marginal when works on DDR mode
due to default delay and will possibly see CRC errors in case the board
is not perfectly designed on the eMMC chip layout.
Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: default avatarDong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent cc17e129
...@@ -1187,6 +1187,9 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) ...@@ -1187,6 +1187,9 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
*/ */
writel(readl(host->ioaddr + 0x6c) | BIT(7), writel(readl(host->ioaddr + 0x6c) | BIT(7),
host->ioaddr + 0x6c); host->ioaddr + 0x6c);
/* disable DLL_CTRL delay line settings */
writel(0x0, host->ioaddr + ESDHC_DLL_CTRL);
} }
if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING) if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING)
......
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