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Commit caeca8a4 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'tegra-for-6.6-arm-dt' of... 

Merge tag 'tegra-for-6.6-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

ARM: tegra: Device tree changes for v6.6-rc1

This contains various fixes for DT schema validation and the Pegatron
Chagall and Nexus 7 get specific compatible strings for the panels that
they use.

* tag 'tegra-for-6.6-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: Provide specific compatible string for Nexus 7 panel
  ARM: tegra: Use Hannstar HSD101PWW2 on Pegatron Chagall
  ARM: tegra: Reuse I2C3 for NVEC
  ARM: tegra: Add missing reset-names for Tegra HS UART
  ARM: tegra: Remove reset-names for UART devices
  ARM: tegra: Remove dmas and dma-names for debug UART

Link: https://lore.kernel.org/r/20230728094129.3587109-3-thierry.reding@gmail.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents e85a757d c9a706ab
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Showing with 94 additions and 37 deletions
arch/arm/boot/dts/nvidia/tegra114-asus-tf701t.dts
View file @ caeca8a4
......@@ -271,6 +271,8 @@ serial@70006200 {
};
serial@70006300 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra114-dalmore.dts
View file @ caeca8a4
......@@ -755,6 +755,8 @@ drive_gma {
};
serial@70006300 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra114-roth.dts
View file @ caeca8a4
......@@ -779,6 +779,8 @@ drive_gma {
/* Usable on reworked devices only */
serial@70006300 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra114-tn7.dts
View file @ caeca8a4
......@@ -50,6 +50,8 @@ panel@0 {
};
serial@70006300 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra114.dtsi
View file @ caeca8a4
......@@ -315,7 +315,6 @@ uarta: serial@70006000 {
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_UARTA>;
resets = <&tegra_car 6>;
reset-names = "serial";
dmas = <&apbdma 8>, <&apbdma 8>;
dma-names = "rx", "tx";
status = "disabled";
......@@ -328,7 +327,6 @@ uartb: serial@70006040 {
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_UARTB>;
resets = <&tegra_car 7>;
reset-names = "serial";
dmas = <&apbdma 9>, <&apbdma 9>;
dma-names = "rx", "tx";
status = "disabled";
......@@ -341,7 +339,6 @@ uartc: serial@70006200 {
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_UARTC>;
resets = <&tegra_car 55>;
reset-names = "serial";
dmas = <&apbdma 10>, <&apbdma 10>;
dma-names = "rx", "tx";
status = "disabled";
......@@ -354,7 +351,6 @@ uartd: serial@70006300 {
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_UARTD>;
resets = <&tegra_car 65>;
reset-names = "serial";
dmas = <&apbdma 19>, <&apbdma 19>;
dma-names = "rx", "tx";
status = "disabled";
......
arch/arm/boot/dts/nvidia/tegra124-apalis-eval.dts
View file @ caeca8a4
......@@ -52,6 +52,8 @@ pex-perst-n-hog {
/* Apalis UART1 */
serial@70006000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2-eval.dts
View file @ caeca8a4
......@@ -53,6 +53,8 @@ pex-perst-n-hog {
/* Apalis UART1 */
serial@70006000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra124-apalis-v1.2.dtsi
View file @ caeca8a4
......@@ -1557,16 +1557,19 @@ sdmmc3-clk-lb-out-pee4 { /* NC */
serial@70006040 {
compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
};
serial@70006200 {
compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
};
serial@70006300 {
compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
};
......
arch/arm/boot/dts/nvidia/tegra124-apalis.dtsi
View file @ caeca8a4
......@@ -1550,16 +1550,19 @@ sdmmc3-clk-lb-out-pee4 { /* NC */
serial@70006040 {
compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
};
serial@70006200 {
compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
};
serial@70006300 {
compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
};
......
arch/arm/boot/dts/nvidia/tegra124-jetson-tk1.dts
View file @ caeca8a4
......@@ -1385,6 +1385,7 @@ dsi_b {
*/
serial@70006000 {
compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
status = "okay";
};
......@@ -1398,12 +1399,15 @@ serial@70006000 {
*/
serial@70006040 {
compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
status = "okay";
};
/* DB9 serial port */
serial@70006300 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra124-nyan.dtsi
View file @ caeca8a4
......@@ -70,6 +70,8 @@ gpu@57000000 {
serial@70006000 {
/* Debug connector on the bottom of the board near SD card. */
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra124-venice2.dts
View file @ caeca8a4
......@@ -609,6 +609,8 @@ hp_det_l {
};
serial@70006000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra124.dtsi
View file @ caeca8a4
......@@ -380,7 +380,6 @@ uarta: serial@70006000 {
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_UARTA>;
resets = <&tegra_car 6>;
reset-names = "serial";
dmas = <&apbdma 8>, <&apbdma 8>;
dma-names = "rx", "tx";
status = "disabled";
......@@ -393,7 +392,6 @@ uartb: serial@70006040 {
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_UARTB>;
resets = <&tegra_car 7>;
reset-names = "serial";
dmas = <&apbdma 9>, <&apbdma 9>;
dma-names = "rx", "tx";
status = "disabled";
......@@ -406,7 +404,6 @@ uartc: serial@70006200 {
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_UARTC>;
resets = <&tegra_car 55>;
reset-names = "serial";
dmas = <&apbdma 10>, <&apbdma 10>;
dma-names = "rx", "tx";
status = "disabled";
......@@ -419,7 +416,6 @@ uartd: serial@70006300 {
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA124_CLK_UARTD>;
resets = <&tegra_car 65>;
reset-names = "serial";
dmas = <&apbdma 19>, <&apbdma 19>;
dma-names = "rx", "tx";
status = "disabled";
......
arch/arm/boot/dts/nvidia/tegra20-acer-a500-picasso.dts
View file @ caeca8a4
......@@ -393,12 +393,14 @@ tegra_i2s1: i2s@70002800 {
uartb: serial@70006040 {
compatible = "nvidia,tegra20-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
/* GPS BCM4751 */
};
uartc: serial@70006200 {
compatible = "nvidia,tegra20-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
status = "okay";
......
arch/arm/boot/dts/nvidia/tegra20-asus-tf101.dts
View file @ caeca8a4
......@@ -450,12 +450,14 @@ i2s@70002800 {
serial@70006040 {
compatible = "nvidia,tegra20-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
/* GPS BCM4751 */
};
serial@70006200 {
compatible = "nvidia,tegra20-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
status = "okay";
......@@ -482,6 +484,8 @@ bluetooth {
};
serial@70006300 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra20-colibri-eval-v3.dts
View file @ caeca8a4
......@@ -102,6 +102,8 @@ usbh-pen {
/* Colibri UART-A */
serial@70006000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra20-colibri-iris.dts
View file @ caeca8a4
......@@ -102,6 +102,8 @@ usbh-pen {
/* Colibri UART-A */
serial@70006000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra20-colibri.dtsi
View file @ caeca8a4
......@@ -453,11 +453,13 @@ tegra_ac97: ac97@70002000 {
serial@70006040 {
compatible = "nvidia,tegra20-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
};
serial@70006300 {
compatible = "nvidia,tegra20-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
};
......
arch/arm/boot/dts/nvidia/tegra20-harmony.dts
View file @ caeca8a4
......@@ -273,6 +273,8 @@ i2s@70002800 {
};
serial@70006300 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra20-paz00.dts
View file @ caeca8a4
......@@ -279,10 +279,14 @@ i2s@70002800 {
};
serial@70006000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
serial@70006200 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......@@ -307,20 +311,19 @@ hdmi_ddc: i2c@7000c400 {
clock-frequency = <100000>;
};
nvec@7000c500 {
i2c@7000c500 {
compatible = "nvidia,nvec";
reg = <0x7000c500 0x100>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
/delete-property/ #address-cells;
/delete-property/ #size-cells;
/delete-property/ dmas;
/delete-property/ dma-names;
clock-frequency = <80000>;
request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
slave-addr = <138>;
clocks = <&tegra_car TEGRA20_CLK_I2C3>,
<&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
clock-names = "div-clk", "fast-clk";
resets = <&tegra_car 67>;
reset-names = "i2c";
status = "okay";
};
i2c@7000d000 {
......
arch/arm/boot/dts/nvidia/tegra20-seaboard.dts
View file @ caeca8a4
......@@ -324,6 +324,8 @@ i2s@70002800 {
};
serial@70006300 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra20-tamonten.dtsi
View file @ caeca8a4
......@@ -288,6 +288,8 @@ i2s@70002800 {
};
serial@70006300 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra20-trimslice.dts
View file @ caeca8a4
......@@ -276,6 +276,8 @@ i2s@70002800 {
};
serial@70006000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra20-ventana.dts
View file @ caeca8a4
......@@ -323,6 +323,8 @@ i2s@70002800 {
};
serial@70006300 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra20.dtsi
View file @ caeca8a4
......@@ -442,7 +442,6 @@ uarta: serial@70006000 {
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_UARTA>;
resets = <&tegra_car 6>;
reset-names = "serial";
dmas = <&apbdma 8>, <&apbdma 8>;
dma-names = "rx", "tx";
status = "disabled";
......@@ -455,7 +454,6 @@ uartb: serial@70006040 {
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_UARTB>;
resets = <&tegra_car 7>;
reset-names = "serial";
dmas = <&apbdma 9>, <&apbdma 9>;
dma-names = "rx", "tx";
status = "disabled";
......@@ -468,7 +466,6 @@ uartc: serial@70006200 {
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_UARTC>;
resets = <&tegra_car 55>;
reset-names = "serial";
dmas = <&apbdma 10>, <&apbdma 10>;
dma-names = "rx", "tx";
status = "disabled";
......@@ -481,7 +478,6 @@ uartd: serial@70006300 {
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_UARTD>;
resets = <&tegra_car 65>;
reset-names = "serial";
dmas = <&apbdma 19>, <&apbdma 19>;
dma-names = "rx", "tx";
status = "disabled";
......@@ -494,7 +490,6 @@ uarte: serial@70006400 {
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_UARTE>;
resets = <&tegra_car 66>;
reset-names = "serial";
dmas = <&apbdma 20>, <&apbdma 20>;
dma-names = "rx", "tx";
status = "disabled";
......
arch/arm/boot/dts/nvidia/tegra30-apalis-eval.dts
View file @ caeca8a4
......@@ -59,6 +59,8 @@ pex-perst-n-hog {
/* Apalis UART1 */
serial@70006000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1-eval.dts
View file @ caeca8a4
......@@ -60,6 +60,8 @@ pex-perst-n-hog {
/* Apalis UART1 */
serial@70006000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra30-apalis-v1.1.dtsi
View file @ caeca8a4
......@@ -829,16 +829,19 @@ pv0 {
serial@70006040 {
compatible = "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
};
serial@70006200 {
compatible = "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
};
serial@70006300 {
compatible = "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
};
......
arch/arm/boot/dts/nvidia/tegra30-apalis.dtsi
View file @ caeca8a4
......@@ -820,16 +820,19 @@ pv0 {
serial@70006040 {
compatible = "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
};
serial@70006200 {
compatible = "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
};
serial@70006300 {
compatible = "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
};
......
arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-common.dtsi
View file @ caeca8a4
......@@ -798,12 +798,14 @@ drive_gma {
uartb: serial@70006040 {
compatible = "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
/* GPS BCM4751 */
};
uartc: serial@70006200 {
compatible = "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
status = "okay";
......@@ -1090,15 +1092,11 @@ cpu3: cpu@3 {
display-panel {
/*
* Nexus 7 supports two compatible panel models:
*
* 1. hydis,hv070wx2-1e0
* 2. chunghwa,claa070wp03xg
*
* We want to use timing which is optimized for Nexus 7,
* hence we need to customize the timing.
* Some device variants come with a Hydis HV070WX2-1E0, but
* since they are all largely compatible, we'll go with the
* Chunghwa one here.
*/
compatible = "panel-lvds";
compatible = "chunghwa,claa070wp03xg", "panel-lvds";
width-mm = <94>;
height-mm = <150>;
......
arch/arm/boot/dts/nvidia/tegra30-asus-transformer-common.dtsi
View file @ caeca8a4
......@@ -1088,6 +1088,7 @@ drive_sdio1 {
serial@70006040 {
compatible = "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
status = "okay";
......@@ -1096,6 +1097,7 @@ serial@70006040 {
serial@70006200 {
compatible = "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
status = "okay";
......
arch/arm/boot/dts/nvidia/tegra30-beaver.dts
View file @ caeca8a4
......@@ -1733,6 +1733,8 @@ gpv {
};
serial@70006000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra30-cardhu.dtsi
View file @ caeca8a4
......@@ -170,11 +170,14 @@ uart3_txd_pw6 {
};
serial@70006000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
serial@70006200 {
compatible = "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra30-colibri-eval-v3.dts
View file @ caeca8a4
......@@ -38,6 +38,8 @@ hdmi@54280000 {
/* Colibri UART-A */
serial@70006000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra30-colibri.dtsi
View file @ caeca8a4
......@@ -710,11 +710,13 @@ pv0 {
serial@70006040 {
compatible = "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
};
serial@70006300 {
compatible = "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
};
......
arch/arm/boot/dts/nvidia/tegra30-ouya.dts
View file @ caeca8a4
......@@ -2004,6 +2004,7 @@ drive_groups {
uartc: serial@70006200 {
compatible = "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
status = "okay";
......@@ -2033,6 +2034,8 @@ bluetooth {
};
uartd: serial@70006300 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};
......
arch/arm/boot/dts/nvidia/tegra30-pegatron-chagall.dts
View file @ caeca8a4
......@@ -1110,6 +1110,7 @@ drive_lcd2 {
uartb: serial@70006040 {
compatible = "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
status = "okay";
......@@ -1118,6 +1119,7 @@ uartb: serial@70006040 {
uartc: serial@70006200 {
compatible = "nvidia,tegra30-hsuart";
reset-names = "serial";
/delete-property/ reg-shift;
status = "okay";
......@@ -2626,7 +2628,7 @@ cpu3: cpu@3 {
};
display-panel {
compatible = "panel-lvds";
compatible = "hannstar,hsd101pww2", "panel-lvds";
width-mm = <217>;
height-mm = <136>;
......
arch/arm/boot/dts/nvidia/tegra30.dtsi
View file @ caeca8a4
......@@ -563,7 +563,6 @@ uarta: serial@70006000 {
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_UARTA>;
resets = <&tegra_car 6>;
reset-names = "serial";
dmas = <&apbdma 8>, <&apbdma 8>;
dma-names = "rx", "tx";
status = "disabled";
......@@ -576,7 +575,6 @@ uartb: serial@70006040 {
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_UARTB>;
resets = <&tegra_car 7>;
reset-names = "serial";
dmas = <&apbdma 9>, <&apbdma 9>;
dma-names = "rx", "tx";
status = "disabled";
......@@ -589,7 +587,6 @@ uartc: serial@70006200 {
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_UARTC>;
resets = <&tegra_car 55>;
reset-names = "serial";
dmas = <&apbdma 10>, <&apbdma 10>;
dma-names = "rx", "tx";
status = "disabled";
......@@ -602,7 +599,6 @@ uartd: serial@70006300 {
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_UARTD>;
resets = <&tegra_car 65>;
reset-names = "serial";
dmas = <&apbdma 19>, <&apbdma 19>;
dma-names = "rx", "tx";
status = "disabled";
......@@ -615,7 +611,6 @@ uarte: serial@70006400 {
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_UARTE>;
resets = <&tegra_car 66>;
reset-names = "serial";
dmas = <&apbdma 20>, <&apbdma 20>;
dma-names = "rx", "tx";
status = "disabled";
......
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