Commit cb63f3a5 authored by Andrew Morton's avatar Andrew Morton Committed by Linus Torvalds

[PATCH] via-rhine: small fixes

From: Roger Luethi <rl@hellgate.ch>

- remove Rhine model names (per Jeff's request)
- remove redundant calls to clear MII cmd
- fill some rhine_private fields earlier
Signed-off-by: default avatarRoger Luethi <rl@hellgate.ch>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
parent e8c88a6f
...@@ -346,7 +346,7 @@ enum rhine_revs { ...@@ -346,7 +346,7 @@ enum rhine_revs {
VT6105L = 0x8A, VT6105L = 0x8A,
VT6107 = 0x8C, VT6107 = 0x8C,
VTunknown2 = 0x8E, VTunknown2 = 0x8E,
VT6105M = 0x90, VT6105M = 0x90, /* Management adapter */
}; };
enum rhine_quirks { enum rhine_quirks {
...@@ -485,9 +485,7 @@ struct rhine_private { ...@@ -485,9 +485,7 @@ struct rhine_private {
dma_addr_t tx_bufs_dma; dma_addr_t tx_bufs_dma;
struct pci_dev *pdev; struct pci_dev *pdev;
#ifdef CONFIG_PM
long pioaddr; long pioaddr;
#endif
struct net_device_stats stats; struct net_device_stats stats;
spinlock_t lock; spinlock_t lock;
...@@ -596,7 +594,7 @@ static void rhine_power_init(struct net_device *dev) ...@@ -596,7 +594,7 @@ static void rhine_power_init(struct net_device *dev)
default: default:
reason = "Unknown"; reason = "Unknown";
} }
printk("%s: Woke system up. Reason: %s.\n", printk(KERN_INFO "%s: Woke system up. Reason: %s.\n",
DRV_NAME, reason); DRV_NAME, reason);
} }
} }
...@@ -706,7 +704,7 @@ static int __devinit rhine_init_one(struct pci_dev *pdev, ...@@ -706,7 +704,7 @@ static int __devinit rhine_init_one(struct pci_dev *pdev,
long memaddr; long memaddr;
long ioaddr; long ioaddr;
int io_size, phy_id; int io_size, phy_id;
const char *name, *mname; const char *name;
/* when built into the kernel, we only print version if device is found */ /* when built into the kernel, we only print version if device is found */
#ifndef MODULE #ifndef MODULE
...@@ -721,41 +719,24 @@ static int __devinit rhine_init_one(struct pci_dev *pdev, ...@@ -721,41 +719,24 @@ static int __devinit rhine_init_one(struct pci_dev *pdev,
phy_id = 0; phy_id = 0;
quirks = 0; quirks = 0;
name = "Rhine"; name = "Rhine";
mname = "unknown";
if (pci_rev < VTunknown0) { if (pci_rev < VTunknown0) {
quirks = rqRhineI; quirks = rqRhineI;
io_size = 128; io_size = 128;
mname = "VT86C100A";
} }
else if (pci_rev >= VT6102) { else if (pci_rev >= VT6102) {
quirks = rqWOL | rqForceReset; quirks = rqWOL | rqForceReset;
if (pci_rev < VT6105) { if (pci_rev < VT6105) {
name = "Rhine II"; name = "Rhine II";
quirks |= rqStatusWBRace; /* Rhine-II exclusive */ quirks |= rqStatusWBRace; /* Rhine-II exclusive */
if (pci_rev < VT8231)
mname = "VT6102";
else if (pci_rev < VT8233)
mname = "VT8231";
else if (pci_rev < VT8235)
mname = "VT8233";
else if (pci_rev < VT8237)
mname = "VT8235";
else if (pci_rev < VTunknown1)
mname = "VT8237";
} }
else { else {
name = "Rhine III";
phy_id = 1; /* Integrated PHY, phy_id fixed to 1 */ phy_id = 1; /* Integrated PHY, phy_id fixed to 1 */
if (pci_rev >= VT6105_B0) if (pci_rev >= VT6105_B0)
quirks |= rq6patterns; quirks |= rq6patterns;
if (pci_rev < VT6105L) if (pci_rev < VT6105M)
mname = "VT6105"; name = "Rhine III";
else if (pci_rev < VT6107) else
mname = "VT6105L"; name = "Rhine III (Management Adapter)";
else if (pci_rev < VT6105M)
mname = "VT6107";
else if (pci_rev >= VT6105M)
mname = "Management Adapter VT6105M";
} }
} }
...@@ -793,6 +774,11 @@ static int __devinit rhine_init_one(struct pci_dev *pdev, ...@@ -793,6 +774,11 @@ static int __devinit rhine_init_one(struct pci_dev *pdev,
SET_MODULE_OWNER(dev); SET_MODULE_OWNER(dev);
SET_NETDEV_DEV(dev, &pdev->dev); SET_NETDEV_DEV(dev, &pdev->dev);
rp = netdev_priv(dev);
rp->quirks = quirks;
rp->pioaddr = pioaddr;
rp->pdev = pdev;
rc = pci_request_regions(pdev, DRV_NAME); rc = pci_request_regions(pdev, DRV_NAME);
if (rc) if (rc)
goto err_out_free_netdev; goto err_out_free_netdev;
...@@ -826,11 +812,6 @@ static int __devinit rhine_init_one(struct pci_dev *pdev, ...@@ -826,11 +812,6 @@ static int __devinit rhine_init_one(struct pci_dev *pdev,
#endif /* USE_MMIO */ #endif /* USE_MMIO */
dev->base_addr = ioaddr; dev->base_addr = ioaddr;
rp = netdev_priv(dev);
rp->quirks = quirks;
#ifdef CONFIG_PM
rp->pioaddr = pioaddr;
#endif
/* Get chip registers into a sane state */ /* Get chip registers into a sane state */
rhine_power_init(dev); rhine_power_init(dev);
...@@ -852,7 +833,6 @@ static int __devinit rhine_init_one(struct pci_dev *pdev, ...@@ -852,7 +833,6 @@ static int __devinit rhine_init_one(struct pci_dev *pdev,
dev->irq = pdev->irq; dev->irq = pdev->irq;
spin_lock_init(&rp->lock); spin_lock_init(&rp->lock);
rp->pdev = pdev;
rp->mii_if.dev = dev; rp->mii_if.dev = dev;
rp->mii_if.mdio_read = mdio_read; rp->mii_if.mdio_read = mdio_read;
rp->mii_if.mdio_write = mdio_write; rp->mii_if.mdio_write = mdio_write;
...@@ -880,8 +860,8 @@ static int __devinit rhine_init_one(struct pci_dev *pdev, ...@@ -880,8 +860,8 @@ static int __devinit rhine_init_one(struct pci_dev *pdev,
if (rc) if (rc)
goto err_out_unmap; goto err_out_unmap;
printk(KERN_INFO "%s: VIA %s (%s) at 0x%lx, ", printk(KERN_INFO "%s: VIA %s at 0x%lx, ",
dev->name, name, mname, dev->name, name,
#ifdef USE_MMIO #ifdef USE_MMIO
memaddr memaddr
#else #else
...@@ -1181,7 +1161,7 @@ static int mdio_read(struct net_device *dev, int phy_id, int regnum) ...@@ -1181,7 +1161,7 @@ static int mdio_read(struct net_device *dev, int phy_id, int regnum)
rhine_disable_linkmon(ioaddr, rp->quirks); rhine_disable_linkmon(ioaddr, rp->quirks);
writeb(0, ioaddr + MIICmd); /* rhine_disable_linkmon already cleared MIICmd */
writeb(phy_id, ioaddr + MIIPhyAddr); writeb(phy_id, ioaddr + MIIPhyAddr);
writeb(regnum, ioaddr + MIIRegAddr); writeb(regnum, ioaddr + MIIRegAddr);
writeb(0x40, ioaddr + MIICmd); /* Trigger read */ writeb(0x40, ioaddr + MIICmd); /* Trigger read */
...@@ -1199,7 +1179,7 @@ static void mdio_write(struct net_device *dev, int phy_id, int regnum, int value ...@@ -1199,7 +1179,7 @@ static void mdio_write(struct net_device *dev, int phy_id, int regnum, int value
rhine_disable_linkmon(ioaddr, rp->quirks); rhine_disable_linkmon(ioaddr, rp->quirks);
writeb(0, ioaddr + MIICmd); /* rhine_disable_linkmon already cleared MIICmd */
writeb(phy_id, ioaddr + MIIPhyAddr); writeb(phy_id, ioaddr + MIIPhyAddr);
writeb(regnum, ioaddr + MIIRegAddr); writeb(regnum, ioaddr + MIIRegAddr);
writew(value, ioaddr + MIIData); writew(value, ioaddr + MIIData);
......
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