Commit cb80b2a3 authored by Leonid Yegoshin's avatar Leonid Yegoshin Committed by Ralf Baechle

MIPS: remove aliasing alignment if HW has antialising support

MIPS hardware may have an antialising support and it works even
page size is small.

Setup a shared memory aliasing mask to page size if hardware has
an antialising support. Big shared memory mask forces a disruption
in page address assignment and that corrupts Android library memory
handling.
Signed-off-by: default avatarLeonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: cernekee@gmail.com
Cc: paul.gortmaker@windriver.com
Cc: kumba@gentoo.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11516/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 201233e6
...@@ -1721,7 +1721,7 @@ void r4k_cache_init(void) ...@@ -1721,7 +1721,7 @@ void r4k_cache_init(void)
* This code supports virtually indexed processors and will be * This code supports virtually indexed processors and will be
* unnecessarily inefficient on physically indexed processors. * unnecessarily inefficient on physically indexed processors.
*/ */
if (c->dcache.linesz) if (c->dcache.linesz && cpu_has_dc_aliases)
shm_align_mask = max_t( unsigned long, shm_align_mask = max_t( unsigned long,
c->dcache.sets * c->dcache.linesz - 1, c->dcache.sets * c->dcache.linesz - 1,
PAGE_SIZE - 1); PAGE_SIZE - 1);
......
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