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Commit cb90cf3c authored by Andrew Morton's avatar Andrew Morton Committed by Linus Torvalds
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[PATCH] Feed arch/i386/kernel/msr.c through Lindent

parent 2c28ee5a
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Showing with 163 additions and 169 deletions
arch/i386/kernel/msr.c
View file @ cb90cf3c
...@@ -46,239 +46,233 @@ ...@@ -46,239 +46,233 @@
static inline int wrmsr_eio(u32 reg, u32 eax, u32 edx) static inline int wrmsr_eio(u32 reg, u32 eax, u32 edx)
{ {
int err; int err;
asm volatile( asm volatile ("1: wrmsr\n"
"1: wrmsr\n" "2:\n"
"2:\n" ".section .fixup,\"ax\"\n"
".section .fixup,\"ax\"\n" "3: movl %4,%0\n"
"3: movl %4,%0\n" " jmp 2b\n"
" jmp 2b\n" ".previous\n"
".previous\n" ".section __ex_table,\"a\"\n"
".section __ex_table,\"a\"\n" " .align 4\n" " .long 1b,3b\n" ".previous":"=&bDS" (err)
" .align 4\n" :"a"(eax), "d"(edx), "c"(reg), "i"(-EIO), "0"(0));
" .long 1b,3b\n"
".previous" return err;
: "=&bDS" (err)
: "a" (eax), "d" (edx), "c" (reg), "i" (-EIO), "0" (0));
return err;
} }
static inline int rdmsr_eio(u32 reg, u32 *eax, u32 *edx) static inline int rdmsr_eio(u32 reg, u32 * eax, u32 * edx)
{ {
int err; int err;
asm volatile( asm volatile ("1: rdmsr\n"
"1: rdmsr\n" "2:\n"
"2:\n" ".section .fixup,\"ax\"\n"
".section .fixup,\"ax\"\n" "3: movl %4,%0\n"
"3: movl %4,%0\n" " jmp 2b\n"
" jmp 2b\n" ".previous\n"
".previous\n" ".section __ex_table,\"a\"\n"
".section __ex_table,\"a\"\n" " .align 4\n"
" .align 4\n" " .long 1b,3b\n"
" .long 1b,3b\n" ".previous":"=&bDS" (err), "=a"(*eax), "=d"(*edx)
".previous" :"c"(reg), "i"(-EIO), "0"(0));
: "=&bDS" (err), "=a" (*eax), "=d" (*edx)
: "c" (reg), "i" (-EIO), "0" (0)); return err;
return err;
} }
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
struct msr_command { struct msr_command {
int cpu; int cpu;
int err; int err;
u32 reg; u32 reg;
u32 data[2]; u32 data[2];
}; };
static void msr_smp_wrmsr(void *cmd_block) static void msr_smp_wrmsr(void *cmd_block)
{ {
struct msr_command *cmd = (struct msr_command *) cmd_block; struct msr_command *cmd = (struct msr_command *)cmd_block;
if ( cmd->cpu == smp_processor_id() ) if (cmd->cpu == smp_processor_id())
cmd->err = wrmsr_eio(cmd->reg, cmd->data[0], cmd->data[1]); cmd->err = wrmsr_eio(cmd->reg, cmd->data[0], cmd->data[1]);
} }
static void msr_smp_rdmsr(void *cmd_block) static void msr_smp_rdmsr(void *cmd_block)
{ {
struct msr_command *cmd = (struct msr_command *) cmd_block; struct msr_command *cmd = (struct msr_command *)cmd_block;
if ( cmd->cpu == smp_processor_id() ) if (cmd->cpu == smp_processor_id())
cmd->err = rdmsr_eio(cmd->reg, &cmd->data[0], &cmd->data[1]); cmd->err = rdmsr_eio(cmd->reg, &cmd->data[0], &cmd->data[1]);
} }
static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx) static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx)
{ {
struct msr_command cmd; struct msr_command cmd;
int ret; int ret;
preempt_disable(); preempt_disable();
if ( cpu == smp_processor_id() ) { if (cpu == smp_processor_id()) {
ret = wrmsr_eio(reg, eax, edx); ret = wrmsr_eio(reg, eax, edx);
} else { } else {
cmd.cpu = cpu; cmd.cpu = cpu;
cmd.reg = reg; cmd.reg = reg;
cmd.data[0] = eax; cmd.data[0] = eax;
cmd.data[1] = edx; cmd.data[1] = edx;
smp_call_function(msr_smp_wrmsr, &cmd, 1, 1); smp_call_function(msr_smp_wrmsr, &cmd, 1, 1);
ret = cmd.err; ret = cmd.err;
} }
preempt_enable(); preempt_enable();
return ret; return ret;
} }
static inline int do_rdmsr(int cpu, u32 reg, u32 *eax, u32 *edx) static inline int do_rdmsr(int cpu, u32 reg, u32 * eax, u32 * edx)
{ {
struct msr_command cmd; struct msr_command cmd;
int ret; int ret;
preempt_disable(); preempt_disable();
if ( cpu == smp_processor_id() ) { if (cpu == smp_processor_id()) {
ret = rdmsr_eio(reg, eax, edx); ret = rdmsr_eio(reg, eax, edx);
} else { } else {
cmd.cpu = cpu; cmd.cpu = cpu;
cmd.reg = reg; cmd.reg = reg;
smp_call_function(msr_smp_rdmsr, &cmd, 1, 1); smp_call_function(msr_smp_rdmsr, &cmd, 1, 1);
*eax = cmd.data[0]; *eax = cmd.data[0];
*edx = cmd.data[1]; *edx = cmd.data[1];
ret = cmd.err; ret = cmd.err;
} }
preempt_enable(); preempt_enable();
return ret; return ret;
} }
#else /* ! CONFIG_SMP */ #else /* ! CONFIG_SMP */
static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx) static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx)
{ {
return wrmsr_eio(reg, eax, edx); return wrmsr_eio(reg, eax, edx);
} }
static inline int do_rdmsr(int cpu, u32 reg, u32 *eax, u32 *edx) static inline int do_rdmsr(int cpu, u32 reg, u32 * eax, u32 * edx)
{ {
return rdmsr_eio(reg, eax, edx); return rdmsr_eio(reg, eax, edx);
} }
#endif /* ! CONFIG_SMP */ #endif /* ! CONFIG_SMP */
static loff_t msr_seek(struct file *file, loff_t offset, int orig) static loff_t msr_seek(struct file *file, loff_t offset, int orig)
{ {
loff_t ret = -EINVAL; loff_t ret = -EINVAL;
lock_kernel(); lock_kernel();
switch (orig) { switch (orig) {
case 0: case 0:
file->f_pos = offset; file->f_pos = offset;
ret = file->f_pos; ret = file->f_pos;
break; break;
case 1: case 1:
file->f_pos += offset; file->f_pos += offset;
ret = file->f_pos; ret = file->f_pos;
} }
unlock_kernel(); unlock_kernel();
return ret; return ret;
} }
static ssize_t msr_read(struct file * file, char __user * buf, static ssize_t msr_read(struct file *file, char __user * buf,
size_t count, loff_t *ppos) size_t count, loff_t * ppos)
{ {
u32 *tmp = (u32 *)buf; u32 *tmp = (u32 *) buf;
u32 data[2]; u32 data[2];
size_t rv; size_t rv;
u32 reg = *ppos; u32 reg = *ppos;
int cpu = iminor(file->f_dentry->d_inode); int cpu = iminor(file->f_dentry->d_inode);
int err; int err;
if ( count % 8 ) if (count % 8)
return -EINVAL; /* Invalid chunk size */ return -EINVAL; /* Invalid chunk size */
for ( rv = 0 ; count ; count -= 8 ) { for (rv = 0; count; count -= 8) {
err = do_rdmsr(cpu, reg, &data[0], &data[1]); err = do_rdmsr(cpu, reg, &data[0], &data[1]);
if ( err ) if (err)
return err; return err;
if ( copy_to_user(tmp,&data,8) ) if (copy_to_user(tmp, &data, 8))
return -EFAULT; return -EFAULT;
tmp += 2; tmp += 2;
} }
return ((char *)tmp) - buf; return ((char *)tmp) - buf;
} }
static ssize_t msr_write(struct file * file, const char __user * buf, static ssize_t msr_write(struct file *file, const char __user * buf,
size_t count, loff_t *ppos) size_t count, loff_t * ppos)
{ {
const u32 *tmp = (const u32 *)buf; const u32 *tmp = (const u32 *)buf;
u32 data[2]; u32 data[2];
size_t rv; size_t rv;
u32 reg = *ppos; u32 reg = *ppos;
int cpu = iminor(file->f_dentry->d_inode); int cpu = iminor(file->f_dentry->d_inode);
int err; int err;
if ( count % 8 ) if (count % 8)
return -EINVAL; /* Invalid chunk size */ return -EINVAL; /* Invalid chunk size */
for ( rv = 0 ; count ; count -= 8 ) { for (rv = 0; count; count -= 8) {
if ( copy_from_user(&data,tmp,8) ) if (copy_from_user(&data, tmp, 8))
return -EFAULT; return -EFAULT;
err = do_wrmsr(cpu, reg, data[0], data[1]); err = do_wrmsr(cpu, reg, data[0], data[1]);
if ( err ) if (err)
return err; return err;
tmp += 2; tmp += 2;
} }
return ((char *)tmp) - buf; return ((char *)tmp) - buf;
} }
static int msr_open(struct inode *inode, struct file *file) static int msr_open(struct inode *inode, struct file *file)
{ {
int cpu = iminor(file->f_dentry->d_inode); int cpu = iminor(file->f_dentry->d_inode);
struct cpuinfo_x86 *c = &(cpu_data)[cpu]; struct cpuinfo_x86 *c = &(cpu_data)[cpu];
if (!cpu_online(cpu)) if (!cpu_online(cpu))
return -ENXIO; /* No such CPU */ return -ENXIO; /* No such CPU */
if ( !cpu_has(c, X86_FEATURE_MSR) ) if (!cpu_has(c, X86_FEATURE_MSR))
return -EIO; /* MSR not supported */ return -EIO; /* MSR not supported */
return 0; return 0;
} }
/* /*
* File operations we support * File operations we support
*/ */
static struct file_operations msr_fops = { static struct file_operations msr_fops = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
.llseek = msr_seek, .llseek = msr_seek,
.read = msr_read, .read = msr_read,
.write = msr_write, .write = msr_write,
.open = msr_open, .open = msr_open,
}; };
int __init msr_init(void) int __init msr_init(void)
{ {
if (register_chrdev(MSR_MAJOR, "cpu/msr", &msr_fops)) { if (register_chrdev(MSR_MAJOR, "cpu/msr", &msr_fops)) {
printk(KERN_ERR "msr: unable to get major %d for msr\n", printk(KERN_ERR "msr: unable to get major %d for msr\n",
MSR_MAJOR); MSR_MAJOR);
return -EBUSY; return -EBUSY;
} }
return 0; return 0;
} }
void __exit msr_exit(void) void __exit msr_exit(void)
{ {
unregister_chrdev(MSR_MAJOR, "cpu/msr"); unregister_chrdev(MSR_MAJOR, "cpu/msr");
} }
module_init(msr_init); module_init(msr_init);
module_exit(msr_exit) module_exit(msr_exit)
MODULE_AUTHOR("H. Peter Anvin <hpa@zytor.com>"); MODULE_AUTHOR("H. Peter Anvin <hpa@zytor.com>");
MODULE_DESCRIPTION("x86 generic MSR driver"); MODULE_DESCRIPTION("x86 generic MSR driver");
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");
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