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Commit cb94f78e authored by Dmytro Laktyushkin's avatar Dmytro Laktyushkin Committed by Alex Deucher
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drm/amd/display: add mode support check to dml vba code 

Signed-off-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6d04ee9d
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Showing with 4604 additions and 1583 deletions
drivers/gpu/drm/amd/display/dc/dml/display_mode_enums.h
View file @ cb94f78e
...@@ -26,7 +26,7 @@ ...@@ -26,7 +26,7 @@
#define __DISPLAY_MODE_ENUMS_H__ #define __DISPLAY_MODE_ENUMS_H__
enum output_encoder_class { enum output_encoder_class {
dm_dp = 0, dm_hdmi = 1, dm_wb = 2 dm_dp = 0, dm_hdmi = 1, dm_wb = 2, dm_edp
}; };
enum output_format_class { enum output_format_class {
dm_444 = 0, dm_420 = 1, dm_n422, dm_s422 dm_444 = 0, dm_420 = 1, dm_n422, dm_s422
...@@ -39,7 +39,9 @@ enum source_format_class { ...@@ -39,7 +39,9 @@ enum source_format_class {
dm_420_10 = 4, dm_420_10 = 4,
dm_422_8 = 5, dm_422_8 = 5,
dm_422_10 = 6, dm_422_10 = 6,
dm_444_8 = 7 dm_444_8 = 7,
dm_mono_8,
dm_mono_16
}; };
enum output_bpc_class { enum output_bpc_class {
dm_out_6 = 0, dm_out_8 = 1, dm_out_10 = 2, dm_out_12 = 3, dm_out_16 = 4 dm_out_6 = 0, dm_out_8 = 1, dm_out_10 = 2, dm_out_12 = 3, dm_out_16 = 4
...@@ -79,7 +81,9 @@ enum dm_swizzle_mode { ...@@ -79,7 +81,9 @@ enum dm_swizzle_mode {
dm_sw_SPARE_15 = 28, dm_sw_SPARE_15 = 28,
dm_sw_var_s_x = 29, dm_sw_var_s_x = 29,
dm_sw_var_d_x = 30, dm_sw_var_d_x = 30,
dm_sw_64kb_r_x dm_sw_64kb_r_x,
dm_sw_gfx7_2d_thin_lvp,
dm_sw_gfx7_2d_thin_gl
}; };
enum lb_depth { enum lb_depth {
dm_lb_10 = 0, dm_lb_8 = 1, dm_lb_6 = 2, dm_lb_12 = 3, dm_lb_16 dm_lb_10 = 0, dm_lb_8 = 1, dm_lb_6 = 2, dm_lb_12 = 3, dm_lb_16
......
drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h
View file @ cb94f78e
...@@ -66,6 +66,7 @@ struct _vcs_dpi_mode_evaluation_st { ...@@ -66,6 +66,7 @@ struct _vcs_dpi_mode_evaluation_st {
struct _vcs_dpi_voltage_scaling_st { struct _vcs_dpi_voltage_scaling_st {
int state; int state;
double dscclk_mhz;
double dcfclk_mhz; double dcfclk_mhz;
double socclk_mhz; double socclk_mhz;
double dram_speed_mhz; double dram_speed_mhz;
...@@ -131,6 +132,9 @@ struct _vcs_dpi_ip_params_st { ...@@ -131,6 +132,9 @@ struct _vcs_dpi_ip_params_st {
unsigned int writeback_chroma_line_buffer_width_pixels; unsigned int writeback_chroma_line_buffer_width_pixels;
unsigned int max_page_table_levels; unsigned int max_page_table_levels;
unsigned int max_num_dpp; unsigned int max_num_dpp;
unsigned int max_num_otg;
unsigned int cursor_chunk_size;
unsigned int cursor_buffer_size;
unsigned int max_num_wb; unsigned int max_num_wb;
unsigned int max_dchub_pscl_bw_pix_per_clk; unsigned int max_dchub_pscl_bw_pix_per_clk;
unsigned int max_pscl_lb_bw_pix_per_clk; unsigned int max_pscl_lb_bw_pix_per_clk;
...@@ -224,6 +228,7 @@ struct writeback_st { ...@@ -224,6 +228,7 @@ struct writeback_st {
}; };
struct _vcs_dpi_display_output_params_st { struct _vcs_dpi_display_output_params_st {
int dp_lanes;
int output_bpp; int output_bpp;
int dsc_enable; int dsc_enable;
int wb_enable; int wb_enable;
......
drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c
View file @ cb94f78e
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drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h
View file @ cb94f78e
...@@ -79,6 +79,11 @@ double get_total_prefetch_bw( ...@@ -79,6 +79,11 @@ double get_total_prefetch_bw(
const display_e2e_pipe_params_st *pipes, const display_e2e_pipe_params_st *pipes,
unsigned int num_pipes); unsigned int num_pipes);
unsigned int dml_get_voltage_level(
struct display_mode_lib *mode_lib,
const display_e2e_pipe_params_st *pipes,
unsigned int num_pipes);
bool Calculate256BBlockSizes( bool Calculate256BBlockSizes(
enum source_format_class SourcePixelFormat, enum source_format_class SourcePixelFormat,
enum dm_swizzle_mode SurfaceTiling, enum dm_swizzle_mode SurfaceTiling,
...@@ -96,42 +101,41 @@ struct vba_vars_st { ...@@ -96,42 +101,41 @@ struct vba_vars_st {
mode_evaluation_st me; mode_evaluation_st me;
unsigned int MaximumMaxVStartupLines; unsigned int MaximumMaxVStartupLines;
double cursor_bw[DC__NUM_PIPES__MAX]; double cursor_bw[DC__NUM_DPP__MAX];
double meta_row_bw[DC__NUM_PIPES__MAX]; double meta_row_bw[DC__NUM_DPP__MAX];
double dpte_row_bw[DC__NUM_PIPES__MAX]; double dpte_row_bw[DC__NUM_DPP__MAX];
double qual_row_bw[DC__NUM_PIPES__MAX]; double qual_row_bw[DC__NUM_DPP__MAX];
double WritebackDISPCLK; double WritebackDISPCLK;
double PSCL_THROUGHPUT_LUMA[DC__NUM_PIPES__MAX]; double PSCL_THROUGHPUT_LUMA[DC__NUM_DPP__MAX];
double PSCL_THROUGHPUT_CHROMA[DC__NUM_PIPES__MAX]; double PSCL_THROUGHPUT_CHROMA[DC__NUM_DPP__MAX];
double DPPCLKUsingSingleDPPLuma; double DPPCLKUsingSingleDPPLuma;
double DPPCLKUsingSingleDPPChroma; double DPPCLKUsingSingleDPPChroma;
double DPPCLKUsingSingleDPP[DC__NUM_PIPES__MAX]; double DPPCLKUsingSingleDPP[DC__NUM_DPP__MAX];
double DISPCLKWithRamping; double DISPCLKWithRamping;
double DISPCLKWithoutRamping; double DISPCLKWithoutRamping;
double GlobalDPPCLK; double GlobalDPPCLK;
double MaxDispclk;
double DISPCLKWithRampingRoundedToDFSGranularity; double DISPCLKWithRampingRoundedToDFSGranularity;
double DISPCLKWithoutRampingRoundedToDFSGranularity; double DISPCLKWithoutRampingRoundedToDFSGranularity;
double MaxDispclkRoundedToDFSGranularity; double MaxDispclkRoundedToDFSGranularity;
bool DCCEnabledAnyPlane; bool DCCEnabledAnyPlane;
double ReturnBandwidthToDCN; double ReturnBandwidthToDCN;
unsigned int SwathWidthY[DC__NUM_PIPES__MAX]; unsigned int SwathWidthY[DC__NUM_DPP__MAX];
unsigned int SwathWidthSingleDPPY[DC__NUM_PIPES__MAX]; unsigned int SwathWidthSingleDPPY[DC__NUM_DPP__MAX];
double BytePerPixelDETY[DC__NUM_PIPES__MAX]; double BytePerPixelDETY[DC__NUM_DPP__MAX];
double BytePerPixelDETC[DC__NUM_PIPES__MAX]; double BytePerPixelDETC[DC__NUM_DPP__MAX];
double ReadBandwidthPlaneLuma[DC__NUM_PIPES__MAX]; double ReadBandwidthPlaneLuma[DC__NUM_DPP__MAX];
double ReadBandwidthPlaneChroma[DC__NUM_PIPES__MAX]; double ReadBandwidthPlaneChroma[DC__NUM_DPP__MAX];
unsigned int TotalActiveDPP; unsigned int TotalActiveDPP;
unsigned int TotalDCCActiveDPP; unsigned int TotalDCCActiveDPP;
double UrgentRoundTripAndOutOfOrderLatency; double UrgentRoundTripAndOutOfOrderLatency;
double DisplayPipeLineDeliveryTimeLuma[DC__NUM_PIPES__MAX]; // WM double DisplayPipeLineDeliveryTimeLuma[DC__NUM_DPP__MAX]; // WM
double DisplayPipeLineDeliveryTimeChroma[DC__NUM_PIPES__MAX]; // WM double DisplayPipeLineDeliveryTimeChroma[DC__NUM_DPP__MAX]; // WM
double LinesInDETY[DC__NUM_PIPES__MAX]; // WM double LinesInDETY[DC__NUM_DPP__MAX]; // WM
double LinesInDETC[DC__NUM_PIPES__MAX]; // WM double LinesInDETC[DC__NUM_DPP__MAX]; // WM
unsigned int LinesInDETYRoundedDownToSwath[DC__NUM_PIPES__MAX]; // WM unsigned int LinesInDETYRoundedDownToSwath[DC__NUM_DPP__MAX]; // WM
unsigned int LinesInDETCRoundedDownToSwath[DC__NUM_PIPES__MAX]; // WM unsigned int LinesInDETCRoundedDownToSwath[DC__NUM_DPP__MAX]; // WM
double FullDETBufferingTimeY[DC__NUM_PIPES__MAX]; // WM double FullDETBufferingTimeY[DC__NUM_DPP__MAX]; // WM
double FullDETBufferingTimeC[DC__NUM_PIPES__MAX]; // WM double FullDETBufferingTimeC[DC__NUM_DPP__MAX]; // WM
double MinFullDETBufferingTime; double MinFullDETBufferingTime;
double FrameTimeForMinFullDETBufferingTime; double FrameTimeForMinFullDETBufferingTime;
double AverageReadBandwidthGBytePerSecond; double AverageReadBandwidthGBytePerSecond;
...@@ -145,55 +149,54 @@ struct vba_vars_st { ...@@ -145,55 +149,54 @@ struct vba_vars_st {
double EffectiveDETPlusLBLinesChroma; double EffectiveDETPlusLBLinesChroma;
double UrgentLatencySupportUsLuma; double UrgentLatencySupportUsLuma;
double UrgentLatencySupportUsChroma; double UrgentLatencySupportUsChroma;
double UrgentLatencySupportUs[DC__NUM_PIPES__MAX]; double UrgentLatencySupportUs[DC__NUM_DPP__MAX];
unsigned int DSCFormatFactor; unsigned int DSCFormatFactor;
unsigned int BlockHeight256BytesY[DC__NUM_PIPES__MAX]; unsigned int BlockHeight256BytesY[DC__NUM_DPP__MAX];
unsigned int BlockHeight256BytesC[DC__NUM_PIPES__MAX]; unsigned int BlockHeight256BytesC[DC__NUM_DPP__MAX];
unsigned int BlockWidth256BytesY[DC__NUM_PIPES__MAX]; unsigned int BlockWidth256BytesY[DC__NUM_DPP__MAX];
unsigned int BlockWidth256BytesC[DC__NUM_PIPES__MAX]; unsigned int BlockWidth256BytesC[DC__NUM_DPP__MAX];
double VInitPreFillY[DC__NUM_PIPES__MAX]; double VInitPreFillY[DC__NUM_DPP__MAX];
double VInitPreFillC[DC__NUM_PIPES__MAX]; double VInitPreFillC[DC__NUM_DPP__MAX];
unsigned int MaxNumSwathY[DC__NUM_PIPES__MAX]; unsigned int MaxNumSwathY[DC__NUM_DPP__MAX];
unsigned int MaxNumSwathC[DC__NUM_PIPES__MAX]; unsigned int MaxNumSwathC[DC__NUM_DPP__MAX];
double PrefetchSourceLinesY[DC__NUM_PIPES__MAX]; double PrefetchSourceLinesY[DC__NUM_DPP__MAX];
double PrefetchSourceLinesC[DC__NUM_PIPES__MAX]; double PrefetchSourceLinesC[DC__NUM_DPP__MAX];
double PixelPTEBytesPerRow[DC__NUM_PIPES__MAX]; double PixelPTEBytesPerRow[DC__NUM_DPP__MAX];
double MetaRowByte[DC__NUM_PIPES__MAX]; double MetaRowByte[DC__NUM_DPP__MAX];
bool PTEBufferSizeNotExceeded; // not used unsigned int dpte_row_height[DC__NUM_DPP__MAX];
unsigned int dpte_row_height[DC__NUM_PIPES__MAX]; unsigned int dpte_row_height_chroma[DC__NUM_DPP__MAX];
unsigned int dpte_row_height_chroma[DC__NUM_PIPES__MAX]; unsigned int meta_row_height[DC__NUM_DPP__MAX];
unsigned int meta_row_height[DC__NUM_PIPES__MAX]; unsigned int meta_row_height_chroma[DC__NUM_DPP__MAX];
unsigned int meta_row_height_chroma[DC__NUM_PIPES__MAX];
unsigned int MacroTileWidthY[DC__NUM_DPP__MAX];
unsigned int MacroTileWidthY; unsigned int MacroTileWidthC[DC__NUM_DPP__MAX];
unsigned int MacroTileWidthC; unsigned int MaxVStartupLines[DC__NUM_DPP__MAX];
unsigned int MaxVStartupLines[DC__NUM_PIPES__MAX]; double WritebackDelay[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
double WritebackDelay[DC__NUM_PIPES__MAX];
bool PrefetchModeSupported; bool PrefetchModeSupported;
bool AllowDRAMClockChangeDuringVBlank[DC__NUM_PIPES__MAX]; bool AllowDRAMClockChangeDuringVBlank[DC__NUM_DPP__MAX];
bool AllowDRAMSelfRefreshDuringVBlank[DC__NUM_PIPES__MAX]; bool AllowDRAMSelfRefreshDuringVBlank[DC__NUM_DPP__MAX];
double RequiredPrefetchPixDataBW[DC__NUM_PIPES__MAX]; double RequiredPrefetchPixDataBW[DC__NUM_DPP__MAX];
double XFCRemoteSurfaceFlipDelay; double XFCRemoteSurfaceFlipDelay;
double TInitXFill; double TInitXFill;
double TslvChk; double TslvChk;
double SrcActiveDrainRate; double SrcActiveDrainRate;
double Tno_bw[DC__NUM_PIPES__MAX]; double Tno_bw[DC__NUM_DPP__MAX];
bool ImmediateFlipSupported; bool ImmediateFlipSupported;
double prefetch_vm_bw[DC__NUM_PIPES__MAX]; double prefetch_vm_bw[DC__NUM_DPP__MAX];
double prefetch_row_bw[DC__NUM_PIPES__MAX]; double prefetch_row_bw[DC__NUM_DPP__MAX];
bool ImmediateFlipSupportedForPipe[DC__NUM_PIPES__MAX]; bool ImmediateFlipSupportedForPipe[DC__NUM_DPP__MAX];
unsigned int VStartupLines; unsigned int VStartupLines;
double DisplayPipeLineDeliveryTimeLumaPrefetch[DC__NUM_PIPES__MAX]; double DisplayPipeLineDeliveryTimeLumaPrefetch[DC__NUM_DPP__MAX];
double DisplayPipeLineDeliveryTimeChromaPrefetch[DC__NUM_PIPES__MAX]; double DisplayPipeLineDeliveryTimeChromaPrefetch[DC__NUM_DPP__MAX];
unsigned int ActiveDPPs; unsigned int ActiveDPPs;
unsigned int LBLatencyHidingSourceLinesY; unsigned int LBLatencyHidingSourceLinesY;
unsigned int LBLatencyHidingSourceLinesC; unsigned int LBLatencyHidingSourceLinesC;
double ActiveDRAMClockChangeLatencyMargin[DC__NUM_PIPES__MAX]; double ActiveDRAMClockChangeLatencyMargin[DC__NUM_DPP__MAX];
double MinActiveDRAMClockChangeMargin; double MinActiveDRAMClockChangeMargin;
double XFCSlaveVUpdateOffset[DC__NUM_PIPES__MAX]; double XFCSlaveVUpdateOffset[DC__NUM_DPP__MAX];
double XFCSlaveVupdateWidth[DC__NUM_PIPES__MAX]; double XFCSlaveVupdateWidth[DC__NUM_DPP__MAX];
double XFCSlaveVReadyOffset[DC__NUM_PIPES__MAX]; double XFCSlaveVReadyOffset[DC__NUM_DPP__MAX];
double InitFillLevel; double InitFillLevel;
double FinalFillMargin; double FinalFillMargin;
double FinalFillLevel; double FinalFillLevel;
...@@ -276,71 +279,71 @@ struct vba_vars_st { ...@@ -276,71 +279,71 @@ struct vba_vars_st {
double DCFCLK; double DCFCLK;
unsigned int NumberOfActivePlanes; unsigned int NumberOfActivePlanes;
unsigned int ViewportWidth[DC__NUM_DPP]; unsigned int ViewportWidth[DC__NUM_DPP__MAX];
unsigned int ViewportHeight[DC__NUM_DPP]; unsigned int ViewportHeight[DC__NUM_DPP__MAX];
unsigned int ViewportYStartY[DC__NUM_DPP]; unsigned int ViewportYStartY[DC__NUM_DPP__MAX];
unsigned int ViewportYStartC[DC__NUM_DPP]; unsigned int ViewportYStartC[DC__NUM_DPP__MAX];
unsigned int PitchY[DC__NUM_DPP]; unsigned int PitchY[DC__NUM_DPP__MAX];
unsigned int PitchC[DC__NUM_DPP]; unsigned int PitchC[DC__NUM_DPP__MAX];
double HRatio[DC__NUM_DPP]; double HRatio[DC__NUM_DPP__MAX];
double VRatio[DC__NUM_DPP]; double VRatio[DC__NUM_DPP__MAX];
unsigned int htaps[DC__NUM_DPP]; unsigned int htaps[DC__NUM_DPP__MAX];
unsigned int vtaps[DC__NUM_DPP]; unsigned int vtaps[DC__NUM_DPP__MAX];
unsigned int HTAPsChroma[DC__NUM_DPP]; unsigned int HTAPsChroma[DC__NUM_DPP__MAX];
unsigned int VTAPsChroma[DC__NUM_DPP]; unsigned int VTAPsChroma[DC__NUM_DPP__MAX];
unsigned int HTotal[DC__NUM_DPP]; unsigned int HTotal[DC__NUM_DPP__MAX];
unsigned int VTotal[DC__NUM_DPP]; unsigned int VTotal[DC__NUM_DPP__MAX];
unsigned int DPPPerPlane[DC__NUM_DPP]; unsigned int DPPPerPlane[DC__NUM_DPP__MAX];
double PixelClock[DC__NUM_DPP]; double PixelClock[DC__NUM_DPP__MAX];
double PixelClockBackEnd[DC__NUM_DPP]; double PixelClockBackEnd[DC__NUM_DPP__MAX];
double DPPCLK[DC__NUM_DPP]; double DPPCLK[DC__NUM_DPP__MAX];
bool DCCEnable[DC__NUM_DPP]; bool DCCEnable[DC__NUM_DPP__MAX];
unsigned int DCCMetaPitchY[DC__NUM_DPP]; unsigned int DCCMetaPitchY[DC__NUM_DPP__MAX];
enum scan_direction_class SourceScan[DC__NUM_DPP]; enum scan_direction_class SourceScan[DC__NUM_DPP__MAX];
enum source_format_class SourcePixelFormat[DC__NUM_DPP]; enum source_format_class SourcePixelFormat[DC__NUM_DPP__MAX];
bool WritebackEnable[DC__NUM_DPP]; bool WritebackEnable[DC__NUM_DPP__MAX];
double WritebackDestinationWidth[DC__NUM_DPP]; double WritebackDestinationWidth[DC__NUM_DPP__MAX];
double WritebackDestinationHeight[DC__NUM_DPP]; double WritebackDestinationHeight[DC__NUM_DPP__MAX];
double WritebackSourceHeight[DC__NUM_DPP]; double WritebackSourceHeight[DC__NUM_DPP__MAX];
enum source_format_class WritebackPixelFormat[DC__NUM_DPP]; enum source_format_class WritebackPixelFormat[DC__NUM_DPP__MAX];
unsigned int WritebackLumaHTaps[DC__NUM_DPP]; unsigned int WritebackLumaHTaps[DC__NUM_DPP__MAX];
unsigned int WritebackLumaVTaps[DC__NUM_DPP]; unsigned int WritebackLumaVTaps[DC__NUM_DPP__MAX];
unsigned int WritebackChromaHTaps[DC__NUM_DPP]; unsigned int WritebackChromaHTaps[DC__NUM_DPP__MAX];
unsigned int WritebackChromaVTaps[DC__NUM_DPP]; unsigned int WritebackChromaVTaps[DC__NUM_DPP__MAX];
double WritebackHRatio[DC__NUM_DPP]; double WritebackHRatio[DC__NUM_DPP__MAX];
double WritebackVRatio[DC__NUM_DPP]; double WritebackVRatio[DC__NUM_DPP__MAX];
unsigned int HActive[DC__NUM_DPP]; unsigned int HActive[DC__NUM_DPP__MAX];
unsigned int VActive[DC__NUM_DPP]; unsigned int VActive[DC__NUM_DPP__MAX];
bool Interlace[DC__NUM_DPP]; bool Interlace[DC__NUM_DPP__MAX];
enum dm_swizzle_mode SurfaceTiling[DC__NUM_DPP]; enum dm_swizzle_mode SurfaceTiling[DC__NUM_DPP__MAX];
unsigned int ScalerRecoutWidth[DC__NUM_DPP]; unsigned int ScalerRecoutWidth[DC__NUM_DPP__MAX];
bool DynamicMetadataEnable[DC__NUM_DPP]; bool DynamicMetadataEnable[DC__NUM_DPP__MAX];
unsigned int DynamicMetadataLinesBeforeActiveRequired[DC__NUM_DPP]; unsigned int DynamicMetadataLinesBeforeActiveRequired[DC__NUM_DPP__MAX];
unsigned int DynamicMetadataTransmittedBytes[DC__NUM_DPP]; unsigned int DynamicMetadataTransmittedBytes[DC__NUM_DPP__MAX];
double DCCRate[DC__NUM_DPP]; double DCCRate[DC__NUM_DPP__MAX];
bool ODMCombineEnabled[DC__NUM_DPP]; bool ODMCombineEnabled[DC__NUM_DPP__MAX];
double OutputBpp[DC__NUM_DPP]; double OutputBpp[DC__NUM_DPP__MAX];
unsigned int NumberOfDSCSlices[DC__NUM_DPP]; unsigned int NumberOfDSCSlices[DC__NUM_DPP__MAX];
bool DSCEnabled[DC__NUM_DPP]; bool DSCEnabled[DC__NUM_DPP__MAX];
unsigned int DSCDelay[DC__NUM_DPP]; unsigned int DSCDelay[DC__NUM_DPP__MAX];
unsigned int DSCInputBitPerComponent[DC__NUM_DPP]; unsigned int DSCInputBitPerComponent[DC__NUM_DPP__MAX];
enum output_format_class OutputFormat[DC__NUM_DPP]; enum output_format_class OutputFormat[DC__NUM_DPP__MAX];
enum output_encoder_class Output[DC__NUM_DPP]; enum output_encoder_class Output[DC__NUM_DPP__MAX];
unsigned int BlendingAndTiming[DC__NUM_DPP]; unsigned int BlendingAndTiming[DC__NUM_DPP__MAX];
bool SynchronizedVBlank; bool SynchronizedVBlank;
unsigned int NumberOfCursors[DC__NUM_DPP]; unsigned int NumberOfCursors[DC__NUM_DPP__MAX];
unsigned int CursorWidth[DC__NUM_DPP][DC__NUM_CURSOR]; unsigned int CursorWidth[DC__NUM_DPP__MAX][DC__NUM_CURSOR];
unsigned int CursorBPP[DC__NUM_DPP][DC__NUM_CURSOR]; unsigned int CursorBPP[DC__NUM_DPP__MAX][DC__NUM_CURSOR];
bool XFCEnabled[DC__NUM_DPP]; bool XFCEnabled[DC__NUM_DPP__MAX];
bool ScalerEnabled[DC__NUM_DPP]; bool ScalerEnabled[DC__NUM_DPP__MAX];
// Intermediates/Informational // Intermediates/Informational
bool ImmediateFlipSupport; bool ImmediateFlipSupport;
unsigned int SwathHeightY[DC__NUM_DPP]; unsigned int SwathHeightY[DC__NUM_DPP__MAX];
unsigned int SwathHeightC[DC__NUM_DPP]; unsigned int SwathHeightC[DC__NUM_DPP__MAX];
unsigned int DETBufferSizeY[DC__NUM_DPP]; unsigned int DETBufferSizeY[DC__NUM_DPP__MAX];
unsigned int DETBufferSizeC[DC__NUM_DPP]; unsigned int DETBufferSizeC[DC__NUM_DPP__MAX];
unsigned int LBBitPerPixel[DC__NUM_DPP]; unsigned int LBBitPerPixel[DC__NUM_DPP__MAX];
double LastPixelOfLineExtraWatermark; double LastPixelOfLineExtraWatermark;
double TotalDataReadBandwidth; double TotalDataReadBandwidth;
unsigned int TotalActiveWriteback; unsigned int TotalActiveWriteback;
...@@ -349,9 +352,9 @@ struct vba_vars_st { ...@@ -349,9 +352,9 @@ struct vba_vars_st {
double BandwidthAvailableForImmediateFlip; double BandwidthAvailableForImmediateFlip;
unsigned int PrefetchMode; unsigned int PrefetchMode;
bool IgnoreViewportPositioning; bool IgnoreViewportPositioning;
double PrefetchBandwidth[DC__NUM_DPP]; double PrefetchBandwidth[DC__NUM_DPP__MAX];
bool ErrorResult[DC__NUM_DPP]; bool ErrorResult[DC__NUM_DPP__MAX];
double PDEAndMetaPTEBytesFrame[DC__NUM_DPP]; double PDEAndMetaPTEBytesFrame[DC__NUM_DPP__MAX];
// //
// Calculated dml_ml->vba.Outputs // Calculated dml_ml->vba.Outputs
...@@ -376,35 +379,200 @@ struct vba_vars_st { ...@@ -376,35 +379,200 @@ struct vba_vars_st {
// used explicitly. They are fetched by tests and then possibly used. The // used explicitly. They are fetched by tests and then possibly used. The
// ultimate values to use are the ones specified by the parameters to DML // ultimate values to use are the ones specified by the parameters to DML
double DISPCLK_calculated; double DISPCLK_calculated;
double DSCCLK_calculated[DC__NUM_DPP]; double DSCCLK_calculated[DC__NUM_DPP__MAX];
double DPPCLK_calculated[DC__NUM_DPP]; double DPPCLK_calculated[DC__NUM_DPP__MAX];
unsigned int VStartup[DC__NUM_DPP]; unsigned int VStartup[DC__NUM_DPP__MAX];
unsigned int VStartupRequiredWhenNotEnoughTimeForDynamicMetadata; unsigned int VStartupRequiredWhenNotEnoughTimeForDynamicMetadata;
double ImmediateFlipBW; double ImmediateFlipBW;
unsigned int TotImmediateFlipBytes; unsigned int TotImmediateFlipBytes;
double TCalc; double TCalc;
double MinTTUVBlank[DC__NUM_DPP]; double MinTTUVBlank[DC__NUM_DPP__MAX];
double VRatioPrefetchY[DC__NUM_DPP]; double VRatioPrefetchY[DC__NUM_DPP__MAX];
double VRatioPrefetchC[DC__NUM_DPP]; double VRatioPrefetchC[DC__NUM_DPP__MAX];
double DSTXAfterScaler[DC__NUM_DPP]; double DSTXAfterScaler[DC__NUM_DPP__MAX];
double DSTYAfterScaler[DC__NUM_DPP]; double DSTYAfterScaler[DC__NUM_DPP__MAX];
double DestinationLinesToRequestVMInVBlank[DC__NUM_DPP]; double DestinationLinesToRequestVMInVBlank[DC__NUM_DPP__MAX];
double DestinationLinesToRequestRowInVBlank[DC__NUM_DPP]; double DestinationLinesToRequestRowInVBlank[DC__NUM_DPP__MAX];
double DestinationLinesForPrefetch[DC__NUM_DPP]; double DestinationLinesForPrefetch[DC__NUM_DPP__MAX];
double DestinationLinesToRequestRowInImmediateFlip[DC__NUM_DPP]; double DestinationLinesToRequestRowInImmediateFlip[DC__NUM_DPP__MAX];
double DestinationLinesToRequestVMInImmediateFlip[DC__NUM_DPP]; double DestinationLinesToRequestVMInImmediateFlip[DC__NUM_DPP__MAX];
double XFCTransferDelay[DC__NUM_DPP]; double XFCTransferDelay[DC__NUM_DPP__MAX];
double XFCPrechargeDelay[DC__NUM_DPP]; double XFCPrechargeDelay[DC__NUM_DPP__MAX];
double XFCRemoteSurfaceFlipLatency[DC__NUM_DPP]; double XFCRemoteSurfaceFlipLatency[DC__NUM_DPP__MAX];
double XFCPrefetchMargin[DC__NUM_DPP]; double XFCPrefetchMargin[DC__NUM_DPP__MAX];
display_e2e_pipe_params_st cache_pipes[DC__NUM_DPP]; display_e2e_pipe_params_st cache_pipes[DC__NUM_DPP__MAX];
unsigned int cache_num_pipes; unsigned int cache_num_pipes;
unsigned int pipe_plane[DC__NUM_PIPES__MAX]; unsigned int pipe_plane[DC__NUM_DPP__MAX];
/* vba mode support */
/*inputs*/
bool SupportGFX7CompatibleTilingIn32bppAnd64bpp;
double MaxHSCLRatio;
double MaxVSCLRatio;
unsigned int MaxNumWriteback;
bool WritebackLumaAndChromaScalingSupported;
bool Cursor64BppSupport;
double DCFCLKPerState[DC__VOLTAGE_STATES + 1];
double FabricClockPerState[DC__VOLTAGE_STATES + 1];
double SOCCLKPerState[DC__VOLTAGE_STATES + 1];
double PHYCLKPerState[DC__VOLTAGE_STATES + 1];
double MaxDppclk[DC__VOLTAGE_STATES + 1];
double MaxDSCCLK[DC__VOLTAGE_STATES + 1];
double DRAMSpeedPerState[DC__VOLTAGE_STATES + 1];
double MaxDispclk[DC__VOLTAGE_STATES + 1];
/*outputs*/
bool ScaleRatioAndTapsSupport;
bool SourceFormatPixelAndScanSupport;
unsigned int SwathWidthYSingleDPP[DC__NUM_DPP__MAX];
double BytePerPixelInDETY[DC__NUM_DPP__MAX];
double BytePerPixelInDETC[DC__NUM_DPP__MAX];
double TotalReadBandwidthConsumedGBytePerSecond;
double ReadBandwidth[DC__NUM_DPP__MAX];
double TotalWriteBandwidthConsumedGBytePerSecond;
double WriteBandwidth[DC__NUM_DPP__MAX];
double TotalBandwidthConsumedGBytePerSecond;
bool DCCEnabledInAnyPlane;
bool WritebackLatencySupport;
bool WritebackModeSupport;
bool Writeback10bpc420Supported;
bool BandwidthSupport[DC__VOLTAGE_STATES + 1];
unsigned int TotalNumberOfActiveWriteback;
double CriticalPoint;
double ReturnBWToDCNPerState;
double FabricAndDRAMBandwidthPerState[DC__VOLTAGE_STATES + 1];
double ReturnBWPerState[DC__VOLTAGE_STATES + 1];
double UrgentRoundTripAndOutOfOrderLatencyPerState[DC__VOLTAGE_STATES + 1];
bool ODMCombineEnablePerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
bool PTEBufferSizeNotExceededY[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
bool PTEBufferSizeNotExceededC[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
bool PrefetchSupported[DC__VOLTAGE_STATES + 1];
bool VRatioInPrefetchSupported[DC__VOLTAGE_STATES + 1];
bool DISPCLK_DPPCLK_Support[DC__VOLTAGE_STATES + 1];
bool TotalAvailablePipesSupport[DC__VOLTAGE_STATES + 1];
bool UrgentLatencySupport[DC__VOLTAGE_STATES + 1];
bool ModeSupport[DC__VOLTAGE_STATES + 1];
bool DIOSupport[DC__VOLTAGE_STATES + 1];
bool NotEnoughDSCUnits[DC__VOLTAGE_STATES + 1];
bool DSCCLKRequiredMoreThanSupported[DC__VOLTAGE_STATES + 1];
bool ROBSupport[DC__VOLTAGE_STATES + 1];
bool PTEBufferSizeNotExceeded[DC__VOLTAGE_STATES + 1];
bool RequiresDSC[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
bool IsErrorResult[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
bool ViewportSizeSupport[DC__VOLTAGE_STATES + 1];
bool prefetch_vm_bw_valid;
bool prefetch_row_bw_valid;
bool NumberOfOTGSupport;
bool NonsupportedDSCInputBPC;
bool WritebackScaleRatioAndTapsSupport;
bool CursorSupport;
bool PitchSupport;
double WritebackLineBufferLumaBufferSize;
double WritebackLineBufferChromaBufferSize;
double WritebackMinHSCLRatio;
double WritebackMinVSCLRatio;
double WritebackMaxHSCLRatio;
double WritebackMaxVSCLRatio;
double WritebackMaxHSCLTaps;
double WritebackMaxVSCLTaps;
unsigned int MaxNumDPP;
unsigned int MaxNumOTG;
double CursorBufferSize;
double CursorChunkSize;
unsigned int Mode;
double NoOfDPP[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
double OutputLinkDPLanes[DC__NUM_DPP__MAX];
double SwathWidthYPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
double SwathHeightYPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
double SwathHeightCPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
double UrgentLatencySupportUsPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
double VRatioPreY[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
double VRatioPreC[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
double RequiredPrefetchPixelDataBW[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
double RequiredDPPCLK[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
double RequiredDISPCLK[DC__VOLTAGE_STATES + 1];
double TotalNumberOfActiveDPP[DC__VOLTAGE_STATES + 1];
double TotalNumberOfDCCActiveDPP[DC__VOLTAGE_STATES + 1];
double PrefetchBW[DC__NUM_DPP__MAX];
double PDEAndMetaPTEBytesPerFrame[DC__NUM_DPP__MAX];
double MetaRowBytes[DC__NUM_DPP__MAX];
double DPTEBytesPerRow[DC__NUM_DPP__MAX];
double PrefetchLinesY[DC__NUM_DPP__MAX];
double PrefetchLinesC[DC__NUM_DPP__MAX];
unsigned int MaxNumSwY[DC__NUM_DPP__MAX];
unsigned int MaxNumSwC[DC__NUM_DPP__MAX];
double PrefillY[DC__NUM_DPP__MAX];
double PrefillC[DC__NUM_DPP__MAX];
double LineTimesForPrefetch[DC__NUM_DPP__MAX];
double LinesForMetaPTE[DC__NUM_DPP__MAX];
double LinesForMetaAndDPTERow[DC__NUM_DPP__MAX];
double MinDPPCLKUsingSingleDPP[DC__NUM_DPP__MAX];
double RequiresFEC[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
unsigned int OutputBppPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
double DSCDelayPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
unsigned int Read256BlockHeightY[DC__NUM_DPP__MAX];
unsigned int Read256BlockWidthY[DC__NUM_DPP__MAX];
unsigned int Read256BlockHeightC[DC__NUM_DPP__MAX];
unsigned int Read256BlockWidthC[DC__NUM_DPP__MAX];
unsigned int ImmediateFlipBytes[DC__NUM_DPP__MAX];
double MaxSwathHeightY[DC__NUM_DPP__MAX];
double MaxSwathHeightC[DC__NUM_DPP__MAX];
double MinSwathHeightY[DC__NUM_DPP__MAX];
double MinSwathHeightC[DC__NUM_DPP__MAX];
double PSCL_FACTOR[DC__NUM_DPP__MAX];
double PSCL_FACTOR_CHROMA[DC__NUM_DPP__MAX];
double MaximumVStartup[DC__NUM_DPP__MAX];
double AlignedDCCMetaPitch[DC__NUM_DPP__MAX];
double AlignedYPitch[DC__NUM_DPP__MAX];
double AlignedCPitch[DC__NUM_DPP__MAX];
double MaximumSwathWidth[DC__NUM_DPP__MAX];
double final_flip_bw[DC__NUM_DPP__MAX];
double ImmediateFlipSupportedForState[DC__VOLTAGE_STATES + 1];
double WritebackLumaVExtra;
double WritebackChromaVExtra;
double WritebackRequiredDISPCLK;
double MaximumSwathWidthSupport;
double MaximumSwathWidthInDETBuffer;
double MaximumSwathWidthInLineBuffer;
double MaxDispclkRoundedDownToDFSGranularity;
double MaxDppclkRoundedDownToDFSGranularity;
double PlaneRequiredDISPCLKWithoutODMCombine;
double PlaneRequiredDISPCLK;
double TotalNumberOfActiveOTG;
double FECOverhead;
double EffectiveFECOverhead;
unsigned int Outbpp;
unsigned int OutbppDSC;
double TotalDSCUnitsRequired;
double bpp;
unsigned int slices;
double SwathWidthGranularityY;
double RoundedUpMaxSwathSizeBytesY;
double SwathWidthGranularityC;
double RoundedUpMaxSwathSizeBytesC;
double LinesInDETLuma;
double LinesInDETChroma;
double EffectiveDETLBLinesLuma;
double EffectiveDETLBLinesChroma;
double ProjectedDCFCLKDeepSleep;
double PDEAndMetaPTEBytesPerFrameY;
double PDEAndMetaPTEBytesPerFrameC;
unsigned int MetaRowBytesY;
unsigned int MetaRowBytesC;
unsigned int DPTEBytesPerRowC;
unsigned int DPTEBytesPerRowY;
double ExtraLatency;
double TimeCalc;
double TWait;
double MaximumReadBandwidthWithPrefetch;
double total_dcn_read_bw_with_flip;
}; };
#endif /* _DML2_DISPLAY_MODE_VBA_H_ */ #endif /* _DML2_DISPLAY_MODE_VBA_H_ */
drivers/gpu/drm/amd/display/dc/dml/dml_common_defs.c
View file @ cb94f78e
...@@ -35,6 +35,18 @@ double dml_max(double a, double b) ...@@ -35,6 +35,18 @@ double dml_max(double a, double b)
{ {
return (double) dcn_bw_max2(a, b); return (double) dcn_bw_max2(a, b);
} }
double dml_max3(double a, double b, double c)
{
return dml_max(dml_max(a, b), c);
}
double dml_max4(double a, double b, double c, double d)
{
return dml_max(dml_max(a, b), dml_max(c, d));
}
double dml_max5(double a, double b, double c, double d, double e)
{
return dml_max(dml_max4(a, b, c, d), e);
}
double dml_ceil(double a, double granularity) double dml_ceil(double a, double granularity)
{ {
......
drivers/gpu/drm/amd/display/dc/dml/dml_common_defs.h
View file @ cb94f78e
...@@ -36,6 +36,9 @@ ...@@ -36,6 +36,9 @@
double dml_min(double a, double b); double dml_min(double a, double b);
double dml_max(double a, double b); double dml_max(double a, double b);
double dml_max3(double a, double b, double c);
double dml_max4(double a, double b, double c, double d);
double dml_max5(double a, double b, double c, double d, double e);
bool dml_util_is_420(enum source_format_class sorce_format); bool dml_util_is_420(enum source_format_class sorce_format);
double dml_ceil_ex(double x, double granularity); double dml_ceil_ex(double x, double granularity);
double dml_floor_ex(double x, double granularity); double dml_floor_ex(double x, double granularity);
......
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