Commit cbb9a572 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman

Merge tag 'fpga-for-6.1-rc1' of...

Merge tag 'fpga-for-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga into char-misc-next

Xu writes:

FPGA Manager changes for 6.1-rc1

DFL

- Matthew's change adds new device IDs supported by DFL.
- Dan's change uses array_size() for memory allocation to prevent
potential overflow

Microchip

- Conor's change adds MODULE_AUTHOR entry for microchip-spi driver
- Krzysztof's change refines dt-bindings

Intel m10 bmc secure update

- Russ's change adds new device ID supported by the driver

All patches have been reviewed on the mailing list, and have been in the
last linux-next releases (as part of our for-next branch).
Signed-off-by: default avatarXu Yilun <yilun.xu@intel.com>

* tag 'fpga-for-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/fpga/linux-fpga:
  fpga: m10bmc-sec: d5005 bmc secure update driver
  fpga: prevent integer overflow in dfl_feature_ioctl_set_irq()
  dt-bindings: fpga: microchip,mpf-spi-fpga-mgr: use spi-peripheral-props.yaml
  fpga: microchip-spi: add missing module author entry
  fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards
parents ceecbbdd 562d0bf2
...@@ -22,13 +22,14 @@ properties: ...@@ -22,13 +22,14 @@ properties:
description: SPI chip select description: SPI chip select
maxItems: 1 maxItems: 1
spi-max-frequency: true
required: required:
- compatible - compatible
- reg - reg
additionalProperties: false allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples: examples:
- | - |
......
...@@ -77,12 +77,18 @@ static void cci_pci_free_irq(struct pci_dev *pcidev) ...@@ -77,12 +77,18 @@ static void cci_pci_free_irq(struct pci_dev *pcidev)
#define PCIE_DEVICE_ID_INTEL_PAC_D5005 0x0B2B #define PCIE_DEVICE_ID_INTEL_PAC_D5005 0x0B2B
#define PCIE_DEVICE_ID_SILICOM_PAC_N5010 0x1000 #define PCIE_DEVICE_ID_SILICOM_PAC_N5010 0x1000
#define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001 #define PCIE_DEVICE_ID_SILICOM_PAC_N5011 0x1001
#define PCIE_DEVICE_ID_INTEL_DFL 0xbcce
/* PCI Subdevice ID for PCIE_DEVICE_ID_INTEL_DFL */
#define PCIE_SUBDEVICE_ID_INTEL_N6000 0x1770
#define PCIE_SUBDEVICE_ID_INTEL_N6001 0x1771
#define PCIE_SUBDEVICE_ID_INTEL_C6100 0x17d4
/* VF Device */ /* VF Device */
#define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF #define PCIE_DEVICE_ID_VF_INT_5_X 0xBCBF
#define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1 #define PCIE_DEVICE_ID_VF_INT_6_X 0xBCC1
#define PCIE_DEVICE_ID_VF_DSC_1_X 0x09C5 #define PCIE_DEVICE_ID_VF_DSC_1_X 0x09C5
#define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF 0x0B2C #define PCIE_DEVICE_ID_INTEL_PAC_D5005_VF 0x0B2C
#define PCIE_DEVICE_ID_INTEL_DFL_VF 0xbccf
static struct pci_device_id cci_pcie_id_tbl[] = { static struct pci_device_id cci_pcie_id_tbl[] = {
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_PF_INT_5_X),}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_PF_INT_5_X),},
...@@ -96,6 +102,18 @@ static struct pci_device_id cci_pcie_id_tbl[] = { ...@@ -96,6 +102,18 @@ static struct pci_device_id cci_pcie_id_tbl[] = {
{PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),}, {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_PAC_D5005_VF),},
{PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),}, {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5010),},
{PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),}, {PCI_DEVICE(PCI_VENDOR_ID_SILICOM_DENMARK, PCIE_DEVICE_ID_SILICOM_PAC_N5011),},
{PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),},
{PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6000),},
{PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),},
{PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_N6001),},
{PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL,
PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),},
{PCI_DEVICE_SUB(PCI_VENDOR_ID_INTEL, PCIE_DEVICE_ID_INTEL_DFL_VF,
PCI_VENDOR_ID_INTEL, PCIE_SUBDEVICE_ID_INTEL_C6100),},
{0,} {0,}
}; };
MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl); MODULE_DEVICE_TABLE(pci, cci_pcie_id_tbl);
......
...@@ -1866,7 +1866,7 @@ long dfl_feature_ioctl_set_irq(struct platform_device *pdev, ...@@ -1866,7 +1866,7 @@ long dfl_feature_ioctl_set_irq(struct platform_device *pdev,
return -EINVAL; return -EINVAL;
fds = memdup_user((void __user *)(arg + sizeof(hdr)), fds = memdup_user((void __user *)(arg + sizeof(hdr)),
hdr.count * sizeof(s32)); array_size(hdr.count, sizeof(s32)));
if (IS_ERR(fds)) if (IS_ERR(fds))
return PTR_ERR(fds); return PTR_ERR(fds);
......
...@@ -605,6 +605,9 @@ static const struct platform_device_id intel_m10bmc_sec_ids[] = { ...@@ -605,6 +605,9 @@ static const struct platform_device_id intel_m10bmc_sec_ids[] = {
{ {
.name = "n3000bmc-sec-update", .name = "n3000bmc-sec-update",
}, },
{
.name = "d5005bmc-sec-update",
},
{ } { }
}; };
MODULE_DEVICE_TABLE(platform, intel_m10bmc_sec_ids); MODULE_DEVICE_TABLE(platform, intel_m10bmc_sec_ids);
......
...@@ -395,4 +395,5 @@ static struct spi_driver mpf_driver = { ...@@ -395,4 +395,5 @@ static struct spi_driver mpf_driver = {
module_spi_driver(mpf_driver); module_spi_driver(mpf_driver);
MODULE_DESCRIPTION("Microchip Polarfire SPI FPGA Manager"); MODULE_DESCRIPTION("Microchip Polarfire SPI FPGA Manager");
MODULE_AUTHOR("Ivan Bornyakov <i.bornyakov@metrotek.ru>");
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");
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