Commit cc216dfd authored by Hsin-Yi, Wang's avatar Hsin-Yi, Wang Committed by Matthias Brugger

arm64: dts: mt8183: add capacity-dmips-mhz

Pinned the frequency to the max and run dhrystone to get the value.
little cpu: 11071 (max freq: 1989000)
big cpu: 15293 (max freq: 1989000)

11071 : 15293 ~= 741 : 1024
Signed-off-by: default avatarErin Lo <erin.lo@mediatek.com>
Signed-off-by: default avatarHsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent e526c9bc
...@@ -56,6 +56,7 @@ cpu0: cpu@0 { ...@@ -56,6 +56,7 @@ cpu0: cpu@0 {
compatible = "arm,cortex-a53"; compatible = "arm,cortex-a53";
reg = <0x000>; reg = <0x000>;
enable-method = "psci"; enable-method = "psci";
capacity-dmips-mhz = <741>;
}; };
cpu1: cpu@1 { cpu1: cpu@1 {
...@@ -63,6 +64,7 @@ cpu1: cpu@1 { ...@@ -63,6 +64,7 @@ cpu1: cpu@1 {
compatible = "arm,cortex-a53"; compatible = "arm,cortex-a53";
reg = <0x001>; reg = <0x001>;
enable-method = "psci"; enable-method = "psci";
capacity-dmips-mhz = <741>;
}; };
cpu2: cpu@2 { cpu2: cpu@2 {
...@@ -70,6 +72,7 @@ cpu2: cpu@2 { ...@@ -70,6 +72,7 @@ cpu2: cpu@2 {
compatible = "arm,cortex-a53"; compatible = "arm,cortex-a53";
reg = <0x002>; reg = <0x002>;
enable-method = "psci"; enable-method = "psci";
capacity-dmips-mhz = <741>;
}; };
cpu3: cpu@3 { cpu3: cpu@3 {
...@@ -77,6 +80,7 @@ cpu3: cpu@3 { ...@@ -77,6 +80,7 @@ cpu3: cpu@3 {
compatible = "arm,cortex-a53"; compatible = "arm,cortex-a53";
reg = <0x003>; reg = <0x003>;
enable-method = "psci"; enable-method = "psci";
capacity-dmips-mhz = <741>;
}; };
cpu4: cpu@100 { cpu4: cpu@100 {
...@@ -84,6 +88,7 @@ cpu4: cpu@100 { ...@@ -84,6 +88,7 @@ cpu4: cpu@100 {
compatible = "arm,cortex-a73"; compatible = "arm,cortex-a73";
reg = <0x100>; reg = <0x100>;
enable-method = "psci"; enable-method = "psci";
capacity-dmips-mhz = <1024>;
}; };
cpu5: cpu@101 { cpu5: cpu@101 {
...@@ -91,6 +96,7 @@ cpu5: cpu@101 { ...@@ -91,6 +96,7 @@ cpu5: cpu@101 {
compatible = "arm,cortex-a73"; compatible = "arm,cortex-a73";
reg = <0x101>; reg = <0x101>;
enable-method = "psci"; enable-method = "psci";
capacity-dmips-mhz = <1024>;
}; };
cpu6: cpu@102 { cpu6: cpu@102 {
...@@ -98,6 +104,7 @@ cpu6: cpu@102 { ...@@ -98,6 +104,7 @@ cpu6: cpu@102 {
compatible = "arm,cortex-a73"; compatible = "arm,cortex-a73";
reg = <0x102>; reg = <0x102>;
enable-method = "psci"; enable-method = "psci";
capacity-dmips-mhz = <1024>;
}; };
cpu7: cpu@103 { cpu7: cpu@103 {
...@@ -105,6 +112,7 @@ cpu7: cpu@103 { ...@@ -105,6 +112,7 @@ cpu7: cpu@103 {
compatible = "arm,cortex-a73"; compatible = "arm,cortex-a73";
reg = <0x103>; reg = <0x103>;
enable-method = "psci"; enable-method = "psci";
capacity-dmips-mhz = <1024>;
}; };
}; };
......
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