Commit cc3a1378 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman

Revert "PCI: PCIE ASPM support"

This reverts commit 6c723d5b.

It caused build errors on non-x86 platforms, config file confusion, and
even some boot errors on some x86-64 boxes.  All around, not quite ready
for prime-time :(

Cc: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent ae9458d6
...@@ -21,7 +21,6 @@ ...@@ -21,7 +21,6 @@
#include <linux/topology.h> #include <linux/topology.h>
#include <linux/mm.h> #include <linux/mm.h>
#include <linux/capability.h> #include <linux/capability.h>
#include <linux/aspm.h>
#include "pci.h" #include "pci.h"
static int sysfs_initialized; /* = 0 */ static int sysfs_initialized; /* = 0 */
...@@ -651,8 +650,6 @@ int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev) ...@@ -651,8 +650,6 @@ int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
if (pcibios_add_platform_entries(pdev)) if (pcibios_add_platform_entries(pdev))
goto err_rom_file; goto err_rom_file;
pcie_aspm_create_sysfs_dev_files(pdev);
return 0; return 0;
err_rom_file: err_rom_file:
...@@ -682,8 +679,6 @@ void pci_remove_sysfs_dev_files(struct pci_dev *pdev) ...@@ -682,8 +679,6 @@ void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
if (!sysfs_initialized) if (!sysfs_initialized)
return; return;
pcie_aspm_remove_sysfs_dev_files(pdev);
if (pdev->cfg_size < 4096) if (pdev->cfg_size < 4096)
sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
else else
......
...@@ -18,7 +18,6 @@ ...@@ -18,7 +18,6 @@
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <linux/string.h> #include <linux/string.h>
#include <linux/log2.h> #include <linux/log2.h>
#include <linux/aspm.h>
#include <asm/dma.h> /* isa_dma_bridge_buggy */ #include <asm/dma.h> /* isa_dma_bridge_buggy */
#include "pci.h" #include "pci.h"
...@@ -520,9 +519,6 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state) ...@@ -520,9 +519,6 @@ pci_set_power_state(struct pci_dev *dev, pci_power_t state)
if (need_restore) if (need_restore)
pci_restore_bars(dev); pci_restore_bars(dev);
if (dev->bus->self)
pcie_aspm_pm_state_change(dev->bus->self);
return 0; return 0;
} }
......
...@@ -26,23 +26,3 @@ config HOTPLUG_PCI_PCIE ...@@ -26,23 +26,3 @@ config HOTPLUG_PCI_PCIE
When in doubt, say N. When in doubt, say N.
source "drivers/pci/pcie/aer/Kconfig" source "drivers/pci/pcie/aer/Kconfig"
#
# PCI Express ASPM
#
config PCIEASPM
bool "PCI Express ASPM support(Experimental)"
depends on PCI && EXPERIMENTAL
default y
help
This enables PCI Express ASPM (Active State Power Management) and
Clock Power Management. ASPM supports state L0/L0s/L1.
When in doubt, say N.
config PCIEASPM_DEBUG
bool "Debug PCI Express ASPM"
depends on PCIEASPM
default n
help
This enables PCI Express ASPM debug support. It will add per-device
interface to control ASPM.
...@@ -2,9 +2,6 @@ ...@@ -2,9 +2,6 @@
# Makefile for PCI-Express PORT Driver # Makefile for PCI-Express PORT Driver
# #
# Build PCI Express ASPM if needed
obj-$(CONFIG_PCIEASPM) += aspm.o
pcieportdrv-y := portdrv_core.o portdrv_pci.o portdrv_bus.o pcieportdrv-y := portdrv_core.o portdrv_pci.o portdrv_bus.o
obj-$(CONFIG_PCIEPORTBUS) += pcieportdrv.o obj-$(CONFIG_PCIEPORTBUS) += pcieportdrv.o
......
This diff is collapsed.
...@@ -9,7 +9,6 @@ ...@@ -9,7 +9,6 @@
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/cpumask.h> #include <linux/cpumask.h>
#include <linux/aspm.h>
#include "pci.h" #include "pci.h"
#define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */ #define CARDBUS_LATENCY_TIMER 176 /* secondary latency timer */
...@@ -1002,10 +1001,6 @@ int pci_scan_slot(struct pci_bus *bus, int devfn) ...@@ -1002,10 +1001,6 @@ int pci_scan_slot(struct pci_bus *bus, int devfn)
break; break;
} }
} }
if (bus->self)
pcie_aspm_init_link_state(bus->self);
return nr; return nr;
} }
......
#include <linux/pci.h> #include <linux/pci.h>
#include <linux/module.h> #include <linux/module.h>
#include <linux/aspm.h>
#include "pci.h" #include "pci.h"
static void pci_free_resources(struct pci_dev *dev) static void pci_free_resources(struct pci_dev *dev)
...@@ -31,9 +30,6 @@ static void pci_stop_dev(struct pci_dev *dev) ...@@ -31,9 +30,6 @@ static void pci_stop_dev(struct pci_dev *dev)
dev->global_list.next = dev->global_list.prev = NULL; dev->global_list.next = dev->global_list.prev = NULL;
up_write(&pci_bus_sem); up_write(&pci_bus_sem);
} }
if (dev->bus->self)
pcie_aspm_exit_link_state(dev);
} }
static void pci_destroy_dev(struct pci_dev *dev) static void pci_destroy_dev(struct pci_dev *dev)
......
/*
* aspm.h
*
* PCI Express ASPM defines and function prototypes
*
* Copyright (C) 2007 Intel Corp.
* Zhang Yanmin (yanmin.zhang@intel.com)
* Shaohua Li (shaohua.li@intel.com)
*
* For more information, please consult the following manuals (look at
* http://www.pcisig.com/ for how to get them):
*
* PCI Express Specification
*/
#ifndef LINUX_ASPM_H
#define LINUX_ASPM_H
#include <linux/pci.h>
#define PCIE_LINK_STATE_L0S 1
#define PCIE_LINK_STATE_L1 2
#define PCIE_LINK_STATE_CLKPM 4
#ifdef CONFIG_PCIEASPM
extern void pcie_aspm_init_link_state(struct pci_dev *pdev);
extern void pcie_aspm_exit_link_state(struct pci_dev *pdev);
extern void pcie_aspm_pm_state_change(struct pci_dev *pdev);
extern void pci_disable_link_state(struct pci_dev *pdev, int state);
#else
#define pcie_aspm_init_link_state(pdev) do {} while (0)
#define pcie_aspm_exit_link_state(pdev) do {} while (0)
#define pcie_aspm_pm_state_change(pdev) do {} while (0)
#define pci_disable_link_state(pdev, state) do {} while (0)
#endif
#ifdef CONFIG_PCIEASPM_DEBUG /* this depends on CONFIG_PCIEASPM */
extern void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev);
extern void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev);
#else
#define pcie_aspm_create_sysfs_dev_files(pdev) do {} while (0)
#define pcie_aspm_remove_sysfs_dev_files(pdev) do {} while (0)
#endif
#endif /* LINUX_ASPM_H */
...@@ -128,7 +128,6 @@ struct pci_cap_saved_state { ...@@ -128,7 +128,6 @@ struct pci_cap_saved_state {
u32 data[0]; u32 data[0];
}; };
struct pcie_link_state;
/* /*
* The pci_dev structure is used to describe PCI devices. * The pci_dev structure is used to describe PCI devices.
*/ */
...@@ -164,10 +163,6 @@ struct pci_dev { ...@@ -164,10 +163,6 @@ struct pci_dev {
this is D0-D3, D0 being fully functional, this is D0-D3, D0 being fully functional,
and D3 being off. */ and D3 being off. */
#ifdef CONFIG_PCIEASPM
struct pcie_link_state *link_state; /* ASPM link state. */
#endif
pci_channel_state_t error_state; /* current connectivity state */ pci_channel_state_t error_state; /* current connectivity state */
struct device dev; /* Generic device interface */ struct device dev; /* Generic device interface */
......
...@@ -395,17 +395,9 @@ ...@@ -395,17 +395,9 @@
#define PCI_EXP_DEVSTA_AUXPD 0x10 /* AUX Power Detected */ #define PCI_EXP_DEVSTA_AUXPD 0x10 /* AUX Power Detected */
#define PCI_EXP_DEVSTA_TRPND 0x20 /* Transactions Pending */ #define PCI_EXP_DEVSTA_TRPND 0x20 /* Transactions Pending */
#define PCI_EXP_LNKCAP 12 /* Link Capabilities */ #define PCI_EXP_LNKCAP 12 /* Link Capabilities */
#define PCI_EXP_LNKCAP_ASPMS 0xc00 /* ASPM Support */
#define PCI_EXP_LNKCAP_L0SEL 0x7000 /* L0s Exit Latency */
#define PCI_EXP_LNKCAP_L1EL 0x38000 /* L1 Exit Latency */
#define PCI_EXP_LNKCAP_CLKPM 0x40000 /* L1 Clock Power Management */
#define PCI_EXP_LNKCTL 16 /* Link Control */ #define PCI_EXP_LNKCTL 16 /* Link Control */
#define PCI_EXP_LNKCTL_RL 0x20 /* Retrain Link */
#define PCI_EXP_LNKCTL_CCC 0x40 /* Common Clock COnfiguration */
#define PCI_EXP_LNKCTL_CLKREQ_EN 0x100 /* Enable clkreq */ #define PCI_EXP_LNKCTL_CLKREQ_EN 0x100 /* Enable clkreq */
#define PCI_EXP_LNKSTA 18 /* Link Status */ #define PCI_EXP_LNKSTA 18 /* Link Status */
#define PCI_EXP_LNKSTA_LT 0x800 /* Link Training */
#define PCI_EXP_LNKSTA_SLC 0x1000 /* Slot Clock Configuration */
#define PCI_EXP_SLTCAP 20 /* Slot Capabilities */ #define PCI_EXP_SLTCAP 20 /* Slot Capabilities */
#define PCI_EXP_SLTCTL 24 /* Slot Control */ #define PCI_EXP_SLTCTL 24 /* Slot Control */
#define PCI_EXP_SLTSTA 26 /* Slot Status */ #define PCI_EXP_SLTSTA 26 /* Slot Status */
......
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