Commit ccbf2891 authored by Marek Behún's avatar Marek Behún Committed by David S. Miller

net: phy: marvell10g: support other MACTYPEs

Currently the only "changing" MACTYPE we support is when the PHY changes
between
  10gbase-r / 5gbase-r / 2500base-x / sgmii

Add support for
  usxgmii
  xaui / 5gbase-r / 2500base-x / sgmii
  rxaui / 5gbase-r / 2500base-x / sgmii
and also
  5gbase-r / 2500base-x / sgmii
for 88E2110.
Signed-off-by: default avatarMarek Behún <kabel@kernel.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 884d9a67
...@@ -512,10 +512,18 @@ static int mv2110_init_interface(struct phy_device *phydev, int mactype) ...@@ -512,10 +512,18 @@ static int mv2110_init_interface(struct phy_device *phydev, int mactype)
priv->rate_match = false; priv->rate_match = false;
if (mactype == MV_PMA_21X0_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH) { if (mactype == MV_PMA_21X0_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH)
priv->rate_match = true; priv->rate_match = true;
if (mactype == MV_PMA_21X0_PORT_CTRL_MACTYPE_USXGMII)
priv->const_interface = PHY_INTERFACE_MODE_USXGMII;
else if (mactype == MV_PMA_21X0_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH)
priv->const_interface = PHY_INTERFACE_MODE_10GBASER; priv->const_interface = PHY_INTERFACE_MODE_10GBASER;
} else if (mactype == MV_PMA_21X0_PORT_CTRL_MACTYPE_5GBASER ||
mactype == MV_PMA_21X0_PORT_CTRL_MACTYPE_5GBASER_NO_SGMII_AN)
priv->const_interface = PHY_INTERFACE_MODE_NA;
else
return -EINVAL;
return 0; return 0;
} }
...@@ -531,12 +539,20 @@ static int mv3310_init_interface(struct phy_device *phydev, int mactype) ...@@ -531,12 +539,20 @@ static int mv3310_init_interface(struct phy_device *phydev, int mactype)
mactype == MV_V2_3310_PORT_CTRL_MACTYPE_XAUI_RATE_MATCH) mactype == MV_V2_3310_PORT_CTRL_MACTYPE_XAUI_RATE_MATCH)
priv->rate_match = true; priv->rate_match = true;
if (mactype == MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH) if (mactype == MV_V2_33X0_PORT_CTRL_MACTYPE_USXGMII)
priv->const_interface = PHY_INTERFACE_MODE_USXGMII;
else if (mactype == MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH ||
mactype == MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER_NO_SGMII_AN ||
mactype == MV_V2_33X0_PORT_CTRL_MACTYPE_10GBASER)
priv->const_interface = PHY_INTERFACE_MODE_10GBASER; priv->const_interface = PHY_INTERFACE_MODE_10GBASER;
else if (mactype == MV_V2_33X0_PORT_CTRL_MACTYPE_RXAUI_RATE_MATCH) else if (mactype == MV_V2_33X0_PORT_CTRL_MACTYPE_RXAUI_RATE_MATCH ||
mactype == MV_V2_33X0_PORT_CTRL_MACTYPE_RXAUI)
priv->const_interface = PHY_INTERFACE_MODE_RXAUI; priv->const_interface = PHY_INTERFACE_MODE_RXAUI;
else if (mactype == MV_V2_3310_PORT_CTRL_MACTYPE_XAUI_RATE_MATCH) else if (mactype == MV_V2_3310_PORT_CTRL_MACTYPE_XAUI_RATE_MATCH ||
mactype == MV_V2_3310_PORT_CTRL_MACTYPE_XAUI)
priv->const_interface = PHY_INTERFACE_MODE_XAUI; priv->const_interface = PHY_INTERFACE_MODE_XAUI;
else
return -EINVAL;
return 0; return 0;
} }
...@@ -563,8 +579,10 @@ static int mv3310_config_init(struct phy_device *phydev) ...@@ -563,8 +579,10 @@ static int mv3310_config_init(struct phy_device *phydev)
return mactype; return mactype;
err = chip->init_interface(phydev, mactype); err = chip->init_interface(phydev, mactype);
if (err) if (err) {
phydev_err(phydev, "MACTYPE configuration invalid\n");
return err; return err;
}
/* Enable EDPD mode - saving 600mW */ /* Enable EDPD mode - saving 600mW */
return mv3310_set_edpd(phydev, ETHTOOL_PHY_EDPD_DFLT_TX_MSECS); return mv3310_set_edpd(phydev, ETHTOOL_PHY_EDPD_DFLT_TX_MSECS);
...@@ -674,44 +692,44 @@ static void mv3310_update_interface(struct phy_device *phydev) ...@@ -674,44 +692,44 @@ static void mv3310_update_interface(struct phy_device *phydev)
{ {
struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev); struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);
if (!phydev->link)
return;
/* In all of the "* with Rate Matching" modes the PHY interface is fixed /* In all of the "* with Rate Matching" modes the PHY interface is fixed
* at 10Gb. The PHY adapts the rate to actual wire speed with help of * at 10Gb. The PHY adapts the rate to actual wire speed with help of
* internal 16KB buffer. * internal 16KB buffer.
*
* In USXGMII mode the PHY interface mode is also fixed.
*/ */
if (priv->rate_match) { if (priv->rate_match ||
priv->const_interface == PHY_INTERFACE_MODE_USXGMII) {
phydev->interface = priv->const_interface; phydev->interface = priv->const_interface;
return; return;
} }
if ((phydev->interface == PHY_INTERFACE_MODE_SGMII || /* The PHY automatically switches its serdes interface (and active PHYXS
phydev->interface == PHY_INTERFACE_MODE_2500BASEX || * instance) between Cisco SGMII, 2500BaseX, 5GBase-R and 10GBase-R /
phydev->interface == PHY_INTERFACE_MODE_5GBASER || * xaui / rxaui modes according to the speed.
phydev->interface == PHY_INTERFACE_MODE_10GBASER) && * Florian suggests setting phydev->interface to communicate this to the
phydev->link) { * MAC. Only do this if we are already in one of the above modes.
/* The PHY automatically switches its serdes interface (and */
* active PHYXS instance) between Cisco SGMII, 10GBase-R and switch (phydev->speed) {
* 2500BaseX modes according to the speed. Florian suggests case SPEED_10000:
* setting phydev->interface to communicate this to the MAC. phydev->interface = priv->const_interface;
* Only do this if we are already in one of the above modes. break;
*/ case SPEED_5000:
switch (phydev->speed) { phydev->interface = PHY_INTERFACE_MODE_5GBASER;
case SPEED_10000: break;
phydev->interface = PHY_INTERFACE_MODE_10GBASER; case SPEED_2500:
break; phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
case SPEED_5000: break;
phydev->interface = PHY_INTERFACE_MODE_5GBASER; case SPEED_1000:
break; case SPEED_100:
case SPEED_2500: case SPEED_10:
phydev->interface = PHY_INTERFACE_MODE_2500BASEX; phydev->interface = PHY_INTERFACE_MODE_SGMII;
break; break;
case SPEED_1000: default:
case SPEED_100: break;
case SPEED_10:
phydev->interface = PHY_INTERFACE_MODE_SGMII;
break;
default:
break;
}
} }
} }
......
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