Commit cd1f08c7 authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Liam Girdwood

ASoC: omap-mcbsp: Single function CLKR/FSR source mux configuration

Use single function for the CLKR/FSR mux configuration.
OMAP2/3 has 6 pin configuration on McBSP1 instance, while on OMAP4
McBSP4 instance have the 6 pin configuration so the omap2_mcbsp1_mux_* is
not correct name for all support OMAP versions
Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: default avatarJarkko Nikula <jarkko.nikula@bitmer.com>
Acked-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: default avatarLiam Girdwood <lrg@ti.com>
parent 33cec399
...@@ -687,40 +687,36 @@ int omap2_mcbsp_set_clks_src(struct omap_mcbsp *mcbsp, u8 fck_src_id) ...@@ -687,40 +687,36 @@ int omap2_mcbsp_set_clks_src(struct omap_mcbsp *mcbsp, u8 fck_src_id)
return -EINVAL; return -EINVAL;
} }
void omap2_mcbsp1_mux_clkr_src(struct omap_mcbsp *mcbsp, u8 mux) int omap_mcbsp_6pin_src_mux(struct omap_mcbsp *mcbsp, u8 mux)
{ {
const char *src; const char *signal, *src;
int ret = 0;
if (mcbsp->id != 1)
return;
if (mux == CLKR_SRC_CLKR) switch (mux) {
case CLKR_SRC_CLKR:
signal = "clkr";
src = "clkr"; src = "clkr";
else if (mux == CLKR_SRC_CLKX) break;
case CLKR_SRC_CLKX:
signal = "clkr";
src = "clkx"; src = "clkx";
else break;
return; case FSR_SRC_FSR:
signal = "fsr";
if (mcbsp->pdata->mux_signal)
mcbsp->pdata->mux_signal(mcbsp->dev, "clkr", src);
}
void omap2_mcbsp1_mux_fsr_src(struct omap_mcbsp *mcbsp, u8 mux)
{
const char *src;
if (mcbsp->id != 1)
return;
if (mux == FSR_SRC_FSR)
src = "fsr"; src = "fsr";
else if (mux == FSR_SRC_FSX) break;
case FSR_SRC_FSX:
signal = "fsr";
src = "fsx"; src = "fsx";
else break;
return; default:
return -EINVAL;
}
if (mcbsp->pdata->mux_signal) if (mcbsp->pdata->mux_signal)
mcbsp->pdata->mux_signal(mcbsp->dev, "fsr", src); ret = mcbsp->pdata->mux_signal(mcbsp->dev, signal, src);
return ret;
} }
#define max_thres(m) (mcbsp->pdata->buffer_size) #define max_thres(m) (mcbsp->pdata->buffer_size)
......
...@@ -230,13 +230,11 @@ enum { ...@@ -230,13 +230,11 @@ enum {
#define XRDYEN BIT(10) #define XRDYEN BIT(10)
#define XEMPTYEOFEN BIT(14) #define XEMPTYEOFEN BIT(14)
/* CLKR signal muxing options */ /* Clock signal muxing options */
#define CLKR_SRC_CLKR 0 #define CLKR_SRC_CLKR 0 /* CLKR signal is from the CLKR pin */
#define CLKR_SRC_CLKX 1 #define CLKR_SRC_CLKX 1 /* CLKR signal is from the CLKX pin */
#define FSR_SRC_FSR 2 /* FSR signal is from the FSR pin */
/* FSR signal muxing options */ #define FSR_SRC_FSX 3 /* FSR signal is from the FSX pin */
#define FSR_SRC_FSR 0
#define FSR_SRC_FSX 1
/* McBSP functional clock sources */ /* McBSP functional clock sources */
#define MCBSP_CLKS_PRCM_SRC 0 #define MCBSP_CLKS_PRCM_SRC 0
...@@ -333,8 +331,7 @@ void omap_mcbsp_stop(struct omap_mcbsp *mcbsp, int tx, int rx); ...@@ -333,8 +331,7 @@ void omap_mcbsp_stop(struct omap_mcbsp *mcbsp, int tx, int rx);
int omap2_mcbsp_set_clks_src(struct omap_mcbsp *mcbsp, u8 fck_src_id); int omap2_mcbsp_set_clks_src(struct omap_mcbsp *mcbsp, u8 fck_src_id);
/* McBSP signal muxing API */ /* McBSP signal muxing API */
void omap2_mcbsp1_mux_clkr_src(struct omap_mcbsp *mcbsp, u8 mux); int omap_mcbsp_6pin_src_mux(struct omap_mcbsp *mcbsp, u8 mux);
void omap2_mcbsp1_mux_fsr_src(struct omap_mcbsp *mcbsp, u8 mux);
/* Sidetone specific API */ /* Sidetone specific API */
int omap_st_set_chgain(struct omap_mcbsp *mcbsp, int channel, s16 chgain); int omap_st_set_chgain(struct omap_mcbsp *mcbsp, int channel, s16 chgain);
......
...@@ -554,22 +554,22 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai, ...@@ -554,22 +554,22 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
case OMAP_MCBSP_CLKR_SRC_CLKR: case OMAP_MCBSP_CLKR_SRC_CLKR:
if (cpu_class_is_omap1()) if (cpu_class_is_omap1())
break; break;
omap2_mcbsp1_mux_clkr_src(mcbsp, CLKR_SRC_CLKR); err = omap_mcbsp_6pin_src_mux(mcbsp, CLKR_SRC_CLKR);
break; break;
case OMAP_MCBSP_CLKR_SRC_CLKX: case OMAP_MCBSP_CLKR_SRC_CLKX:
if (cpu_class_is_omap1()) if (cpu_class_is_omap1())
break; break;
omap2_mcbsp1_mux_clkr_src(mcbsp, CLKR_SRC_CLKX); err = omap_mcbsp_6pin_src_mux(mcbsp, CLKR_SRC_CLKX);
break; break;
case OMAP_MCBSP_FSR_SRC_FSR: case OMAP_MCBSP_FSR_SRC_FSR:
if (cpu_class_is_omap1()) if (cpu_class_is_omap1())
break; break;
omap2_mcbsp1_mux_fsr_src(mcbsp, FSR_SRC_FSR); err = omap_mcbsp_6pin_src_mux(mcbsp, FSR_SRC_FSR);
break; break;
case OMAP_MCBSP_FSR_SRC_FSX: case OMAP_MCBSP_FSR_SRC_FSX:
if (cpu_class_is_omap1()) if (cpu_class_is_omap1())
break; break;
omap2_mcbsp1_mux_fsr_src(mcbsp, FSR_SRC_FSX); err = omap_mcbsp_6pin_src_mux(mcbsp, FSR_SRC_FSX);
break; break;
default: default:
err = -ENODEV; err = -ENODEV;
......
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