Commit cd26908d authored by David S. Miller's avatar David S. Miller

Sparc build fixes:

- Define L1_CACHE_SHIFT for quota sake
- Fix FC4/PLUTO build, request is a pointer in scsi_cmnd now.
- Make binfmt_elf32 build properly wrt. jiffies_to_foo changes.
parent 006a1dec
......@@ -136,6 +136,16 @@ struct elf_prpsinfo32
#define NEW_TO_OLD_UID(uid) ((uid) > 65535) ? (u16)overflowuid : (u16)(uid)
#define NEW_TO_OLD_GID(gid) ((gid) > 65535) ? (u16)overflowgid : (u16)(gid)
#include <linux/time.h>
#define jiffies_to_timeval jiffies_to_timeval32
static __inline__ void
jiffies_to_timeval32(unsigned long jiffies, struct timeval32 *value)
{
value->tv_usec = (jiffies % HZ) * (1000000L / HZ);
value->tv_sec = jiffies / HZ;
}
#define elf_addr_t u32
#define elf_caddr_t u32
#undef start_thread
......
......@@ -994,7 +994,7 @@ int fcp_scsi_dev_reset(Scsi_Cmnd *SCpnt)
*/
fc->rst_pkt->host->eh_action = &sem;
fc->rst_pkt->request.rq_status = RQ_SCSI_BUSY;
fc->rst_pkt->request->rq_status = RQ_SCSI_BUSY;
fc->rst_pkt->done = fcp_scsi_reset_done;
fcp_scsi_queue_it(fc, fc->rst_pkt, fcmd, 0);
......
......@@ -65,7 +65,7 @@ static void __init pluto_detect_done(Scsi_Cmnd *SCpnt)
static void __init pluto_detect_scsi_done(Scsi_Cmnd *SCpnt)
{
SCpnt->request.rq_status = RQ_SCSI_DONE;
SCpnt->request->rq_status = RQ_SCSI_DONE;
PLND(("Detect done %08lx\n", (long)SCpnt))
if (atomic_dec_and_test (&fcss))
up(&fc_sem);
......@@ -160,7 +160,7 @@ int __init pluto_detect(Scsi_Host_Template *tpnt)
SCpnt->cmd_len = COMMAND_SIZE(INQUIRY);
SCpnt->request.rq_status = RQ_SCSI_BUSY;
SCpnt->request->rq_status = RQ_SCSI_BUSY;
SCpnt->done = pluto_detect_done;
SCpnt->bufflen = 256;
......@@ -174,7 +174,7 @@ int __init pluto_detect(Scsi_Host_Template *tpnt)
for (retry = 0; retry < 5; retry++) {
for (i = 0; i < fcscount; i++) {
if (!fcs[i].fc) break;
if (fcs[i].cmd.request.rq_status != RQ_SCSI_DONE) {
if (fcs[i].cmd.request->rq_status != RQ_SCSI_DONE) {
disable_irq(fcs[i].fc->irq);
PLND(("queuecommand %d %d\n", retry, i))
fcp_scsi_queuecommand (&(fcs[i].cmd),
......
......@@ -10,6 +10,7 @@
#include <asm/asi.h>
#define L1_CACHE_SHIFT 5
#define L1_CACHE_BYTES 32
#define L1_CACHE_ALIGN(x) ((((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1)))
......
......@@ -5,7 +5,8 @@
#define __ARCH_SPARC64_CACHE_H
/* bytes per L1 cache line */
#define L1_CACHE_BYTES 32 /* Two 16-byte sub-blocks per line. */
#define L1_CACHE_SHIFT 5
#define L1_CACHE_BYTES 32 /* Two 16-byte sub-blocks per line. */
#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
......
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