Commit cd9e3474 authored by Mathieu Poirier's avatar Mathieu Poirier Committed by Greg Kroah-Hartman

coresight: add PM runtime calls to coresight_simple_func()

It is mandatory to enable a coresight block's power domain before
trying to access management registers.  Otherwise the transaction
simply stalls, leading to a system hang.
Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
Reviewed-by: default avatarSudeep Holla <sudeep.holla@arm.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 62d39ac9
...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
#include <linux/bitops.h> #include <linux/bitops.h>
#include <linux/io.h> #include <linux/io.h>
#include <linux/coresight.h> #include <linux/coresight.h>
#include <linux/pm_runtime.h>
/* /*
* Coresight management registers (0xf00-0xfcc) * Coresight management registers (0xf00-0xfcc)
...@@ -42,8 +43,11 @@ static ssize_t name##_show(struct device *_dev, \ ...@@ -42,8 +43,11 @@ static ssize_t name##_show(struct device *_dev, \
struct device_attribute *attr, char *buf) \ struct device_attribute *attr, char *buf) \
{ \ { \
type *drvdata = dev_get_drvdata(_dev->parent); \ type *drvdata = dev_get_drvdata(_dev->parent); \
return scnprintf(buf, PAGE_SIZE, "0x%x\n", \ u32 val; \
readl_relaxed(drvdata->base + offset)); \ pm_runtime_get_sync(_dev->parent); \
val = readl_relaxed(drvdata->base + offset); \
pm_runtime_put_sync(_dev->parent); \
return scnprintf(buf, PAGE_SIZE, "0x%x\n", val); \
} \ } \
static DEVICE_ATTR_RO(name) static DEVICE_ATTR_RO(name)
......
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