Commit cddfc5fb authored by Ravi Bangoria's avatar Ravi Bangoria Committed by Arnaldo Carvalho de Melo

perf pmus: Describe semantics of 'core_pmus' and 'other_pmus'

Notion of 'core_pmus' and 'other_pmus' are independent of hw core and
uncore pmus. For example, AMD IBS PMUs are present in each SMT-thread
but they belongs to 'other_pmus'. Add a comment describing what these
list contains and how they are treated.
Reviewed-by: default avatarIan Rogers <irogers@google.com>
Signed-off-by: default avatarRavi Bangoria <ravi.bangoria@amd.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Ali Saidi <alisaidi@amazon.com>
Cc: Ananth Narayan <ananth.narayan@amd.com>
Cc: James Clark <james.clark@arm.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Sandipan Das <sandipan.das@amd.com>
Cc: Santosh Shukla <santosh.shukla@amd.com>
Cc: Thomas Richter <tmricht@linux.ibm.com>
Link: https://lore.kernel.org/r/20230615051700.1833-2-ravi.bangoria@amd.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent dada1a1f
...@@ -12,6 +12,21 @@ ...@@ -12,6 +12,21 @@
#include "pmu.h" #include "pmu.h"
#include "print-events.h" #include "print-events.h"
/*
* core_pmus: A PMU belongs to core_pmus if it's name is "cpu" or it's sysfs
* directory contains "cpus" file. All PMUs belonging to core_pmus
* must have pmu->is_core=1. If there are more than one PMU in
* this list, perf interprets it as a heterogeneous platform.
* (FWIW, certain ARM platforms having heterogeneous cores uses
* homogeneous PMU, and thus they are treated as homogeneous
* platform by perf because core_pmus will have only one entry)
* other_pmus: All other PMUs which are not part of core_pmus list. It doesn't
* matter whether PMU is present per SMT-thread or outside of the
* core in the hw. For e.g., an instance of AMD ibs_fetch// and
* ibs_op// PMUs is present in each hw SMT thread, however they
* are captured under other_pmus. PMUs belonging to other_pmus
* must have pmu->is_core=0 but pmu->is_uncore could be 0 or 1.
*/
static LIST_HEAD(core_pmus); static LIST_HEAD(core_pmus);
static LIST_HEAD(other_pmus); static LIST_HEAD(other_pmus);
static bool read_sysfs_core_pmus; static bool read_sysfs_core_pmus;
......
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