Commit ce39882e authored by Olof Johansson's avatar Olof Johansson

Merge tag 'amlogic-fixes-1' of...

Merge tag 'amlogic-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into fixes

Amlogic fixes for v4.15-rc
- GPIO interrupt fixes
- socinfo fix for GX series
- fix typo

* tag 'amlogic-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM64: dts: meson-gx: fix UART pclk clock name
  meson-gx-socinfo: Fix package id parsing
  ARM: meson: fix spelling mistake: "Couln't" -> "Couldn't"
  ARM: dts: meson: fix the memory region of the GPIO interrupt controller
  ARM: dts: meson: correct the sort order for the the gpio_intc node
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 3dda7f63 39005e56
...@@ -85,15 +85,6 @@ assist: assist@7c00 { ...@@ -85,15 +85,6 @@ assist: assist@7c00 {
reg = <0x7c00 0x200>; reg = <0x7c00 0x200>;
}; };
gpio_intc: interrupt-controller@9880 {
compatible = "amlogic,meson-gpio-intc";
reg = <0xc1109880 0x10>;
interrupt-controller;
#interrupt-cells = <2>;
amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
status = "disabled";
};
hwrng: rng@8100 { hwrng: rng@8100 {
compatible = "amlogic,meson-rng"; compatible = "amlogic,meson-rng";
reg = <0x8100 0x8>; reg = <0x8100 0x8>;
...@@ -191,6 +182,15 @@ spifc: spi@8c80 { ...@@ -191,6 +182,15 @@ spifc: spi@8c80 {
status = "disabled"; status = "disabled";
}; };
gpio_intc: interrupt-controller@9880 {
compatible = "amlogic,meson-gpio-intc";
reg = <0x9880 0x10>;
interrupt-controller;
#interrupt-cells = <2>;
amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
status = "disabled";
};
wdt: watchdog@9900 { wdt: watchdog@9900 {
compatible = "amlogic,meson6-wdt"; compatible = "amlogic,meson6-wdt";
reg = <0x9900 0x8>; reg = <0x9900 0x8>;
......
...@@ -102,7 +102,7 @@ static void __init meson_smp_prepare_cpus(const char *scu_compatible, ...@@ -102,7 +102,7 @@ static void __init meson_smp_prepare_cpus(const char *scu_compatible,
scu_base = of_iomap(node, 0); scu_base = of_iomap(node, 0);
if (!scu_base) { if (!scu_base) {
pr_err("Couln't map SCU registers\n"); pr_err("Couldn't map SCU registers\n");
return; return;
} }
......
...@@ -753,12 +753,12 @@ &uart_AO_B { ...@@ -753,12 +753,12 @@ &uart_AO_B {
&uart_B { &uart_B {
clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>; clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
clock-names = "xtal", "core", "baud"; clock-names = "xtal", "pclk", "baud";
}; };
&uart_C { &uart_C {
clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>; clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
clock-names = "xtal", "core", "baud"; clock-names = "xtal", "pclk", "baud";
}; };
&vpu { &vpu {
......
...@@ -688,7 +688,7 @@ &spifc { ...@@ -688,7 +688,7 @@ &spifc {
&uart_A { &uart_A {
clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
clock-names = "xtal", "core", "baud"; clock-names = "xtal", "pclk", "baud";
}; };
&uart_AO { &uart_AO {
...@@ -703,12 +703,12 @@ &uart_AO_B { ...@@ -703,12 +703,12 @@ &uart_AO_B {
&uart_B { &uart_B {
clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>; clocks = <&xtal>, <&clkc CLKID_UART1>, <&xtal>;
clock-names = "xtal", "core", "baud"; clock-names = "xtal", "pclk", "baud";
}; };
&uart_C { &uart_C {
clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>; clocks = <&xtal>, <&clkc CLKID_UART2>, <&xtal>;
clock-names = "xtal", "core", "baud"; clock-names = "xtal", "pclk", "baud";
}; };
&vpu { &vpu {
......
...@@ -20,8 +20,8 @@ ...@@ -20,8 +20,8 @@
#define AO_SEC_SOCINFO_OFFSET AO_SEC_SD_CFG8 #define AO_SEC_SOCINFO_OFFSET AO_SEC_SD_CFG8
#define SOCINFO_MAJOR GENMASK(31, 24) #define SOCINFO_MAJOR GENMASK(31, 24)
#define SOCINFO_MINOR GENMASK(23, 16) #define SOCINFO_PACK GENMASK(23, 16)
#define SOCINFO_PACK GENMASK(15, 8) #define SOCINFO_MINOR GENMASK(15, 8)
#define SOCINFO_MISC GENMASK(7, 0) #define SOCINFO_MISC GENMASK(7, 0)
static const struct meson_gx_soc_id { static const struct meson_gx_soc_id {
......
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