Commit ce483549 authored by Amit Daniel Kachhap's avatar Amit Daniel Kachhap Committed by Russell King (Oracle)

ARM: 9270/1: vfp: Add hwcap for FEAT_FHM

Floating-point half-precision multiplication (FHM) is a feature present
in AArch32 state for Armv8 and is represented by ISAR6.FHM identification register.

This feature denotes the presence of VFMAL and VMFSL instructions and
hence adding a hwcap will enable the userspace to check it before
trying to use those instructions.
Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarAmit Daniel Kachhap <amit.kachhap@arm.com>
Signed-off-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
parent 62ea0d87
......@@ -31,6 +31,7 @@
#define HWCAP_FPHP (1 << 22)
#define HWCAP_ASIMDHP (1 << 23)
#define HWCAP_ASIMDDP (1 << 24)
#define HWCAP_ASIMDFHM (1 << 25)
/*
* HWCAP2 flags - for elf_hwcap2 (in kernel) and AT_HWCAP2
......
......@@ -1252,6 +1252,7 @@ static const char *hwcap_str[] = {
"fphp",
"asimdhp",
"asimddp",
"asimdfhm",
NULL
};
......
......@@ -845,6 +845,12 @@ static int __init vfp_init(void)
isar6 = read_cpuid_ext(CPUID_EXT_ISAR6);
if (cpuid_feature_extract_field(isar6, 4) == 0x1)
elf_hwcap |= HWCAP_ASIMDDP;
/*
* Check for the presence of Advanced SIMD Floating point
* half-precision multiplication instructions.
*/
if (cpuid_feature_extract_field(isar6, 8) == 0x1)
elf_hwcap |= HWCAP_ASIMDFHM;
/* Extract the architecture version on pre-cpuid scheme */
} else {
......
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