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Commit ce638731 authored by Kumar Gala's avatar Kumar Gala
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powerpc/85xx: p1020si.dtsi update interrupt handling 

* set interrupt-parent at root so its not duplicate in every node
* Add mpic timers
* Move to 4-prop cells for mpic timer
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent a45edbf9
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Showing with 56 additions and 61 deletions
arch/powerpc/boot/dts/p1020si.dtsi
View file @ ce638731
...@@ -14,6 +14,7 @@ / { ...@@ -14,6 +14,7 @@ / {
compatible = "fsl,P1020"; compatible = "fsl,P1020";
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
interrupt-parent = <&mpic>;
cpus { cpus {
#address-cells = <1>; #address-cells = <1>;
...@@ -37,8 +38,7 @@ localbus@ffe05000 { ...@@ -37,8 +38,7 @@ localbus@ffe05000 {
#size-cells = <1>; #size-cells = <1>;
compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus"; compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus";
reg = <0 0xffe05000 0 0x1000>; reg = <0 0xffe05000 0 0x1000>;
interrupts = <19 2>; interrupts = <19 2 0 0>;
interrupt-parent = <&mpic>;
}; };
soc@ffe00000 { soc@ffe00000 {
...@@ -58,15 +58,13 @@ ecm-law@0 { ...@@ -58,15 +58,13 @@ ecm-law@0 {
ecm@1000 { ecm@1000 {
compatible = "fsl,p1020-ecm", "fsl,ecm"; compatible = "fsl,p1020-ecm", "fsl,ecm";
reg = <0x1000 0x1000>; reg = <0x1000 0x1000>;
interrupts = <16 2>; interrupts = <16 2 0 0>;
interrupt-parent = <&mpic>;
}; };
memory-controller@2000 { memory-controller@2000 {
compatible = "fsl,p1020-memory-controller"; compatible = "fsl,p1020-memory-controller";
reg = <0x2000 0x1000>; reg = <0x2000 0x1000>;
interrupt-parent = <&mpic>; interrupts = <16 2 0 0>;
interrupts = <16 2>;
}; };
i2c@3000 { i2c@3000 {
...@@ -75,8 +73,7 @@ i2c@3000 { ...@@ -75,8 +73,7 @@ i2c@3000 {
cell-index = <0>; cell-index = <0>;
compatible = "fsl-i2c"; compatible = "fsl-i2c";
reg = <0x3000 0x100>; reg = <0x3000 0x100>;
interrupts = <43 2>; interrupts = <43 2 0 0>;
interrupt-parent = <&mpic>;
dfsrr; dfsrr;
}; };
...@@ -86,8 +83,7 @@ i2c@3100 { ...@@ -86,8 +83,7 @@ i2c@3100 {
cell-index = <1>; cell-index = <1>;
compatible = "fsl-i2c"; compatible = "fsl-i2c";
reg = <0x3100 0x100>; reg = <0x3100 0x100>;
interrupts = <43 2>; interrupts = <43 2 0 0>;
interrupt-parent = <&mpic>;
dfsrr; dfsrr;
}; };
...@@ -97,8 +93,7 @@ serial0: serial@4500 { ...@@ -97,8 +93,7 @@ serial0: serial@4500 {
compatible = "ns16550"; compatible = "ns16550";
reg = <0x4500 0x100>; reg = <0x4500 0x100>;
clock-frequency = <0>; clock-frequency = <0>;
interrupts = <42 2>; interrupts = <42 2 0 0>;
interrupt-parent = <&mpic>;
}; };
serial1: serial@4600 { serial1: serial@4600 {
...@@ -107,8 +102,7 @@ serial1: serial@4600 { ...@@ -107,8 +102,7 @@ serial1: serial@4600 {
compatible = "ns16550"; compatible = "ns16550";
reg = <0x4600 0x100>; reg = <0x4600 0x100>;
clock-frequency = <0>; clock-frequency = <0>;
interrupts = <42 2>; interrupts = <42 2 0 0>;
interrupt-parent = <&mpic>;
}; };
spi@7000 { spi@7000 {
...@@ -116,8 +110,7 @@ spi@7000 { ...@@ -116,8 +110,7 @@ spi@7000 {
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl,p1020-espi", "fsl,mpc8536-espi"; compatible = "fsl,p1020-espi", "fsl,mpc8536-espi";
reg = <0x7000 0x1000>; reg = <0x7000 0x1000>;
interrupts = <59 0x2>; interrupts = <59 0x2 0 0>;
interrupt-parent = <&mpic>;
fsl,espi-num-chipselects = <4>; fsl,espi-num-chipselects = <4>;
}; };
...@@ -125,8 +118,7 @@ gpio: gpio-controller@f000 { ...@@ -125,8 +118,7 @@ gpio: gpio-controller@f000 {
#gpio-cells = <2>; #gpio-cells = <2>;
compatible = "fsl,mpc8572-gpio"; compatible = "fsl,mpc8572-gpio";
reg = <0xf000 0x100>; reg = <0xf000 0x100>;
interrupts = <47 0x2>; interrupts = <47 0x2 0 0>;
interrupt-parent = <&mpic>;
gpio-controller; gpio-controller;
}; };
...@@ -135,8 +127,7 @@ L2: l2-cache-controller@20000 { ...@@ -135,8 +127,7 @@ L2: l2-cache-controller@20000 {
reg = <0x20000 0x1000>; reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes cache-line-size = <32>; // 32 bytes
cache-size = <0x40000>; // L2,256K cache-size = <0x40000>; // L2,256K
interrupt-parent = <&mpic>; interrupts = <16 2 0 0>;
interrupts = <16 2>;
}; };
dma@21300 { dma@21300 {
...@@ -150,29 +141,25 @@ dma-channel@0 { ...@@ -150,29 +141,25 @@ dma-channel@0 {
compatible = "fsl,eloplus-dma-channel"; compatible = "fsl,eloplus-dma-channel";
reg = <0x0 0x80>; reg = <0x0 0x80>;
cell-index = <0>; cell-index = <0>;
interrupt-parent = <&mpic>; interrupts = <20 2 0 0>;
interrupts = <20 2>;
}; };
dma-channel@80 { dma-channel@80 {
compatible = "fsl,eloplus-dma-channel"; compatible = "fsl,eloplus-dma-channel";
reg = <0x80 0x80>; reg = <0x80 0x80>;
cell-index = <1>; cell-index = <1>;
interrupt-parent = <&mpic>; interrupts = <21 2 0 0>;
interrupts = <21 2>;
}; };
dma-channel@100 { dma-channel@100 {
compatible = "fsl,eloplus-dma-channel"; compatible = "fsl,eloplus-dma-channel";
reg = <0x100 0x80>; reg = <0x100 0x80>;
cell-index = <2>; cell-index = <2>;
interrupt-parent = <&mpic>; interrupts = <22 2 0 0>;
interrupts = <22 2>;
}; };
dma-channel@180 { dma-channel@180 {
compatible = "fsl,eloplus-dma-channel"; compatible = "fsl,eloplus-dma-channel";
reg = <0x180 0x80>; reg = <0x180 0x80>;
cell-index = <3>; cell-index = <3>;
interrupt-parent = <&mpic>; interrupts = <23 2 0 0>;
interrupts = <23 2>;
}; };
}; };
...@@ -202,20 +189,19 @@ enet0: ethernet@b0000 { ...@@ -202,20 +189,19 @@ enet0: ethernet@b0000 {
fsl,num_tx_queues = <0x8>; fsl,num_tx_queues = <0x8>;
fsl,magic-packet; fsl,magic-packet;
local-mac-address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ];
interrupt-parent = <&mpic>;
queue-group@0 { queue-group@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
reg = <0xb0000 0x1000>; reg = <0xb0000 0x1000>;
interrupts = <29 2 30 2 34 2>; interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
}; };
queue-group@1 { queue-group@1 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
reg = <0xb4000 0x1000>; reg = <0xb4000 0x1000>;
interrupts = <17 2 18 2 24 2>; interrupts = <17 2 0 0 18 2 0 0 24 2 0 0>;
}; };
}; };
...@@ -229,20 +215,19 @@ enet1: ethernet@b1000 { ...@@ -229,20 +215,19 @@ enet1: ethernet@b1000 {
fsl,num_tx_queues = <0x8>; fsl,num_tx_queues = <0x8>;
fsl,magic-packet; fsl,magic-packet;
local-mac-address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ];
interrupt-parent = <&mpic>;
queue-group@0 { queue-group@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
reg = <0xb1000 0x1000>; reg = <0xb1000 0x1000>;
interrupts = <35 2 36 2 40 2>; interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>;
}; };
queue-group@1 { queue-group@1 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
reg = <0xb5000 0x1000>; reg = <0xb5000 0x1000>;
interrupts = <51 2 52 2 67 2>; interrupts = <51 2 0 0 52 2 0 0 67 2 0 0>;
}; };
}; };
...@@ -256,20 +241,19 @@ enet2: ethernet@b2000 { ...@@ -256,20 +241,19 @@ enet2: ethernet@b2000 {
fsl,num_tx_queues = <0x8>; fsl,num_tx_queues = <0x8>;
fsl,magic-packet; fsl,magic-packet;
local-mac-address = [ 00 00 00 00 00 00 ]; local-mac-address = [ 00 00 00 00 00 00 ];
interrupt-parent = <&mpic>;
queue-group@0 { queue-group@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
reg = <0xb2000 0x1000>; reg = <0xb2000 0x1000>;
interrupts = <31 2 32 2 33 2>; interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>;
}; };
queue-group@1 { queue-group@1 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
reg = <0xb6000 0x1000>; reg = <0xb6000 0x1000>;
interrupts = <25 2 26 2 27 2>; interrupts = <25 2 0 0 26 2 0 0 27 2 0 0>;
}; };
}; };
...@@ -278,8 +262,7 @@ usb@22000 { ...@@ -278,8 +262,7 @@ usb@22000 {
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl-usb2-dr"; compatible = "fsl-usb2-dr";
reg = <0x22000 0x1000>; reg = <0x22000 0x1000>;
interrupt-parent = <&mpic>; interrupts = <28 0x2 0 0>;
interrupts = <28 0x2>;
}; };
/* USB2 is shared with localbus, so it must be disabled /* USB2 is shared with localbus, so it must be disabled
...@@ -292,8 +275,7 @@ usb@23000 { ...@@ -292,8 +275,7 @@ usb@23000 {
#size-cells = <0>; #size-cells = <0>;
compatible = "fsl-usb2-dr"; compatible = "fsl-usb2-dr";
reg = <0x23000 0x1000>; reg = <0x23000 0x1000>;
interrupt-parent = <&mpic>; interrupts = <46 0x2 0 0>;
interrupts = <46 0x2>;
phy_type = "ulpi"; phy_type = "ulpi";
}; };
*/ */
...@@ -301,8 +283,7 @@ usb@23000 { ...@@ -301,8 +283,7 @@ usb@23000 {
sdhci@2e000 { sdhci@2e000 {
compatible = "fsl,p1020-esdhc", "fsl,esdhc"; compatible = "fsl,p1020-esdhc", "fsl,esdhc";
reg = <0x2e000 0x1000>; reg = <0x2e000 0x1000>;
interrupts = <72 0x2>; interrupts = <72 0x2 0 0>;
interrupt-parent = <&mpic>;
/* Filled in by U-Boot */ /* Filled in by U-Boot */
clock-frequency = <0>; clock-frequency = <0>;
}; };
...@@ -312,8 +293,7 @@ crypto@30000 { ...@@ -312,8 +293,7 @@ crypto@30000 {
"fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
"fsl,sec2.0"; "fsl,sec2.0";
reg = <0x30000 0x10000>; reg = <0x30000 0x10000>;
interrupts = <45 2 58 2>; interrupts = <45 2 0 0 58 2 0 0>;
interrupt-parent = <&mpic>;
fsl,num-channels = <4>; fsl,num-channels = <4>;
fsl,channel-fifo-len = <24>; fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x97c>; fsl,exec-units-mask = <0x97c>;
...@@ -323,26 +303,43 @@ crypto@30000 { ...@@ -323,26 +303,43 @@ crypto@30000 {
mpic: pic@40000 { mpic: pic@40000 {
interrupt-controller; interrupt-controller;
#address-cells = <0>; #address-cells = <0>;
#interrupt-cells = <2>; #interrupt-cells = <4>;
reg = <0x40000 0x40000>; reg = <0x40000 0x40000>;
compatible = "chrp,open-pic"; compatible = "chrp,open-pic";
device_type = "open-pic"; device_type = "open-pic";
}; };
timer@41100 {
compatible = "fsl,mpic-global-timer";
reg = <0x41100 0x100 0x41300 4>;
interrupts = <0 0 3 0
1 0 3 0
2 0 3 0
3 0 3 0>;
};
timer@42100 {
compatible = "fsl,mpic-global-timer";
reg = <0x42100 0x100 0x42300 4>;
interrupts = <4 0 3 0
5 0 3 0
6 0 3 0
7 0 3 0>;
};
msi@41600 { msi@41600 {
compatible = "fsl,p1020-msi", "fsl,mpic-msi"; compatible = "fsl,p1020-msi", "fsl,mpic-msi";
reg = <0x41600 0x80>; reg = <0x41600 0x80>;
msi-available-ranges = <0 0x100>; msi-available-ranges = <0 0x100>;
interrupts = < interrupts = <
0xe0 0 0xe0 0 0 0
0xe1 0 0xe1 0 0 0
0xe2 0 0xe2 0 0 0
0xe3 0 0xe3 0 0 0
0xe4 0 0xe4 0 0 0
0xe5 0 0xe5 0 0 0
0xe6 0 0xe6 0 0 0
0xe7 0>; 0xe7 0 0 0>;
interrupt-parent = <&mpic>;
}; };
global-utilities@e0000 { //global utilities block global-utilities@e0000 { //global utilities block
...@@ -359,8 +356,7 @@ pci0: pcie@ffe09000 { ...@@ -359,8 +356,7 @@ pci0: pcie@ffe09000 {
#address-cells = <3>; #address-cells = <3>;
bus-range = <0 255>; bus-range = <0 255>;
clock-frequency = <33333333>; clock-frequency = <33333333>;
interrupt-parent = <&mpic>; interrupts = <16 2 0 0>;
interrupts = <16 2>;
pcie@0 { pcie@0 {
reg = <0 0 0 0 0>; reg = <0 0 0 0 0>;
...@@ -368,7 +364,7 @@ pcie@0 { ...@@ -368,7 +364,7 @@ pcie@0 {
#size-cells = <2>; #size-cells = <2>;
#address-cells = <3>; #address-cells = <3>;
device_type = "pci"; device_type = "pci";
interrupts = <16 2>; interrupts = <16 2 0 0>;
interrupt-map-mask = <0xf800 0 0 7>; interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = < interrupt-map = <
/* IDSEL 0x0 */ /* IDSEL 0x0 */
...@@ -388,8 +384,7 @@ pci1: pcie@ffe0a000 { ...@@ -388,8 +384,7 @@ pci1: pcie@ffe0a000 {
#address-cells = <3>; #address-cells = <3>;
bus-range = <0 255>; bus-range = <0 255>;
clock-frequency = <33333333>; clock-frequency = <33333333>;
interrupt-parent = <&mpic>; interrupts = <16 2 0 0>;
interrupts = <16 2>;
pcie@0 { pcie@0 {
reg = <0 0 0 0 0>; reg = <0 0 0 0 0>;
...@@ -397,7 +392,7 @@ pcie@0 { ...@@ -397,7 +392,7 @@ pcie@0 {
#size-cells = <2>; #size-cells = <2>;
#address-cells = <3>; #address-cells = <3>;
device_type = "pci"; device_type = "pci";
interrupts = <16 2>; interrupts = <16 2 0 0>;
interrupt-map-mask = <0xf800 0 0 7>; interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = < interrupt-map = <
......
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