Commit cef85a40 authored by Darren Powell's avatar Darren Powell Committed by Alex Deucher

amdgpu/pm: reorder definition of swsmu_pm_funcs for readability

Match the order of definition to the structure's declaration to
help with locating included and missing functions of the API
Signed-off-by: default avatarDarren Powell <darren.powell@amd.com>
Reviewed-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 70a2e76f
......@@ -2969,6 +2969,8 @@ static const struct amd_pm_funcs swsmu_pm_funcs = {
.get_fan_control_mode = smu_get_fan_control_mode,
.set_fan_speed_percent = smu_set_fan_speed_percent,
.get_fan_speed_percent = smu_get_fan_speed_percent,
.force_clock_level = smu_force_ppclk_levels,
.print_clock_levels = smu_print_ppclk_levels,
.force_performance_level = smu_force_performance_level,
.read_sensor = smu_read_sensor,
.get_performance_level = smu_get_performance_level,
......@@ -2981,38 +2983,36 @@ static const struct amd_pm_funcs swsmu_pm_funcs = {
.switch_power_profile = smu_switch_power_profile,
/* export to amdgpu */
.dispatch_tasks = smu_handle_dpm_task,
.load_firmware = smu_load_microcode,
.set_powergating_by_smu = smu_dpm_set_power_gate,
.set_power_limit = smu_set_power_limit,
.get_power_profile_mode = smu_get_power_profile_mode,
.set_power_profile_mode = smu_set_power_profile_mode,
.odn_edit_dpm_table = smu_od_edit_dpm_table,
.set_mp1_state = smu_set_mp1_state,
.gfx_state_change_set = smu_gfx_state_change_set,
/* export to DC */
.get_sclk = smu_get_sclk,
.get_mclk = smu_get_mclk,
.enable_mgpu_fan_boost = smu_enable_mgpu_fan_boost,
.get_asic_baco_capability = smu_get_baco_capability,
.set_asic_baco_state = smu_baco_set_state,
.get_ppfeature_status = smu_sys_get_pp_feature_mask,
.set_ppfeature_status = smu_sys_set_pp_feature_mask,
.asic_reset_mode_2 = smu_mode2_reset,
.set_df_cstate = smu_set_df_cstate,
.set_xgmi_pstate = smu_set_xgmi_pstate,
.get_gpu_metrics = smu_sys_get_gpu_metrics,
.set_power_profile_mode = smu_set_power_profile_mode,
.get_power_profile_mode = smu_get_power_profile_mode,
.force_clock_level = smu_force_ppclk_levels,
.print_clock_levels = smu_print_ppclk_levels,
.get_uclk_dpm_states = smu_get_uclk_dpm_states,
.get_dpm_clock_table = smu_get_dpm_clock_table,
.display_configuration_change = smu_display_configuration_change,
.get_clock_by_type_with_latency = smu_get_clock_by_type_with_latency,
.display_clock_voltage_request = smu_display_clock_voltage_request,
.set_active_display_count = smu_set_display_count,
.set_min_deep_sleep_dcefclk = smu_set_deep_sleep_dcefclk,
.get_sclk = smu_get_sclk,
.get_mclk = smu_get_mclk,
.display_configuration_change = smu_display_configuration_change,
.get_clock_by_type_with_latency = smu_get_clock_by_type_with_latency,
.display_clock_voltage_request = smu_display_clock_voltage_request,
.enable_mgpu_fan_boost = smu_enable_mgpu_fan_boost,
.set_active_display_count = smu_set_display_count,
.set_min_deep_sleep_dcefclk = smu_set_deep_sleep_dcefclk,
.get_asic_baco_capability = smu_get_baco_capability,
.set_asic_baco_state = smu_baco_set_state,
.get_ppfeature_status = smu_sys_get_pp_feature_mask,
.set_ppfeature_status = smu_sys_set_pp_feature_mask,
.asic_reset_mode_2 = smu_mode2_reset,
.set_df_cstate = smu_set_df_cstate,
.set_xgmi_pstate = smu_set_xgmi_pstate,
.get_gpu_metrics = smu_sys_get_gpu_metrics,
.set_watermarks_for_clock_ranges = smu_set_watermarks_for_clock_ranges,
.display_disable_memory_clock_switch = smu_display_disable_memory_clock_switch,
.get_max_sustainable_clocks_by_dc = smu_get_max_sustainable_clocks_by_dc,
.load_firmware = smu_load_microcode,
.gfx_state_change_set = smu_gfx_state_change_set,
.get_uclk_dpm_states = smu_get_uclk_dpm_states,
.get_dpm_clock_table = smu_get_dpm_clock_table,
.get_smu_prv_buf_details = smu_get_prv_buffer_details,
};
......
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