Commit cf1e8f0c authored by Kumar Gala's avatar Kumar Gala

ARM: qcom: Rename various msm prefixed functions to qcom

As mach-qcom will support a number of different Qualcomm SoC platforms
we replace the msm prefix on function names with qcom to be a bit more
generic.
Signed-off-by: default avatarKumar Gala <galak@codeaurora.org>
parent 7d6d45f8
...@@ -17,7 +17,7 @@ ...@@ -17,7 +17,7 @@
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
extern struct smp_operations msm_smp_ops; extern struct smp_operations qcom_smp_ops;
static const char * const qcom_dt_match[] __initconst = { static const char * const qcom_dt_match[] __initconst = {
"qcom,msm8660-surf", "qcom,msm8660-surf",
...@@ -31,7 +31,7 @@ static const char * const apq8074_dt_match[] __initconst = { ...@@ -31,7 +31,7 @@ static const char * const apq8074_dt_match[] __initconst = {
}; };
DT_MACHINE_START(QCOM_DT, "Qualcomm (Flattened Device Tree)") DT_MACHINE_START(QCOM_DT, "Qualcomm (Flattened Device Tree)")
.smp = smp_ops(msm_smp_ops), .smp = smp_ops(qcom_smp_ops),
.dt_compat = qcom_dt_match, .dt_compat = qcom_dt_match,
MACHINE_END MACHINE_END
......
...@@ -30,7 +30,7 @@ extern void secondary_startup(void); ...@@ -30,7 +30,7 @@ extern void secondary_startup(void);
static DEFINE_SPINLOCK(boot_lock); static DEFINE_SPINLOCK(boot_lock);
#ifdef CONFIG_HOTPLUG_CPU #ifdef CONFIG_HOTPLUG_CPU
static void __ref msm_cpu_die(unsigned int cpu) static void __ref qcom_cpu_die(unsigned int cpu)
{ {
wfi(); wfi();
} }
...@@ -42,7 +42,7 @@ static inline int get_core_count(void) ...@@ -42,7 +42,7 @@ static inline int get_core_count(void)
return ((read_cpuid_id() >> 4) & 3) + 1; return ((read_cpuid_id() >> 4) & 3) + 1;
} }
static void msm_secondary_init(unsigned int cpu) static void qcom_secondary_init(unsigned int cpu)
{ {
/* /*
* Synchronise with the boot thread. * Synchronise with the boot thread.
...@@ -70,7 +70,7 @@ static void prepare_cold_cpu(unsigned int cpu) ...@@ -70,7 +70,7 @@ static void prepare_cold_cpu(unsigned int cpu)
"address\n"); "address\n");
} }
static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle) static int qcom_boot_secondary(unsigned int cpu, struct task_struct *idle)
{ {
static int cold_boot_done; static int cold_boot_done;
...@@ -108,7 +108,7 @@ static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle) ...@@ -108,7 +108,7 @@ static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
* does not support the ARM SCU, so just set the possible cpu mask to * does not support the ARM SCU, so just set the possible cpu mask to
* NR_CPUS. * NR_CPUS.
*/ */
static void __init msm_smp_init_cpus(void) static void __init qcom_smp_init_cpus(void)
{ {
unsigned int i, ncores = get_core_count(); unsigned int i, ncores = get_core_count();
...@@ -122,16 +122,16 @@ static void __init msm_smp_init_cpus(void) ...@@ -122,16 +122,16 @@ static void __init msm_smp_init_cpus(void)
set_cpu_possible(i, true); set_cpu_possible(i, true);
} }
static void __init msm_smp_prepare_cpus(unsigned int max_cpus) static void __init qcom_smp_prepare_cpus(unsigned int max_cpus)
{ {
} }
struct smp_operations msm_smp_ops __initdata = { struct smp_operations qcom_smp_ops __initdata = {
.smp_init_cpus = msm_smp_init_cpus, .smp_init_cpus = qcom_smp_init_cpus,
.smp_prepare_cpus = msm_smp_prepare_cpus, .smp_prepare_cpus = qcom_smp_prepare_cpus,
.smp_secondary_init = msm_secondary_init, .smp_secondary_init = qcom_secondary_init,
.smp_boot_secondary = msm_boot_secondary, .smp_boot_secondary = qcom_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU #ifdef CONFIG_HOTPLUG_CPU
.cpu_die = msm_cpu_die, .cpu_die = qcom_cpu_die,
#endif #endif
}; };
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