Commit cf503308 authored by Eugenia Emantayev's avatar Eugenia Emantayev Committed by Saeed Mahameed

net/mlx5e: Add missing support for PTP_CLK_REQ_PPS request

Add the missing option to enable the PTP_CLK_PPS function.
In this case pin should be configured as 1PPS IN first and
then it will be connected to PPS mechanism.
Events will be reported as PTP_CLOCK_PPSUSR events to relevant sysfs.

Fixes: ee7f1220 ('net/mlx5e: Implement 1PPS support')
Signed-off-by: default avatarEugenia Emantayev <eugenia@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
parent 4272f9b8
...@@ -271,6 +271,7 @@ struct mlx5e_pps { ...@@ -271,6 +271,7 @@ struct mlx5e_pps {
u8 pin_caps[MAX_PIN_NUM]; u8 pin_caps[MAX_PIN_NUM];
struct work_struct out_work; struct work_struct out_work;
u64 start[MAX_PIN_NUM]; u64 start[MAX_PIN_NUM];
u8 enabled;
}; };
struct mlx5e_tstamp { struct mlx5e_tstamp {
......
...@@ -393,6 +393,17 @@ static int mlx5e_perout_configure(struct ptp_clock_info *ptp, ...@@ -393,6 +393,17 @@ static int mlx5e_perout_configure(struct ptp_clock_info *ptp,
MLX5E_EVENT_MODE_REPETETIVE & on); MLX5E_EVENT_MODE_REPETETIVE & on);
} }
static int mlx5e_pps_configure(struct ptp_clock_info *ptp,
struct ptp_clock_request *rq,
int on)
{
struct mlx5e_tstamp *tstamp =
container_of(ptp, struct mlx5e_tstamp, ptp_info);
tstamp->pps_info.enabled = !!on;
return 0;
}
static int mlx5e_ptp_enable(struct ptp_clock_info *ptp, static int mlx5e_ptp_enable(struct ptp_clock_info *ptp,
struct ptp_clock_request *rq, struct ptp_clock_request *rq,
int on) int on)
...@@ -402,6 +413,8 @@ static int mlx5e_ptp_enable(struct ptp_clock_info *ptp, ...@@ -402,6 +413,8 @@ static int mlx5e_ptp_enable(struct ptp_clock_info *ptp,
return mlx5e_extts_configure(ptp, rq, on); return mlx5e_extts_configure(ptp, rq, on);
case PTP_CLK_REQ_PEROUT: case PTP_CLK_REQ_PEROUT:
return mlx5e_perout_configure(ptp, rq, on); return mlx5e_perout_configure(ptp, rq, on);
case PTP_CLK_REQ_PPS:
return mlx5e_pps_configure(ptp, rq, on);
default: default:
return -EOPNOTSUPP; return -EOPNOTSUPP;
} }
...@@ -447,6 +460,7 @@ static int mlx5e_init_pin_config(struct mlx5e_tstamp *tstamp) ...@@ -447,6 +460,7 @@ static int mlx5e_init_pin_config(struct mlx5e_tstamp *tstamp)
return -ENOMEM; return -ENOMEM;
tstamp->ptp_info.enable = mlx5e_ptp_enable; tstamp->ptp_info.enable = mlx5e_ptp_enable;
tstamp->ptp_info.verify = mlx5e_ptp_verify; tstamp->ptp_info.verify = mlx5e_ptp_verify;
tstamp->ptp_info.pps = 1;
for (i = 0; i < tstamp->ptp_info.n_pins; i++) { for (i = 0; i < tstamp->ptp_info.n_pins; i++) {
snprintf(tstamp->ptp_info.pin_config[i].name, snprintf(tstamp->ptp_info.pin_config[i].name,
...@@ -498,6 +512,12 @@ void mlx5e_pps_event_handler(struct mlx5e_priv *priv, ...@@ -498,6 +512,12 @@ void mlx5e_pps_event_handler(struct mlx5e_priv *priv,
switch (tstamp->ptp_info.pin_config[pin].func) { switch (tstamp->ptp_info.pin_config[pin].func) {
case PTP_PF_EXTTS: case PTP_PF_EXTTS:
if (tstamp->pps_info.enabled) {
event->type = PTP_CLOCK_PPSUSR;
event->pps_times.ts_real = ns_to_timespec64(event->timestamp);
} else {
event->type = PTP_CLOCK_EXTTS;
}
ptp_clock_event(tstamp->ptp, event); ptp_clock_event(tstamp->ptp, event);
break; break;
case PTP_PF_PEROUT: case PTP_PF_PEROUT:
......
...@@ -377,7 +377,6 @@ static void mlx5e_async_event(struct mlx5_core_dev *mdev, void *vpriv, ...@@ -377,7 +377,6 @@ static void mlx5e_async_event(struct mlx5_core_dev *mdev, void *vpriv,
break; break;
case MLX5_DEV_EVENT_PPS: case MLX5_DEV_EVENT_PPS:
eqe = (struct mlx5_eqe *)param; eqe = (struct mlx5_eqe *)param;
ptp_event.type = PTP_CLOCK_EXTTS;
ptp_event.index = eqe->data.pps.pin; ptp_event.index = eqe->data.pps.pin;
ptp_event.timestamp = ptp_event.timestamp =
timecounter_cyc2time(&priv->tstamp.clock, timecounter_cyc2time(&priv->tstamp.clock,
......
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