Commit d0737e1d authored by Ander Conselvan de Oliveira's avatar Ander Conselvan de Oliveira Committed by Daniel Vetter

drm/i915: Make *_crtc_mode_set work on new_config

This shouldn't change the behavior of those functions, since they are
called after the new_config is made effective and that points to the
current config. In a follow up patch, the mode set sequence will be
changed so this is called before disabling crtcs, and in that case
those functions should work on the staged config.
Signed-off-by: default avatarAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
[danvet: Flatten if by moving the check into the WARN.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent cd0707cb
...@@ -459,6 +459,27 @@ intel_ddi_get_crtc_encoder(struct drm_crtc *crtc) ...@@ -459,6 +459,27 @@ intel_ddi_get_crtc_encoder(struct drm_crtc *crtc)
return ret; return ret;
} }
static struct intel_encoder *
intel_ddi_get_crtc_new_encoder(struct intel_crtc *crtc)
{
struct drm_device *dev = crtc->base.dev;
struct intel_encoder *intel_encoder, *ret = NULL;
int num_encoders = 0;
for_each_intel_encoder(dev, intel_encoder) {
if (intel_encoder->new_crtc == crtc) {
ret = intel_encoder;
num_encoders++;
}
}
WARN(num_encoders != 1, "%d encoders on crtc for pipe %c\n", num_encoders,
pipe_name(crtc->pipe));
BUG_ON(ret == NULL);
return ret;
}
#define LC_FREQ 2700 #define LC_FREQ 2700
#define LC_FREQ_2K U64_C(LC_FREQ * 2000) #define LC_FREQ_2K U64_C(LC_FREQ * 2000)
...@@ -792,7 +813,7 @@ hsw_ddi_pll_select(struct intel_crtc *intel_crtc, ...@@ -792,7 +813,7 @@ hsw_ddi_pll_select(struct intel_crtc *intel_crtc,
WRPLL_DIVIDER_REFERENCE(r2) | WRPLL_DIVIDER_FEEDBACK(n2) | WRPLL_DIVIDER_REFERENCE(r2) | WRPLL_DIVIDER_FEEDBACK(n2) |
WRPLL_DIVIDER_POST(p); WRPLL_DIVIDER_POST(p);
intel_crtc->config.dpll_hw_state.wrpll = val; intel_crtc->new_config->dpll_hw_state.wrpll = val;
pll = intel_get_shared_dpll(intel_crtc); pll = intel_get_shared_dpll(intel_crtc);
if (pll == NULL) { if (pll == NULL) {
...@@ -801,7 +822,7 @@ hsw_ddi_pll_select(struct intel_crtc *intel_crtc, ...@@ -801,7 +822,7 @@ hsw_ddi_pll_select(struct intel_crtc *intel_crtc,
return false; return false;
} }
intel_crtc->config.ddi_pll_sel = PORT_CLK_SEL_WRPLL(pll->id); intel_crtc->new_config->ddi_pll_sel = PORT_CLK_SEL_WRPLL(pll->id);
} }
return true; return true;
...@@ -817,9 +838,9 @@ hsw_ddi_pll_select(struct intel_crtc *intel_crtc, ...@@ -817,9 +838,9 @@ hsw_ddi_pll_select(struct intel_crtc *intel_crtc,
*/ */
bool intel_ddi_pll_select(struct intel_crtc *intel_crtc) bool intel_ddi_pll_select(struct intel_crtc *intel_crtc)
{ {
struct drm_crtc *crtc = &intel_crtc->base; struct intel_encoder *intel_encoder =
struct intel_encoder *intel_encoder = intel_ddi_get_crtc_encoder(crtc); intel_ddi_get_crtc_new_encoder(intel_crtc);
int clock = intel_crtc->config.port_clock; int clock = intel_crtc->new_config->port_clock;
intel_put_shared_dpll(intel_crtc); intel_put_shared_dpll(intel_crtc);
......
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment