Commit d147583e authored by Xinhao Liu's avatar Xinhao Liu Committed by Jason Gunthorpe

RDMA/hns: Correct the type of variables participating in the shift operation

The type of the variable participating in the shift operation should be an
unsigned type instead of a signed type.

Link: https://lore.kernel.org/r/20211119140208.40416-5-liangwenpeng@huawei.comSigned-off-by: default avatarXinhao Liu <liuxinhao5@hisilicon.com>
Signed-off-by: default avatarWenpeng Liang <liangwenpeng@huawei.com>
Signed-off-by: default avatarJason Gunthorpe <jgg@nvidia.com>
parent 3aecfc38
......@@ -374,8 +374,8 @@ struct hns_roce_wq {
u32 wqe_cnt; /* WQE num */
u32 max_gs;
u32 rsv_sge;
int offset;
int wqe_shift; /* WQE size */
u32 offset;
u32 wqe_shift; /* WQE size */
u32 head;
u32 tail;
void __iomem *db_reg;
......@@ -383,8 +383,8 @@ struct hns_roce_wq {
struct hns_roce_sge {
unsigned int sge_cnt; /* SGE num */
int offset;
int sge_shift; /* SGE size */
u32 offset;
u32 sge_shift; /* SGE size */
};
struct hns_roce_buf_list {
......@@ -468,7 +468,7 @@ struct hns_roce_cq {
struct hns_roce_idx_que {
struct hns_roce_mtr mtr;
int entry_shift;
u32 entry_shift;
unsigned long *bitmap;
u32 head;
u32 tail;
......@@ -480,7 +480,7 @@ struct hns_roce_srq {
u32 wqe_cnt;
int max_gs;
u32 rsv_sge;
int wqe_shift;
u32 wqe_shift;
u32 cqn;
u32 xrcdn;
void __iomem *db_reg;
......@@ -767,7 +767,7 @@ struct hns_roce_caps {
u32 reserved_qps;
int num_qpc_timer;
int num_cqc_timer;
int num_srqs;
u32 num_srqs;
u32 max_wqes;
u32 max_srq_wrs;
u32 max_srq_sges;
......@@ -781,7 +781,7 @@ struct hns_roce_caps {
u32 min_cqes;
u32 min_wqes;
u32 reserved_cqs;
int reserved_srqs;
u32 reserved_srqs;
int num_aeq_vectors;
int num_comp_vectors;
int num_other_vectors;
......@@ -1158,7 +1158,7 @@ void hns_roce_cmd_use_polling(struct hns_roce_dev *hr_dev);
/* hns roce hw need current block and next block addr from mtt */
#define MTT_MIN_COUNT 2
int hns_roce_mtr_find(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
int offset, u64 *mtt_buf, int mtt_max, u64 *base_addr);
u32 offset, u64 *mtt_buf, int mtt_max, u64 *base_addr);
int hns_roce_mtr_create(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
struct hns_roce_buf_attr *buf_attr,
unsigned int page_shift, struct ib_udata *udata,
......
......@@ -5817,7 +5817,7 @@ static void hns_roce_v2_int_mask_enable(struct hns_roce_dev *hr_dev,
roce_write(hr_dev, ROCEE_VF_ABN_INT_CFG_REG, enable_flag);
}
static void hns_roce_v2_destroy_eqc(struct hns_roce_dev *hr_dev, int eqn)
static void hns_roce_v2_destroy_eqc(struct hns_roce_dev *hr_dev, u32 eqn)
{
struct device *dev = hr_dev->dev;
int ret;
......
......@@ -824,11 +824,11 @@ int hns_roce_mtr_map(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
}
int hns_roce_mtr_find(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
int offset, u64 *mtt_buf, int mtt_max, u64 *base_addr)
u32 offset, u64 *mtt_buf, int mtt_max, u64 *base_addr)
{
struct hns_roce_hem_cfg *cfg = &mtr->hem_cfg;
int mtt_count, left;
int start_index;
u32 start_index;
int total = 0;
__le64 *mtts;
u32 npage;
......@@ -884,10 +884,10 @@ int hns_roce_mtr_find(struct hns_roce_dev *hr_dev, struct hns_roce_mtr *mtr,
static int mtr_init_buf_cfg(struct hns_roce_dev *hr_dev,
struct hns_roce_buf_attr *attr,
struct hns_roce_hem_cfg *cfg,
unsigned int *buf_page_shift, int unalinged_size)
unsigned int *buf_page_shift, u64 unalinged_size)
{
struct hns_roce_buf_region *r;
int first_region_padding;
u64 first_region_padding;
int page_cnt, region_cnt;
unsigned int page_shift;
size_t buf_size;
......
......@@ -1391,7 +1391,7 @@ void hns_roce_unlock_cqs(struct hns_roce_cq *send_cq,
}
}
static inline void *get_wqe(struct hns_roce_qp *hr_qp, int offset)
static inline void *get_wqe(struct hns_roce_qp *hr_qp, u32 offset)
{
return hns_roce_buf_offset(hr_qp->mtr.kmem, offset);
}
......
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