Commit d1b2703c authored by Xiaojian Du's avatar Xiaojian Du Committed by Alex Deucher

drm/amdgpu: add the sensor value of VCN activity

This will add the sensor value of VCN activity for some ASICs.
Signed-off-by: default avatarXiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 88867807
...@@ -150,6 +150,7 @@ enum amd_pp_sensors { ...@@ -150,6 +150,7 @@ enum amd_pp_sensors {
AMDGPU_PP_SENSOR_VCN_POWER_STATE, AMDGPU_PP_SENSOR_VCN_POWER_STATE,
AMDGPU_PP_SENSOR_PEAK_PSTATE_SCLK, AMDGPU_PP_SENSOR_PEAK_PSTATE_SCLK,
AMDGPU_PP_SENSOR_PEAK_PSTATE_MCLK, AMDGPU_PP_SENSOR_PEAK_PSTATE_MCLK,
AMDGPU_PP_SENSOR_VCN_LOAD,
}; };
enum amd_pp_task { enum amd_pp_task {
......
...@@ -1581,6 +1581,30 @@ static ssize_t amdgpu_get_mem_busy_percent(struct device *dev, ...@@ -1581,6 +1581,30 @@ static ssize_t amdgpu_get_mem_busy_percent(struct device *dev,
return sysfs_emit(buf, "%d\n", value); return sysfs_emit(buf, "%d\n", value);
} }
/**
* DOC: vcn_busy_percent
*
* The amdgpu driver provides a sysfs API for reading how busy the VCN
* is as a percentage. The file vcn_busy_percent is used for this.
* The SMU firmware computes a percentage of load based on the
* aggregate activity level in the IP cores.
*/
static ssize_t amdgpu_get_vcn_busy_percent(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct drm_device *ddev = dev_get_drvdata(dev);
struct amdgpu_device *adev = drm_to_adev(ddev);
unsigned int value;
int r;
r = amdgpu_hwmon_get_sensor_generic(adev, AMDGPU_PP_SENSOR_VCN_LOAD, &value);
if (r)
return r;
return sysfs_emit(buf, "%d\n", value);
}
/** /**
* DOC: pcie_bw * DOC: pcie_bw
* *
...@@ -2180,6 +2204,7 @@ static struct amdgpu_device_attr amdgpu_device_attrs[] = { ...@@ -2180,6 +2204,7 @@ static struct amdgpu_device_attr amdgpu_device_attrs[] = {
.attr_update = pp_od_clk_voltage_attr_update), .attr_update = pp_od_clk_voltage_attr_update),
AMDGPU_DEVICE_ATTR_RO(gpu_busy_percent, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF), AMDGPU_DEVICE_ATTR_RO(gpu_busy_percent, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
AMDGPU_DEVICE_ATTR_RO(mem_busy_percent, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF), AMDGPU_DEVICE_ATTR_RO(mem_busy_percent, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
AMDGPU_DEVICE_ATTR_RO(vcn_busy_percent, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
AMDGPU_DEVICE_ATTR_RO(pcie_bw, ATTR_FLAG_BASIC), AMDGPU_DEVICE_ATTR_RO(pcie_bw, ATTR_FLAG_BASIC),
AMDGPU_DEVICE_ATTR_RW(pp_features, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF), AMDGPU_DEVICE_ATTR_RW(pp_features, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
AMDGPU_DEVICE_ATTR_RO(unique_id, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF), AMDGPU_DEVICE_ATTR_RO(unique_id, ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
...@@ -2223,6 +2248,15 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_ ...@@ -2223,6 +2248,15 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
gc_ver != IP_VERSION(9, 4, 3)) || gc_ver != IP_VERSION(9, 4, 3)) ||
gc_ver == IP_VERSION(9, 0, 1)) gc_ver == IP_VERSION(9, 0, 1))
*states = ATTR_STATE_UNSUPPORTED; *states = ATTR_STATE_UNSUPPORTED;
} else if (DEVICE_ATTR_IS(vcn_busy_percent)) {
if (!(gc_ver == IP_VERSION(10, 3, 1) ||
gc_ver == IP_VERSION(10, 3, 3) ||
gc_ver == IP_VERSION(10, 3, 6) ||
gc_ver == IP_VERSION(10, 3, 7) ||
gc_ver == IP_VERSION(11, 0, 1) ||
gc_ver == IP_VERSION(11, 0, 4) ||
gc_ver == IP_VERSION(11, 5, 0)))
*states = ATTR_STATE_UNSUPPORTED;
} else if (DEVICE_ATTR_IS(pcie_bw)) { } else if (DEVICE_ATTR_IS(pcie_bw)) {
/* PCIe Perf counters won't work on APU nodes */ /* PCIe Perf counters won't work on APU nodes */
if (adev->flags & AMD_IS_APU || if (adev->flags & AMD_IS_APU ||
...@@ -4429,6 +4463,9 @@ static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, struct amdgpu_device *a ...@@ -4429,6 +4463,9 @@ static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, struct amdgpu_device *a
/* MEM Load */ /* MEM Load */
if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_MEM_LOAD, (void *)&value, &size)) if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_MEM_LOAD, (void *)&value, &size))
seq_printf(m, "MEM Load: %u %%\n", value); seq_printf(m, "MEM Load: %u %%\n", value);
/* VCN Load */
if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCN_LOAD, (void *)&value, &size))
seq_printf(m, "VCN Load: %u %%\n", value);
seq_printf(m, "\n"); seq_printf(m, "\n");
......
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