Commit d24cd783 authored by Ludovic Desroches's avatar Ludovic Desroches Committed by Nicolas Ferre

ARM: at91: sama5d3: add usart dma configurations

Add the DMA configuration for USARTs mainly because it is not obvious to
add the FIFO flag which is needed for rx.
Signed-off-by: default avatarLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
parent 5f815730
...@@ -177,6 +177,9 @@ usart0: serial@f001c000 { ...@@ -177,6 +177,9 @@ usart0: serial@f001c000 {
compatible = "atmel,at91sam9260-usart"; compatible = "atmel,at91sam9260-usart";
reg = <0xf001c000 0x100>; reg = <0xf001c000 0x100>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>; interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
<&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>; pinctrl-0 = <&pinctrl_usart0>;
clocks = <&usart0_clk>; clocks = <&usart0_clk>;
...@@ -188,6 +191,9 @@ usart1: serial@f0020000 { ...@@ -188,6 +191,9 @@ usart1: serial@f0020000 {
compatible = "atmel,at91sam9260-usart"; compatible = "atmel,at91sam9260-usart";
reg = <0xf0020000 0x100>; reg = <0xf0020000 0x100>;
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>; interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(5)>,
<&dma0 2 (AT91_DMA_CFG_PER_ID(6) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>; pinctrl-0 = <&pinctrl_usart1>;
clocks = <&usart1_clk>; clocks = <&usart1_clk>;
...@@ -333,6 +339,9 @@ usart2: serial@f8020000 { ...@@ -333,6 +339,9 @@ usart2: serial@f8020000 {
compatible = "atmel,at91sam9260-usart"; compatible = "atmel,at91sam9260-usart";
reg = <0xf8020000 0x100>; reg = <0xf8020000 0x100>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(7)>,
<&dma1 2 (AT91_DMA_CFG_PER_ID(8) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>; pinctrl-0 = <&pinctrl_usart2>;
clocks = <&usart2_clk>; clocks = <&usart2_clk>;
...@@ -344,6 +353,9 @@ usart3: serial@f8024000 { ...@@ -344,6 +353,9 @@ usart3: serial@f8024000 {
compatible = "atmel,at91sam9260-usart"; compatible = "atmel,at91sam9260-usart";
reg = <0xf8024000 0x100>; reg = <0xf8024000 0x100>;
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(9)>,
<&dma1 2 (AT91_DMA_CFG_PER_ID(10) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>; pinctrl-0 = <&pinctrl_usart3>;
clocks = <&usart3_clk>; clocks = <&usart3_clk>;
...@@ -412,6 +424,9 @@ dbgu: serial@ffffee00 { ...@@ -412,6 +424,9 @@ dbgu: serial@ffffee00 {
compatible = "atmel,at91sam9260-usart"; compatible = "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>; reg = <0xffffee00 0x200>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
<&dma1 2 (AT91_DMA_CFG_PER_ID(14) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>; pinctrl-0 = <&pinctrl_dbgu>;
clocks = <&dbgu_clk>; clocks = <&dbgu_clk>;
......
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